xref: /linux/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts (revision 09c332027d87cfda9ff58bb84952f6ffefbd309e) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2021 BayLibre, SAS.
4 * Author: Fabien Parent <fparent@baylibre.com>
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/input/input.h>
11#include "mt8183.dtsi"
12#include "mt6358.dtsi"
13
14/ {
15	model = "Pumpkin MT8183";
16	compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183";
17
18	aliases {
19		serial0 = &uart0;
20	};
21
22	memory@40000000 {
23		device_type = "memory";
24		reg = <0 0x40000000 0 0x80000000>;
25	};
26
27	chosen {
28		stdout-path = "serial0:921600n8";
29	};
30
31	reserved-memory {
32		#address-cells = <2>;
33		#size-cells = <2>;
34		ranges;
35
36		scp_mem_reserved: scp_mem_region@50000000 {
37			compatible = "shared-dma-pool";
38			reg = <0 0x50000000 0 0x2900000>;
39			no-map;
40		};
41	};
42
43	leds {
44		compatible = "gpio-leds";
45
46		led-red {
47			label = "red";
48			gpios = <&pio 155 GPIO_ACTIVE_HIGH>;
49			default-state = "off";
50		};
51
52		led-green {
53			label = "green";
54			gpios = <&pio 156 GPIO_ACTIVE_HIGH>;
55			default-state = "off";
56		};
57	};
58
59	thermistor {
60		compatible = "murata,ncp03wf104";
61		pullup-uv = <1800000>;
62		pullup-ohm = <390000>;
63		pulldown-ohm = <0>;
64		io-channels = <&auxadc 0>;
65	};
66};
67
68&auxadc {
69	status = "okay";
70};
71
72&gpu {
73	mali-supply = <&mt6358_vgpu_reg>;
74	sram-supply = <&mt6358_vsram_gpu_reg>;
75};
76
77&i2c0 {
78	pinctrl-names = "default";
79	pinctrl-0 = <&i2c_pins_0>;
80	status = "okay";
81	clock-frequency = <100000>;
82};
83
84&i2c1 {
85	pinctrl-names = "default";
86	pinctrl-0 = <&i2c_pins_1>;
87	status = "okay";
88	clock-frequency = <100000>;
89};
90
91&i2c2 {
92	pinctrl-names = "default";
93	pinctrl-0 = <&i2c_pins_2>;
94	status = "okay";
95	clock-frequency = <100000>;
96};
97
98&i2c3 {
99	pinctrl-names = "default";
100	pinctrl-0 = <&i2c_pins_3>;
101	status = "okay";
102	clock-frequency = <100000>;
103};
104
105&i2c4 {
106	pinctrl-names = "default";
107	pinctrl-0 = <&i2c_pins_4>;
108	status = "okay";
109	clock-frequency = <100000>;
110};
111
112&i2c5 {
113	pinctrl-names = "default";
114	pinctrl-0 = <&i2c_pins_5>;
115	status = "okay";
116	clock-frequency = <100000>;
117};
118
119&i2c6 {
120	pinctrl-names = "default";
121	pinctrl-0 = <&i2c6_pins>;
122	status = "okay";
123	clock-frequency = <100000>;
124};
125
126&keyboard {
127	pinctrl-names = "default";
128	pinctrl-0 = <&keyboard_pins>;
129	status = "okay";
130	linux,keymap = <MATRIX_KEY(0x00, 0x00, KEY_VOLUMEDOWN)
131			MATRIX_KEY(0x01, 0x00, KEY_VOLUMEUP)>;
132	keypad,num-rows = <2>;
133	keypad,num-columns = <1>;
134	debounce-delay-ms = <32>;
135	mediatek,keys-per-group = <2>;
136};
137
138&mmc0 {
139	status = "okay";
140	pinctrl-names = "default", "state_uhs";
141	pinctrl-0 = <&mmc0_pins_default>;
142	pinctrl-1 = <&mmc0_pins_uhs>;
143	bus-width = <8>;
144	max-frequency = <200000000>;
145	cap-mmc-highspeed;
146	mmc-hs200-1_8v;
147	mmc-hs400-1_8v;
148	cap-mmc-hw-reset;
149	no-sdio;
150	no-sd;
151	hs400-ds-delay = <0x12814>;
152	vmmc-supply = <&mt6358_vemc_reg>;
153	vqmmc-supply = <&mt6358_vio18_reg>;
154	assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
155	assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
156	non-removable;
157};
158
159&mmc1 {
160	status = "okay";
161	pinctrl-names = "default", "state_uhs";
162	pinctrl-0 = <&mmc1_pins_default>;
163	pinctrl-1 = <&mmc1_pins_uhs>;
164	bus-width = <4>;
165	max-frequency = <200000000>;
166	cap-sd-highspeed;
167	sd-uhs-sdr50;
168	sd-uhs-sdr104;
169	cap-sdio-irq;
170	no-mmc;
171	no-sd;
172	vmmc-supply = <&mt6358_vmch_reg>;
173	vqmmc-supply = <&mt6358_vmc_reg>;
174	keep-power-in-suspend;
175	wakeup-source;
176	non-removable;
177};
178
179&pio {
180	i2c_pins_0: i2c0 {
181		pins_i2c{
182			pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
183				 <PINMUX_GPIO83__FUNC_SCL0>;
184			mediatek,pull-up-adv = <3>;
185			mediatek,drive-strength-adv = <00>;
186		};
187	};
188
189	i2c_pins_1: i2c1 {
190		pins_i2c{
191			pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
192				 <PINMUX_GPIO84__FUNC_SCL1>;
193			mediatek,pull-up-adv = <3>;
194			mediatek,drive-strength-adv = <00>;
195		};
196	};
197
198	i2c_pins_2: i2c2 {
199		pins_i2c{
200			pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
201				 <PINMUX_GPIO104__FUNC_SDA2>;
202			mediatek,pull-up-adv = <3>;
203			mediatek,drive-strength-adv = <00>;
204		};
205	};
206
207	i2c_pins_3: i2c3 {
208		pins_i2c{
209			pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
210				 <PINMUX_GPIO51__FUNC_SDA3>;
211			mediatek,pull-up-adv = <3>;
212			mediatek,drive-strength-adv = <00>;
213		};
214	};
215
216	i2c_pins_4: i2c4 {
217		pins_i2c{
218			pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
219				 <PINMUX_GPIO106__FUNC_SDA4>;
220			mediatek,pull-up-adv = <3>;
221			mediatek,drive-strength-adv = <00>;
222		};
223	};
224
225	i2c_pins_5: i2c5 {
226		pins_i2c{
227			pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
228				 <PINMUX_GPIO49__FUNC_SDA5>;
229			mediatek,pull-up-adv = <3>;
230			mediatek,drive-strength-adv = <00>;
231		};
232	};
233
234	i2c6_pins: i2c6 {
235		pins_cmd_dat {
236			pinmux = <PINMUX_GPIO113__FUNC_SCL6>,
237				 <PINMUX_GPIO114__FUNC_SDA6>;
238			mediatek,pull-up-adv = <3>;
239		};
240	};
241
242	keyboard_pins: keyboard {
243		pins_keyboard {
244			pinmux = <PINMUX_GPIO91__FUNC_KPROW1>,
245				 <PINMUX_GPIO92__FUNC_KPROW0>,
246				 <PINMUX_GPIO93__FUNC_KPCOL0>;
247		};
248	};
249
250	mmc0_pins_default: mmc0-pins-default {
251		pins_cmd_dat {
252			pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
253				 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
254				 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
255				 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
256				 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
257				 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
258				 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
259				 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
260				 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
261			input-enable;
262			drive-strength = <MTK_DRIVE_14mA>;
263			mediatek,pull-up-adv = <01>;
264		};
265
266		pins_clk {
267			pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
268			drive-strength = <MTK_DRIVE_14mA>;
269			mediatek,pull-down-adv = <10>;
270		};
271
272		pins_rst {
273			pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
274			drive-strength = <MTK_DRIVE_14mA>;
275			mediatek,pull-down-adv = <01>;
276		};
277	};
278
279	mmc0_pins_uhs: mmc0-pins-uhs {
280		pins_cmd_dat {
281			pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
282				 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
283				 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
284				 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
285				 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
286				 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
287				 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
288				 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
289				 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
290			input-enable;
291			drive-strength = <MTK_DRIVE_14mA>;
292			mediatek,pull-up-adv = <01>;
293		};
294
295		pins_clk {
296			pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
297			drive-strength = <MTK_DRIVE_14mA>;
298			mediatek,pull-down-adv = <10>;
299		};
300
301		pins_ds {
302			pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
303			drive-strength = <MTK_DRIVE_14mA>;
304			mediatek,pull-down-adv = <10>;
305		};
306
307		pins_rst {
308			pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
309			drive-strength = <MTK_DRIVE_14mA>;
310			mediatek,pull-up-adv = <01>;
311		};
312	};
313
314	mmc1_pins_default: mmc1-pins-default {
315		pins_cmd_dat {
316			pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
317				 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
318				 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
319				 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
320				 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
321			input-enable;
322			mediatek,pull-up-adv = <10>;
323		};
324
325		pins_clk {
326			pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
327			input-enable;
328			mediatek,pull-down-adv = <10>;
329		};
330
331		pins_pmu {
332			pinmux = <PINMUX_GPIO178__FUNC_GPIO178>;
333			output-high;
334		};
335	};
336
337	mmc1_pins_uhs: mmc1-pins-uhs {
338		pins_cmd_dat {
339			pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
340				 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
341				 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
342				 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
343				 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
344			drive-strength = <MTK_DRIVE_6mA>;
345			input-enable;
346			mediatek,pull-up-adv = <10>;
347		};
348
349		pins_clk {
350			pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
351			drive-strength = <MTK_DRIVE_8mA>;
352			mediatek,pull-down-adv = <10>;
353			input-enable;
354		};
355	};
356};
357
358&mfg {
359	domain-supply = <&mt6358_vgpu_reg>;
360};
361
362&cpu0 {
363	proc-supply = <&mt6358_vproc12_reg>;
364};
365
366&cpu1 {
367	proc-supply = <&mt6358_vproc12_reg>;
368};
369
370&cpu2 {
371	proc-supply = <&mt6358_vproc12_reg>;
372};
373
374&cpu3 {
375	proc-supply = <&mt6358_vproc12_reg>;
376};
377
378&cpu4 {
379	proc-supply = <&mt6358_vproc11_reg>;
380};
381
382&cpu5 {
383	proc-supply = <&mt6358_vproc11_reg>;
384};
385
386&cpu6 {
387	proc-supply = <&mt6358_vproc11_reg>;
388};
389
390&cpu7 {
391	proc-supply = <&mt6358_vproc11_reg>;
392};
393
394&uart0 {
395	status = "okay";
396};
397
398&scp {
399	status = "okay";
400};
401
402&dsi0 {
403	status = "disabled";
404};
405