119b6403fSFabien Parent// SPDX-License-Identifier: GPL-2.0 219b6403fSFabien Parent/* 319b6403fSFabien Parent * Copyright (c) 2021 BayLibre, SAS. 419b6403fSFabien Parent * Author: Fabien Parent <fparent@baylibre.com> 519b6403fSFabien Parent */ 619b6403fSFabien Parent 719b6403fSFabien Parent/dts-v1/; 819b6403fSFabien Parent 919b6403fSFabien Parent#include <dt-bindings/gpio/gpio.h> 1019b6403fSFabien Parent#include "mt8183.dtsi" 1119b6403fSFabien Parent#include "mt6358.dtsi" 1219b6403fSFabien Parent 1319b6403fSFabien Parent/ { 1419b6403fSFabien Parent model = "Pumpkin MT8183"; 1519b6403fSFabien Parent compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183"; 1619b6403fSFabien Parent 1719b6403fSFabien Parent aliases { 1819b6403fSFabien Parent serial0 = &uart0; 1919b6403fSFabien Parent }; 2019b6403fSFabien Parent 2119b6403fSFabien Parent memory@40000000 { 2219b6403fSFabien Parent device_type = "memory"; 2319b6403fSFabien Parent reg = <0 0x40000000 0 0x80000000>; 2419b6403fSFabien Parent }; 2519b6403fSFabien Parent 2619b6403fSFabien Parent chosen { 2719b6403fSFabien Parent stdout-path = "serial0:921600n8"; 2819b6403fSFabien Parent }; 2919b6403fSFabien Parent 3019b6403fSFabien Parent reserved-memory { 3119b6403fSFabien Parent #address-cells = <2>; 3219b6403fSFabien Parent #size-cells = <2>; 3319b6403fSFabien Parent ranges; 3419b6403fSFabien Parent 35f9929b45SMatthias Brugger scp_mem_reserved: scp_mem_region@50000000 { 3619b6403fSFabien Parent compatible = "shared-dma-pool"; 3719b6403fSFabien Parent reg = <0 0x50000000 0 0x2900000>; 3819b6403fSFabien Parent no-map; 3919b6403fSFabien Parent }; 4019b6403fSFabien Parent }; 4119b6403fSFabien Parent 4219b6403fSFabien Parent leds { 4319b6403fSFabien Parent compatible = "gpio-leds"; 4419b6403fSFabien Parent 4519b6403fSFabien Parent led-red { 4619b6403fSFabien Parent label = "red"; 4719b6403fSFabien Parent gpios = <&pio 155 GPIO_ACTIVE_HIGH>; 4819b6403fSFabien Parent default-state = "off"; 4919b6403fSFabien Parent }; 5019b6403fSFabien Parent 5119b6403fSFabien Parent led-green { 5219b6403fSFabien Parent label = "green"; 5319b6403fSFabien Parent gpios = <&pio 156 GPIO_ACTIVE_HIGH>; 5419b6403fSFabien Parent default-state = "off"; 5519b6403fSFabien Parent }; 5619b6403fSFabien Parent }; 5719b6403fSFabien Parent 58*41d2d562SFabien Parent thermistor { 5919b6403fSFabien Parent compatible = "murata,ncp03wf104"; 6019b6403fSFabien Parent pullup-uv = <1800000>; 6119b6403fSFabien Parent pullup-ohm = <390000>; 6219b6403fSFabien Parent pulldown-ohm = <0>; 6319b6403fSFabien Parent io-channels = <&auxadc 0>; 6419b6403fSFabien Parent }; 6519b6403fSFabien Parent}; 6619b6403fSFabien Parent 6719b6403fSFabien Parent&auxadc { 6819b6403fSFabien Parent status = "okay"; 6919b6403fSFabien Parent}; 7019b6403fSFabien Parent 71a8168cebSNicolas Boichat&gpu { 72a8168cebSNicolas Boichat mali-supply = <&mt6358_vgpu_reg>; 73a8168cebSNicolas Boichat sram-supply = <&mt6358_vsram_gpu_reg>; 74a8168cebSNicolas Boichat}; 75a8168cebSNicolas Boichat 7619b6403fSFabien Parent&i2c0 { 7719b6403fSFabien Parent pinctrl-names = "default"; 7819b6403fSFabien Parent pinctrl-0 = <&i2c_pins_0>; 7919b6403fSFabien Parent status = "okay"; 8019b6403fSFabien Parent clock-frequency = <100000>; 8119b6403fSFabien Parent}; 8219b6403fSFabien Parent 8319b6403fSFabien Parent&i2c1 { 8419b6403fSFabien Parent pinctrl-names = "default"; 8519b6403fSFabien Parent pinctrl-0 = <&i2c_pins_1>; 8619b6403fSFabien Parent status = "okay"; 8719b6403fSFabien Parent clock-frequency = <100000>; 8819b6403fSFabien Parent}; 8919b6403fSFabien Parent 9019b6403fSFabien Parent&i2c2 { 9119b6403fSFabien Parent pinctrl-names = "default"; 9219b6403fSFabien Parent pinctrl-0 = <&i2c_pins_2>; 9319b6403fSFabien Parent status = "okay"; 9419b6403fSFabien Parent clock-frequency = <100000>; 9519b6403fSFabien Parent}; 9619b6403fSFabien Parent 9719b6403fSFabien Parent&i2c3 { 9819b6403fSFabien Parent pinctrl-names = "default"; 9919b6403fSFabien Parent pinctrl-0 = <&i2c_pins_3>; 10019b6403fSFabien Parent status = "okay"; 10119b6403fSFabien Parent clock-frequency = <100000>; 10219b6403fSFabien Parent}; 10319b6403fSFabien Parent 10419b6403fSFabien Parent&i2c4 { 10519b6403fSFabien Parent pinctrl-names = "default"; 10619b6403fSFabien Parent pinctrl-0 = <&i2c_pins_4>; 10719b6403fSFabien Parent status = "okay"; 10819b6403fSFabien Parent clock-frequency = <100000>; 10919b6403fSFabien Parent}; 11019b6403fSFabien Parent 11119b6403fSFabien Parent&i2c5 { 11219b6403fSFabien Parent pinctrl-names = "default"; 11319b6403fSFabien Parent pinctrl-0 = <&i2c_pins_5>; 11419b6403fSFabien Parent status = "okay"; 11519b6403fSFabien Parent clock-frequency = <100000>; 11619b6403fSFabien Parent}; 11719b6403fSFabien Parent 11819b6403fSFabien Parent&i2c6 { 11919b6403fSFabien Parent pinctrl-names = "default"; 12019b6403fSFabien Parent pinctrl-0 = <&i2c6_pins>; 12119b6403fSFabien Parent status = "okay"; 12219b6403fSFabien Parent clock-frequency = <100000>; 12319b6403fSFabien Parent}; 12419b6403fSFabien Parent 12519b6403fSFabien Parent&mmc0 { 12619b6403fSFabien Parent status = "okay"; 12719b6403fSFabien Parent pinctrl-names = "default", "state_uhs"; 12819b6403fSFabien Parent pinctrl-0 = <&mmc0_pins_default>; 12919b6403fSFabien Parent pinctrl-1 = <&mmc0_pins_uhs>; 13019b6403fSFabien Parent bus-width = <8>; 13119b6403fSFabien Parent max-frequency = <200000000>; 13219b6403fSFabien Parent cap-mmc-highspeed; 13319b6403fSFabien Parent mmc-hs200-1_8v; 13419b6403fSFabien Parent mmc-hs400-1_8v; 13519b6403fSFabien Parent cap-mmc-hw-reset; 13619b6403fSFabien Parent no-sdio; 13719b6403fSFabien Parent no-sd; 13819b6403fSFabien Parent hs400-ds-delay = <0x12814>; 13919b6403fSFabien Parent vmmc-supply = <&mt6358_vemc_reg>; 14019b6403fSFabien Parent vqmmc-supply = <&mt6358_vio18_reg>; 14119b6403fSFabien Parent assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>; 14219b6403fSFabien Parent assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>; 14319b6403fSFabien Parent non-removable; 14419b6403fSFabien Parent}; 14519b6403fSFabien Parent 14619b6403fSFabien Parent&mmc1 { 14719b6403fSFabien Parent status = "okay"; 14819b6403fSFabien Parent pinctrl-names = "default", "state_uhs"; 14919b6403fSFabien Parent pinctrl-0 = <&mmc1_pins_default>; 15019b6403fSFabien Parent pinctrl-1 = <&mmc1_pins_uhs>; 15119b6403fSFabien Parent bus-width = <4>; 15219b6403fSFabien Parent max-frequency = <200000000>; 15319b6403fSFabien Parent cap-sd-highspeed; 15419b6403fSFabien Parent sd-uhs-sdr50; 15519b6403fSFabien Parent sd-uhs-sdr104; 15619b6403fSFabien Parent cap-sdio-irq; 15719b6403fSFabien Parent no-mmc; 15819b6403fSFabien Parent no-sd; 15919b6403fSFabien Parent vmmc-supply = <&mt6358_vmch_reg>; 16019b6403fSFabien Parent vqmmc-supply = <&mt6358_vmc_reg>; 16119b6403fSFabien Parent keep-power-in-suspend; 16219b6403fSFabien Parent enable-sdio-wakeup; 16319b6403fSFabien Parent non-removable; 16419b6403fSFabien Parent}; 16519b6403fSFabien Parent 16619b6403fSFabien Parent&pio { 16719b6403fSFabien Parent i2c_pins_0: i2c0 { 16819b6403fSFabien Parent pins_i2c{ 16919b6403fSFabien Parent pinmux = <PINMUX_GPIO82__FUNC_SDA0>, 17019b6403fSFabien Parent <PINMUX_GPIO83__FUNC_SCL0>; 17119b6403fSFabien Parent mediatek,pull-up-adv = <3>; 17219b6403fSFabien Parent mediatek,drive-strength-adv = <00>; 17319b6403fSFabien Parent }; 17419b6403fSFabien Parent }; 17519b6403fSFabien Parent 17619b6403fSFabien Parent i2c_pins_1: i2c1 { 17719b6403fSFabien Parent pins_i2c{ 17819b6403fSFabien Parent pinmux = <PINMUX_GPIO81__FUNC_SDA1>, 17919b6403fSFabien Parent <PINMUX_GPIO84__FUNC_SCL1>; 18019b6403fSFabien Parent mediatek,pull-up-adv = <3>; 18119b6403fSFabien Parent mediatek,drive-strength-adv = <00>; 18219b6403fSFabien Parent }; 18319b6403fSFabien Parent }; 18419b6403fSFabien Parent 18519b6403fSFabien Parent i2c_pins_2: i2c2 { 18619b6403fSFabien Parent pins_i2c{ 18719b6403fSFabien Parent pinmux = <PINMUX_GPIO103__FUNC_SCL2>, 18819b6403fSFabien Parent <PINMUX_GPIO104__FUNC_SDA2>; 18919b6403fSFabien Parent mediatek,pull-up-adv = <3>; 19019b6403fSFabien Parent mediatek,drive-strength-adv = <00>; 19119b6403fSFabien Parent }; 19219b6403fSFabien Parent }; 19319b6403fSFabien Parent 19419b6403fSFabien Parent i2c_pins_3: i2c3 { 19519b6403fSFabien Parent pins_i2c{ 19619b6403fSFabien Parent pinmux = <PINMUX_GPIO50__FUNC_SCL3>, 19719b6403fSFabien Parent <PINMUX_GPIO51__FUNC_SDA3>; 19819b6403fSFabien Parent mediatek,pull-up-adv = <3>; 19919b6403fSFabien Parent mediatek,drive-strength-adv = <00>; 20019b6403fSFabien Parent }; 20119b6403fSFabien Parent }; 20219b6403fSFabien Parent 20319b6403fSFabien Parent i2c_pins_4: i2c4 { 20419b6403fSFabien Parent pins_i2c{ 20519b6403fSFabien Parent pinmux = <PINMUX_GPIO105__FUNC_SCL4>, 20619b6403fSFabien Parent <PINMUX_GPIO106__FUNC_SDA4>; 20719b6403fSFabien Parent mediatek,pull-up-adv = <3>; 20819b6403fSFabien Parent mediatek,drive-strength-adv = <00>; 20919b6403fSFabien Parent }; 21019b6403fSFabien Parent }; 21119b6403fSFabien Parent 21219b6403fSFabien Parent i2c_pins_5: i2c5 { 21319b6403fSFabien Parent pins_i2c{ 21419b6403fSFabien Parent pinmux = <PINMUX_GPIO48__FUNC_SCL5>, 21519b6403fSFabien Parent <PINMUX_GPIO49__FUNC_SDA5>; 21619b6403fSFabien Parent mediatek,pull-up-adv = <3>; 21719b6403fSFabien Parent mediatek,drive-strength-adv = <00>; 21819b6403fSFabien Parent }; 21919b6403fSFabien Parent }; 22019b6403fSFabien Parent 22119b6403fSFabien Parent i2c6_pins: i2c6 { 22219b6403fSFabien Parent pins_cmd_dat { 22319b6403fSFabien Parent pinmux = <PINMUX_GPIO113__FUNC_SCL6>, 22419b6403fSFabien Parent <PINMUX_GPIO114__FUNC_SDA6>; 22519b6403fSFabien Parent mediatek,pull-up-adv = <3>; 22619b6403fSFabien Parent }; 22719b6403fSFabien Parent }; 22819b6403fSFabien Parent 22919b6403fSFabien Parent mmc0_pins_default: mmc0-pins-default { 23019b6403fSFabien Parent pins_cmd_dat { 23119b6403fSFabien Parent pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>, 23219b6403fSFabien Parent <PINMUX_GPIO128__FUNC_MSDC0_DAT1>, 23319b6403fSFabien Parent <PINMUX_GPIO125__FUNC_MSDC0_DAT2>, 23419b6403fSFabien Parent <PINMUX_GPIO132__FUNC_MSDC0_DAT3>, 23519b6403fSFabien Parent <PINMUX_GPIO126__FUNC_MSDC0_DAT4>, 23619b6403fSFabien Parent <PINMUX_GPIO129__FUNC_MSDC0_DAT5>, 23719b6403fSFabien Parent <PINMUX_GPIO127__FUNC_MSDC0_DAT6>, 23819b6403fSFabien Parent <PINMUX_GPIO130__FUNC_MSDC0_DAT7>, 23919b6403fSFabien Parent <PINMUX_GPIO122__FUNC_MSDC0_CMD>; 24019b6403fSFabien Parent input-enable; 24119b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 24219b6403fSFabien Parent mediatek,pull-up-adv = <01>; 24319b6403fSFabien Parent }; 24419b6403fSFabien Parent 24519b6403fSFabien Parent pins_clk { 24619b6403fSFabien Parent pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>; 24719b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 24819b6403fSFabien Parent mediatek,pull-down-adv = <10>; 24919b6403fSFabien Parent }; 25019b6403fSFabien Parent 25119b6403fSFabien Parent pins_rst { 25219b6403fSFabien Parent pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>; 25319b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 25419b6403fSFabien Parent mediatek,pull-down-adv = <01>; 25519b6403fSFabien Parent }; 25619b6403fSFabien Parent }; 25719b6403fSFabien Parent 25819b6403fSFabien Parent mmc0_pins_uhs: mmc0-pins-uhs { 25919b6403fSFabien Parent pins_cmd_dat { 26019b6403fSFabien Parent pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>, 26119b6403fSFabien Parent <PINMUX_GPIO128__FUNC_MSDC0_DAT1>, 26219b6403fSFabien Parent <PINMUX_GPIO125__FUNC_MSDC0_DAT2>, 26319b6403fSFabien Parent <PINMUX_GPIO132__FUNC_MSDC0_DAT3>, 26419b6403fSFabien Parent <PINMUX_GPIO126__FUNC_MSDC0_DAT4>, 26519b6403fSFabien Parent <PINMUX_GPIO129__FUNC_MSDC0_DAT5>, 26619b6403fSFabien Parent <PINMUX_GPIO127__FUNC_MSDC0_DAT6>, 26719b6403fSFabien Parent <PINMUX_GPIO130__FUNC_MSDC0_DAT7>, 26819b6403fSFabien Parent <PINMUX_GPIO122__FUNC_MSDC0_CMD>; 26919b6403fSFabien Parent input-enable; 27019b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 27119b6403fSFabien Parent mediatek,pull-up-adv = <01>; 27219b6403fSFabien Parent }; 27319b6403fSFabien Parent 27419b6403fSFabien Parent pins_clk { 27519b6403fSFabien Parent pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>; 27619b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 27719b6403fSFabien Parent mediatek,pull-down-adv = <10>; 27819b6403fSFabien Parent }; 27919b6403fSFabien Parent 28019b6403fSFabien Parent pins_ds { 28119b6403fSFabien Parent pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>; 28219b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 28319b6403fSFabien Parent mediatek,pull-down-adv = <10>; 28419b6403fSFabien Parent }; 28519b6403fSFabien Parent 28619b6403fSFabien Parent pins_rst { 28719b6403fSFabien Parent pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>; 28819b6403fSFabien Parent drive-strength = <MTK_DRIVE_14mA>; 28919b6403fSFabien Parent mediatek,pull-up-adv = <01>; 29019b6403fSFabien Parent }; 29119b6403fSFabien Parent }; 29219b6403fSFabien Parent 29319b6403fSFabien Parent mmc1_pins_default: mmc1-pins-default { 29419b6403fSFabien Parent pins_cmd_dat { 29519b6403fSFabien Parent pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>, 29619b6403fSFabien Parent <PINMUX_GPIO32__FUNC_MSDC1_DAT0>, 29719b6403fSFabien Parent <PINMUX_GPIO34__FUNC_MSDC1_DAT1>, 29819b6403fSFabien Parent <PINMUX_GPIO33__FUNC_MSDC1_DAT2>, 29919b6403fSFabien Parent <PINMUX_GPIO30__FUNC_MSDC1_DAT3>; 30019b6403fSFabien Parent input-enable; 30119b6403fSFabien Parent mediatek,pull-up-adv = <10>; 30219b6403fSFabien Parent }; 30319b6403fSFabien Parent 30419b6403fSFabien Parent pins_clk { 30519b6403fSFabien Parent pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>; 30619b6403fSFabien Parent input-enable; 30719b6403fSFabien Parent mediatek,pull-down-adv = <10>; 30819b6403fSFabien Parent }; 30919b6403fSFabien Parent 31019b6403fSFabien Parent pins_pmu { 31119b6403fSFabien Parent pinmux = <PINMUX_GPIO178__FUNC_GPIO178>; 31219b6403fSFabien Parent output-high; 31319b6403fSFabien Parent }; 31419b6403fSFabien Parent }; 31519b6403fSFabien Parent 31619b6403fSFabien Parent mmc1_pins_uhs: mmc1-pins-uhs { 31719b6403fSFabien Parent pins_cmd_dat { 31819b6403fSFabien Parent pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>, 31919b6403fSFabien Parent <PINMUX_GPIO32__FUNC_MSDC1_DAT0>, 32019b6403fSFabien Parent <PINMUX_GPIO34__FUNC_MSDC1_DAT1>, 32119b6403fSFabien Parent <PINMUX_GPIO33__FUNC_MSDC1_DAT2>, 32219b6403fSFabien Parent <PINMUX_GPIO30__FUNC_MSDC1_DAT3>; 32319b6403fSFabien Parent drive-strength = <MTK_DRIVE_6mA>; 32419b6403fSFabien Parent input-enable; 32519b6403fSFabien Parent mediatek,pull-up-adv = <10>; 32619b6403fSFabien Parent }; 32719b6403fSFabien Parent 32819b6403fSFabien Parent pins_clk { 32919b6403fSFabien Parent pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>; 33019b6403fSFabien Parent drive-strength = <MTK_DRIVE_8mA>; 33119b6403fSFabien Parent mediatek,pull-down-adv = <10>; 33219b6403fSFabien Parent input-enable; 33319b6403fSFabien Parent }; 33419b6403fSFabien Parent }; 33519b6403fSFabien Parent}; 33619b6403fSFabien Parent 33719b6403fSFabien Parent&mfg { 33819b6403fSFabien Parent domain-supply = <&mt6358_vgpu_reg>; 33919b6403fSFabien Parent}; 34019b6403fSFabien Parent 34119b6403fSFabien Parent&cpu0 { 34219b6403fSFabien Parent proc-supply = <&mt6358_vproc12_reg>; 34319b6403fSFabien Parent}; 34419b6403fSFabien Parent 34519b6403fSFabien Parent&cpu1 { 34619b6403fSFabien Parent proc-supply = <&mt6358_vproc12_reg>; 34719b6403fSFabien Parent}; 34819b6403fSFabien Parent 34919b6403fSFabien Parent&cpu2 { 35019b6403fSFabien Parent proc-supply = <&mt6358_vproc12_reg>; 35119b6403fSFabien Parent}; 35219b6403fSFabien Parent 35319b6403fSFabien Parent&cpu3 { 35419b6403fSFabien Parent proc-supply = <&mt6358_vproc12_reg>; 35519b6403fSFabien Parent}; 35619b6403fSFabien Parent 35719b6403fSFabien Parent&cpu4 { 35819b6403fSFabien Parent proc-supply = <&mt6358_vproc11_reg>; 35919b6403fSFabien Parent}; 36019b6403fSFabien Parent 36119b6403fSFabien Parent&cpu5 { 36219b6403fSFabien Parent proc-supply = <&mt6358_vproc11_reg>; 36319b6403fSFabien Parent}; 36419b6403fSFabien Parent 36519b6403fSFabien Parent&cpu6 { 36619b6403fSFabien Parent proc-supply = <&mt6358_vproc11_reg>; 36719b6403fSFabien Parent}; 36819b6403fSFabien Parent 36919b6403fSFabien Parent&cpu7 { 37019b6403fSFabien Parent proc-supply = <&mt6358_vproc11_reg>; 37119b6403fSFabien Parent}; 37219b6403fSFabien Parent 37319b6403fSFabien Parent&uart0 { 37419b6403fSFabien Parent status = "okay"; 37519b6403fSFabien Parent}; 37619b6403fSFabien Parent 37719b6403fSFabien Parent&scp { 37819b6403fSFabien Parent status = "okay"; 37919b6403fSFabien Parent}; 38019b6403fSFabien Parent 38119b6403fSFabien Parent&dsi0 { 38219b6403fSFabien Parent status = "disabled"; 38319b6403fSFabien Parent}; 384