1e526c9bcSBen Ho// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2e526c9bcSBen Ho/* 3e526c9bcSBen Ho * Copyright (c) 2018 MediaTek Inc. 4e526c9bcSBen Ho * Author: Ben Ho <ben.ho@mediatek.com> 5e526c9bcSBen Ho * Erin Lo <erin.lo@mediatek.com> 6e526c9bcSBen Ho */ 7e526c9bcSBen Ho 8e526c9bcSBen Ho/dts-v1/; 9e526c9bcSBen Ho#include "mt8183.dtsi" 10e526c9bcSBen Ho 11e526c9bcSBen Ho/ { 12e526c9bcSBen Ho model = "MediaTek MT8183 evaluation board"; 13e526c9bcSBen Ho compatible = "mediatek,mt8183-evb", "mediatek,mt8183"; 14e526c9bcSBen Ho 15e526c9bcSBen Ho aliases { 16e526c9bcSBen Ho serial0 = &uart0; 17e526c9bcSBen Ho }; 18e526c9bcSBen Ho 19e526c9bcSBen Ho memory@40000000 { 20e526c9bcSBen Ho device_type = "memory"; 21e526c9bcSBen Ho reg = <0 0x40000000 0 0x80000000>; 22e526c9bcSBen Ho }; 23e526c9bcSBen Ho 24e526c9bcSBen Ho chosen { 25e526c9bcSBen Ho stdout-path = "serial0:921600n8"; 26e526c9bcSBen Ho }; 27e526c9bcSBen Ho}; 28e526c9bcSBen Ho 29*eb59b353SZhiyong Tao&auxadc { 30*eb59b353SZhiyong Tao status = "okay"; 31*eb59b353SZhiyong Tao}; 32*eb59b353SZhiyong Tao 33e526c9bcSBen Ho&uart0 { 34e526c9bcSBen Ho status = "okay"; 35e526c9bcSBen Ho}; 36