1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2021 MediaTek Inc. 4 * Authors: Sam.Shih <sam.shih@mediatek.com> 5 * Frank Wunderlich <frank-w@public-files.de> 6 * Daniel Golle <daniel@makrotopia.org> 7 */ 8 9/dts-v1/; 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/input/input.h> 12#include <dt-bindings/leds/common.h> 13#include <dt-bindings/pinctrl/mt65xx.h> 14 15#include "mt7986a.dtsi" 16 17/ { 18 model = "Bananapi BPI-R3"; 19 chassis-type = "embedded"; 20 compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; 21 22 aliases { 23 serial0 = &uart0; 24 ethernet0 = &gmac0; 25 ethernet1 = &gmac1; 26 }; 27 28 chosen { 29 stdout-path = "serial0:115200n8"; 30 }; 31 32 dcin: regulator-12vd { 33 compatible = "regulator-fixed"; 34 regulator-name = "12vd"; 35 regulator-min-microvolt = <12000000>; 36 regulator-max-microvolt = <12000000>; 37 regulator-boot-on; 38 regulator-always-on; 39 }; 40 41 fan: pwm-fan { 42 compatible = "pwm-fan"; 43 #cooling-cells = <2>; 44 /* cooling level (0, 1, 2) - pwm inverted */ 45 cooling-levels = <255 96 0>; 46 pwms = <&pwm 0 10000>; 47 status = "okay"; 48 }; 49 50 gpio-keys { 51 compatible = "gpio-keys"; 52 53 reset-key { 54 label = "reset"; 55 linux,code = <KEY_RESTART>; 56 gpios = <&pio 9 GPIO_ACTIVE_LOW>; 57 }; 58 59 wps-key { 60 label = "wps"; 61 linux,code = <KEY_WPS_BUTTON>; 62 gpios = <&pio 10 GPIO_ACTIVE_LOW>; 63 }; 64 }; 65 66 /* i2c of the left SFP cage (wan) */ 67 i2c_sfp1: i2c-0 { 68 compatible = "i2c-gpio"; 69 sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 70 scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 71 i2c-gpio,delay-us = <2>; 72 }; 73 74 /* i2c of the right SFP cage (lan) */ 75 i2c_sfp2: i2c-1 { 76 compatible = "i2c-gpio"; 77 sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 78 scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 79 i2c-gpio,delay-us = <2>; 80 }; 81 82 leds { 83 compatible = "gpio-leds"; 84 85 green_led: led-0 { 86 color = <LED_COLOR_ID_GREEN>; 87 function = LED_FUNCTION_POWER; 88 gpios = <&pio 69 GPIO_ACTIVE_HIGH>; 89 default-state = "on"; 90 }; 91 92 blue_led: led-1 { 93 color = <LED_COLOR_ID_BLUE>; 94 function = LED_FUNCTION_STATUS; 95 gpios = <&pio 86 GPIO_ACTIVE_HIGH>; 96 default-state = "off"; 97 }; 98 }; 99 100 reg_1p8v: regulator-1p8v { 101 compatible = "regulator-fixed"; 102 regulator-name = "1.8vd"; 103 regulator-min-microvolt = <1800000>; 104 regulator-max-microvolt = <1800000>; 105 regulator-boot-on; 106 regulator-always-on; 107 vin-supply = <&dcin>; 108 }; 109 110 reg_3p3v: regulator-3p3v { 111 compatible = "regulator-fixed"; 112 regulator-name = "3.3vd"; 113 regulator-min-microvolt = <3300000>; 114 regulator-max-microvolt = <3300000>; 115 regulator-boot-on; 116 regulator-always-on; 117 vin-supply = <&dcin>; 118 }; 119 120 /* left SFP cage (wan) */ 121 sfp1: sfp-1 { 122 compatible = "sff,sfp"; 123 i2c-bus = <&i2c_sfp1>; 124 los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>; 125 maximum-power-milliwatt = <3000>; 126 mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>; 127 tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>; 128 tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; 129 }; 130 131 /* right SFP cage (lan) */ 132 sfp2: sfp-2 { 133 compatible = "sff,sfp"; 134 i2c-bus = <&i2c_sfp2>; 135 los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>; 136 mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>; 137 maximum-power-milliwatt = <3000>; 138 tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>; 139 tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>; 140 }; 141}; 142 143&cpu_thermal { 144 cooling-maps { 145 map-cpu-active-high { 146 /* active: set fan to cooling level 2 */ 147 cooling-device = <&fan 2 2>; 148 trip = <&cpu_trip_active_high>; 149 }; 150 151 map-cpu-active-med { 152 /* active: set fan to cooling level 1 */ 153 cooling-device = <&fan 1 1>; 154 trip = <&cpu_trip_active_med>; 155 }; 156 157 map-cpu-active-low { 158 /* active: set fan to cooling level 0 */ 159 cooling-device = <&fan 0 0>; 160 trip = <&cpu_trip_active_low>; 161 }; 162 }; 163}; 164 165&crypto { 166 status = "okay"; 167}; 168 169ð { 170 status = "okay"; 171 172 gmac0: mac@0 { 173 compatible = "mediatek,eth-mac"; 174 reg = <0>; 175 phy-mode = "2500base-x"; 176 177 fixed-link { 178 speed = <2500>; 179 full-duplex; 180 pause; 181 }; 182 }; 183 184 gmac1: mac@1 { 185 compatible = "mediatek,eth-mac"; 186 reg = <1>; 187 phy-mode = "2500base-x"; 188 sfp = <&sfp1>; 189 managed = "in-band-status"; 190 }; 191 192 mdio: mdio-bus { 193 #address-cells = <1>; 194 #size-cells = <0>; 195 }; 196}; 197 198&mdio { 199 switch: switch@31 { 200 compatible = "mediatek,mt7531"; 201 reg = <31>; 202 interrupt-controller; 203 interrupt-parent = <&pio>; 204 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; 205 #interrupt-cells = <1>; 206 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; 207 }; 208}; 209 210&mmc0 { 211 pinctrl-names = "default", "state_uhs"; 212 pinctrl-0 = <&mmc0_pins_default>; 213 pinctrl-1 = <&mmc0_pins_uhs>; 214 vmmc-supply = <®_3p3v>; 215 vqmmc-supply = <®_1p8v>; 216}; 217 218&i2c0 { 219 pinctrl-names = "default"; 220 pinctrl-0 = <&i2c_pins>; 221 status = "okay"; 222}; 223 224&pcie { 225 pinctrl-names = "default"; 226 pinctrl-0 = <&pcie_pins>; 227 status = "okay"; 228}; 229 230&pcie_phy { 231 status = "okay"; 232}; 233 234&pio { 235 i2c_pins: i2c-pins { 236 mux { 237 function = "i2c"; 238 groups = "i2c"; 239 }; 240 }; 241 242 mmc0_pins_default: mmc0-pins { 243 mux { 244 function = "emmc"; 245 groups = "emmc_51"; 246 }; 247 conf-cmd-dat { 248 pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", 249 "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", 250 "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; 251 input-enable; 252 drive-strength = <4>; 253 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ 254 }; 255 conf-clk { 256 pins = "EMMC_CK"; 257 drive-strength = <6>; 258 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ 259 }; 260 conf-ds { 261 pins = "EMMC_DSL"; 262 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ 263 }; 264 conf-rst { 265 pins = "EMMC_RSTB"; 266 drive-strength = <4>; 267 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ 268 }; 269 }; 270 271 mmc0_pins_uhs: mmc0-uhs-pins { 272 mux { 273 function = "emmc"; 274 groups = "emmc_51"; 275 }; 276 conf-cmd-dat { 277 pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", 278 "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", 279 "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; 280 input-enable; 281 drive-strength = <4>; 282 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ 283 }; 284 conf-clk { 285 pins = "EMMC_CK"; 286 drive-strength = <6>; 287 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ 288 }; 289 conf-ds { 290 pins = "EMMC_DSL"; 291 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ 292 }; 293 conf-rst { 294 pins = "EMMC_RSTB"; 295 drive-strength = <4>; 296 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ 297 }; 298 }; 299 300 pcie_pins: pcie-pins { 301 mux { 302 function = "pcie"; 303 groups = "pcie_clk", "pcie_pereset"; 304 }; 305 }; 306 307 pwm_pins: pwm-pins { 308 mux { 309 function = "pwm"; 310 groups = "pwm0", "pwm1_0"; 311 }; 312 }; 313 314 spi_flash_pins: spi-flash-pins { 315 mux { 316 function = "spi"; 317 groups = "spi0", "spi0_wp_hold"; 318 }; 319 }; 320 321 spic_pins: spic-pins { 322 mux { 323 function = "spi"; 324 groups = "spi1_0"; 325 }; 326 }; 327 328 uart1_pins: uart1-pins { 329 mux { 330 function = "uart"; 331 groups = "uart1_rx_tx"; 332 }; 333 }; 334 335 uart2_pins: uart2-pins { 336 mux { 337 function = "uart"; 338 groups = "uart2_0_rx_tx"; 339 }; 340 }; 341 342 wf_2g_5g_pins: wf-2g-5g-pins { 343 mux { 344 function = "wifi"; 345 groups = "wf_2g", "wf_5g"; 346 }; 347 conf { 348 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 349 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 350 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 351 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", 352 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", 353 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", 354 "WF1_TOP_CLK", "WF1_TOP_DATA"; 355 drive-strength = <4>; 356 }; 357 }; 358 359 wf_dbdc_pins: wf-dbdc-pins { 360 mux { 361 function = "wifi"; 362 groups = "wf_dbdc"; 363 }; 364 conf { 365 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", 366 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", 367 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", 368 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", 369 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", 370 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", 371 "WF1_TOP_CLK", "WF1_TOP_DATA"; 372 drive-strength = <4>; 373 }; 374 }; 375 376 wf_led_pins: wf-led-pins { 377 mux { 378 function = "led"; 379 groups = "wifi_led"; 380 }; 381 }; 382}; 383 384&pwm { 385 pinctrl-names = "default"; 386 pinctrl-0 = <&pwm_pins>; 387 status = "okay"; 388}; 389 390&spi0 { 391 pinctrl-names = "default"; 392 pinctrl-0 = <&spi_flash_pins>; 393 status = "okay"; 394}; 395 396&spi1 { 397 pinctrl-names = "default"; 398 pinctrl-0 = <&spic_pins>; 399 status = "okay"; 400}; 401 402&ssusb { 403 status = "okay"; 404}; 405 406&switch { 407 ports { 408 #address-cells = <1>; 409 #size-cells = <0>; 410 411 port@0 { 412 reg = <0>; 413 label = "wan"; 414 }; 415 416 port@1 { 417 reg = <1>; 418 label = "lan0"; 419 }; 420 421 port@2 { 422 reg = <2>; 423 label = "lan1"; 424 }; 425 426 port@3 { 427 reg = <3>; 428 label = "lan2"; 429 }; 430 431 port@4 { 432 reg = <4>; 433 label = "lan3"; 434 }; 435 436 port5: port@5 { 437 reg = <5>; 438 label = "lan4"; 439 phy-mode = "2500base-x"; 440 sfp = <&sfp2>; 441 managed = "in-band-status"; 442 }; 443 444 port@6 { 445 reg = <6>; 446 label = "cpu"; 447 ethernet = <&gmac0>; 448 phy-mode = "2500base-x"; 449 450 fixed-link { 451 speed = <2500>; 452 full-duplex; 453 pause; 454 }; 455 }; 456 }; 457}; 458 459&trng { 460 status = "okay"; 461}; 462 463&uart0 { 464 status = "okay"; 465}; 466 467&uart1 { 468 pinctrl-names = "default"; 469 pinctrl-0 = <&uart1_pins>; 470 status = "okay"; 471}; 472 473&uart2 { 474 pinctrl-names = "default"; 475 pinctrl-0 = <&uart2_pins>; 476 status = "okay"; 477}; 478 479&usb_phy { 480 status = "okay"; 481}; 482 483&watchdog { 484 status = "okay"; 485}; 486 487&wifi { 488 status = "okay"; 489 pinctrl-names = "default", "dbdc"; 490 pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>; 491 pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>; 492 493 led { 494 led-active-low; 495 }; 496}; 497 498