xref: /linux/arch/arm64/boot/dts/marvell/cn9131-db.dts (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2019 Marvell International Ltd.
4 *
5 * Device tree for the CN9131-DB board.
6 */
7
8#include "cn9131-db.dtsi"
9
10/ {
11	model = "Marvell Armada CN9131-DB setup A";
12};
13
14/* Setup A has SPI1 flash as a boot device, while setup B uses NAND flash.
15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
16 * simultaneously. When SPI controller is enabled, NAND should be disabled.
17 */
18
19&cp0_spi1 {
20	status = "okay";
21};
22
23