xref: /linux/arch/arm64/boot/dts/marvell/cn9130.dtsi (revision 26fbb4c8c7c3ee9a4c3b4de555a8587b5a19154e)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2019 Marvell International Ltd.
4 *
5 * Device tree for the CN9130 SoC.
6 */
7
8#include "armada-ap807-quad.dtsi"
9
10/ {
11	model = "Marvell Armada CN9130 SoC";
12	compatible = "marvell,cn9130", "marvell,armada-ap807-quad",
13		     "marvell,armada-ap807";
14};
15
16/*
17 * Instantiate the internal CP115
18 */
19
20#define CP11X_NAME		cp0
21#define CP11X_BASE		f2000000
22#define CP11X_PCIEx_MEM_BASE(iface) ((iface == 0) ? 0xc0000000 : \
23						    0xe0000000 + ((iface - 1) * 0x1000000))
24#define CP11X_PCIEx_MEM_SIZE(iface) ((iface == 0) ? 0x1ff00000 : 0xf00000)
25#define CP11X_PCIE0_BASE	f2600000
26#define CP11X_PCIE1_BASE	f2620000
27#define CP11X_PCIE2_BASE	f2640000
28
29#include "armada-cp115.dtsi"
30
31#undef CP11X_NAME
32#undef CP11X_BASE
33#undef CP11X_PCIEx_MEM_BASE
34#undef CP11X_PCIEx_MEM_SIZE
35#undef CP11X_PCIE0_BASE
36#undef CP11X_PCIE1_BASE
37#undef CP11X_PCIE2_BASE
38