xref: /linux/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi (revision 6e7fd890f1d6ac83805409e9c346240de2705584)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
4 *
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8
9/ {
10	model = "SolidRun CN9130 SoM";
11	compatible = "solidrun,cn9130-sr-som", "marvell,cn9130";
12
13	aliases {
14		ethernet0 = &cp0_eth0;
15		ethernet1 = &cp0_eth1;
16		ethernet2 = &cp0_eth2;
17		i2c0 = &cp0_i2c0;
18		mmc0 = &ap_sdhci0;
19		rtc0 = &cp0_rtc;
20	};
21
22	chosen {
23		stdout-path = "serial0:115200n8";
24	};
25
26	v_1_8: regulator-1-8 {
27		compatible = "regulator-fixed";
28		regulator-name = "1v8";
29		regulator-min-microvolt = <1800000>;
30		regulator-max-microvolt = <1800000>;
31	};
32
33	/* requires assembly of R9307 */
34	vhv: regulator-vhv-1-8 {
35		compatible = "regulator-fixed";
36		regulator-name = "vhv-1v8";
37		regulator-min-microvolt = <1800000>;
38		regulator-max-microvolt = <1800000>;
39		pinctrl-0 = <&cp0_reg_vhv_pins>;
40		pinctrl-names = "default";
41		gpios = <&cp0_gpio2 9 GPIO_ACTIVE_HIGH>;
42		enable-active-high;
43	};
44};
45
46&ap_pinctrl {
47	ap_mmc0_pins: ap-mmc0-pins {
48		marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", "mpp4", "mpp5",
49					   "mpp6", "mpp7", "mpp8", "mpp9", "mpp10", "mpp12";
50		marvell,function = "sdio";
51		/*
52		 * mpp12 is emmc reset, function should be sdio (hw_rst),
53		 * but pinctrl-mvebu does not support this.
54		 *
55		 * From pinctrl-mvebu.h:
56		 * "The name will be used to switch to this setting in DT description, e.g.
57		 * marvell,function = "uart2". subname is only for debugging purposes."
58		 */
59	};
60};
61
62&ap_sdhci0 {
63	bus-width = <8>;
64	pinctrl-0 = <&ap_mmc0_pins>;
65	pinctrl-names = "default";
66	vqmmc-supply = <&v_1_8>;
67	status = "okay";
68};
69
70&cp0_ethernet {
71	status = "okay";
72};
73
74/* for assembly with phy */
75&cp0_eth2 {
76	pinctrl-names = "default";
77	pinctrl-0 = <&cp0_eth2_pins>;
78	phy-mode = "rgmii-id";
79	phy = <&cp0_eth2_phy>;
80	status = "okay";
81};
82
83&cp0_i2c0 {
84	pinctrl-names = "default";
85	pinctrl-0 = <&cp0_i2c0_pins>;
86	clock-frequency = <100000>;
87	status = "okay";
88
89	som_eeprom: eeprom@53 {
90		compatible = "atmel,24c02";
91		reg = <0x53>;
92		pagesize = <8>;
93	};
94};
95
96&cp0_mdio {
97	pinctrl-0 = <&cp0_mdio_pins>;
98	status = "okay";
99
100	/* assembly option */
101	cp0_eth2_phy: ethernet-phy@0 {
102		reg = <0>;
103	};
104};
105
106&cp0_spi1 {
107	status = "okay";
108	pinctrl-names = "default";
109	pinctrl-0 = <&cp0_spi1_pins>;
110	/* max speed limited by a mux */
111	spi-max-frequency = <1800000000>;
112
113	flash@0 {
114		compatible = "jedec,spi-nor";
115		reg = <0>;
116		/* read command supports max. 50MHz */
117		spi-max-frequency = <50000000>;
118	};
119};
120
121&cp0_syscon0 {
122	cp0_pinctrl: pinctrl {
123		compatible = "marvell,cp115-standalone-pinctrl";
124
125		cp0_eth2_pins: cp0-ge2-rgmii-pins {
126			marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47",
127				       "mpp48", "mpp49", "mpp50", "mpp51",
128				       "mpp52", "mpp53", "mpp54", "mpp55";
129			/* docs call it "ge2", but cp110-pinctrl "ge1" */
130			marvell,function = "ge1";
131		};
132
133		cp0_i2c0_pins: cp0-i2c0-pins {
134			marvell,pins = "mpp37", "mpp38";
135			marvell,function = "i2c0";
136		};
137
138		cp0_mdio_pins: cp0-mdio-pins {
139			marvell,pins = "mpp40", "mpp41";
140			marvell,function = "ge";
141		};
142
143		cp0_spi1_pins: cp0-spi1-pins {
144			marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
145			marvell,function = "spi1";
146		};
147
148		cp0_reg_vhv_pins: cp0-reg-vhv-pins {
149			marvell,pins = "mpp41";
150			marvell,function = "gpio";
151		};
152	};
153};
154
155/* AP default console */
156&uart0 {
157	pinctrl-0 = <&uart0_pins>;
158	pinctrl-names = "default";
159	status = "okay";
160};
161