xref: /linux/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi (revision 9e56ff53b4115875667760445b028357848b4748) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2023 Marvell International Ltd.
4 *
5 * Device tree for the CN9130-DB Com Express CPU module board.
6 */
7
8#include "cn9130-db.dtsi"
9
10/ {
11	model = "Marvell Armada CN9130-DB COM EXPRESS type 7 CPU module board";
12	compatible = "marvell,cn9130-cpu-module", "marvell,cn9130",
13		     "marvell,armada-ap807-quad", "marvell,armada-ap807";
14
15};
16
17&ap0_reg_sd_vccq {
18	regulator-max-microvolt = <1800000>;
19	states = <1800000 0x1 1800000 0x0>;
20	/delete-property/ gpios;
21};
22
23&cp0_reg_usb3_vbus0 {
24	/delete-property/ gpio;
25};
26
27&cp0_reg_usb3_vbus1 {
28	/delete-property/ gpio;
29};
30
31&cp0_reg_sd_vcc {
32	status = "disabled";
33};
34
35&cp0_reg_sd_vccq {
36	status = "disabled";
37};
38
39&cp0_sdhci0 {
40	status = "disabled";
41};
42
43&cp0_eth0 {
44	status = "disabled";
45};
46
47&cp0_eth1 {
48	status = "okay";
49	phy = <&phy0>;
50	phy-mode = "rgmii-id";
51};
52
53&cp0_eth2 {
54	status = "disabled";
55};
56
57&cp0_mdio {
58	status = "okay";
59	pinctrl-0 = <&cp0_ge_mdio_pins>;
60	phy0: ethernet-phy@0 {
61		status = "okay";
62	};
63};
64
65&cp0_syscon0 {
66	cp0_pinctrl: pinctrl {
67		compatible = "marvell,cp115-standalone-pinctrl";
68
69		cp0_ge_mdio_pins: ge-mdio-pins {
70			marvell,pins = "mpp40", "mpp41";
71			marvell,function = "ge";
72		};
73	};
74};
75
76&cp0_sdhci0 {
77	status = "disabled";
78};
79
80&cp0_spi1 {
81	status = "okay";
82};
83
84&cp0_usb3_0 {
85	status = "okay";
86	usb-phy = <&cp0_usb3_0_phy0>;
87	phy-names = "usb";
88	/delete-property/ phys;
89};
90
91&cp0_usb3_1 {
92	status = "okay";
93	usb-phy = <&cp0_usb3_0_phy1>;
94	phy-names = "usb";
95	/delete-property/ phys;
96};
97