1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (C) 2017 Marvell Technology Group Ltd. 4 * 5 * Device Tree file for Marvell Armada AP810. 6 */ 7 8#include <dt-bindings/interrupt-controller/arm-gic.h> 9 10/dts-v1/; 11 12/ { 13 model = "Marvell Armada AP810"; 14 compatible = "marvell,armada-ap810"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 aliases { 19 serial0 = &uart0_ap0; 20 serial1 = &uart1_ap0; 21 }; 22 23 psci { 24 compatible = "arm,psci-0.2"; 25 method = "smc"; 26 }; 27 28 ap810-ap0 { 29 #address-cells = <2>; 30 #size-cells = <2>; 31 compatible = "simple-bus"; 32 interrupt-parent = <&gic>; 33 ranges; 34 35 config-space@e8000000 { 36 #address-cells = <1>; 37 #size-cells = <1>; 38 compatible = "simple-bus"; 39 ranges = <0x0 0x0 0xe8000000 0x4000000>; 40 interrupt-parent = <&gic>; 41 42 gic: interrupt-controller@3000000 { 43 compatible = "arm,gic-v3"; 44 #interrupt-cells = <3>; 45 #address-cells = <1>; 46 #size-cells = <1>; 47 interrupt-controller; 48 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 49 ranges; 50 51 reg = <0x3000000 0x10000>, /* GICD */ 52 <0x3060000 0x100000>, /* GICR */ 53 <0x00c0000 0x2000>, /* GICC */ 54 <0x00d0000 0x1000>, /* GICH */ 55 <0x00e0000 0x2000>; /* GICV */ 56 57 gic_its_ap0: msi-controller@3040000 { 58 compatible = "arm,gic-v3-its"; 59 msi-controller; 60 #msi-cells = <1>; 61 reg = <0x3040000 0x20000>; 62 }; 63 }; 64 65 timer { 66 compatible = "arm,armv8-timer"; 67 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 68 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 69 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 70 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; 71 }; 72 73 xor@400000 { 74 compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 75 reg = <0x400000 0x1000>, 76 <0x410000 0x1000>; 77 msi-parent = <&gic_its_ap0 0xa0>; 78 dma-coherent; 79 }; 80 81 xor@420000 { 82 compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 83 reg = <0x420000 0x1000>, 84 <0x430000 0x1000>; 85 msi-parent = <&gic_its_ap0 0xa1>; 86 dma-coherent; 87 }; 88 89 xor@440000 { 90 compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 91 reg = <0x440000 0x1000>, 92 <0x450000 0x1000>; 93 msi-parent = <&gic_its_ap0 0xa2>; 94 dma-coherent; 95 }; 96 97 xor@460000 { 98 compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 99 reg = <0x460000 0x1000>, 100 <0x470000 0x1000>; 101 msi-parent = <&gic_its_ap0 0xa3>; 102 dma-coherent; 103 }; 104 105 uart0_ap0: serial@512000 { 106 compatible = "snps,dw-apb-uart"; 107 reg = <0x512000 0x100>; 108 reg-shift = <2>; 109 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 110 reg-io-width = <1>; 111 status = "disabled"; 112 }; 113 114 uart1_ap0: serial@512100 { 115 compatible = "snps,dw-apb-uart"; 116 reg = <0x512100 0x100>; 117 reg-shift = <2>; 118 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 119 reg-io-width = <1>; 120 status = "disabled"; 121 }; 122 }; 123 }; 124}; 125