xref: /linux/arch/arm64/boot/dts/marvell/armada-8040-db.dts (revision fa79e55d467366a2c52c68a261a0d6ea5f8a6534) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2016 Marvell Technology Group Ltd.
4 *
5 * Device Tree file for Marvell Armada 8040 Development board platform
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include "armada-8040.dtsi"
10
11/ {
12	model = "Marvell Armada 8040 DB board";
13	compatible = "marvell,armada8040-db", "marvell,armada8040",
14		     "marvell,armada-ap806-quad", "marvell,armada-ap806";
15
16	chosen {
17		stdout-path = "serial0:115200n8";
18	};
19
20	memory@0 {
21		device_type = "memory";
22		reg = <0x0 0x0 0x0 0x80000000>;
23	};
24
25	aliases {
26		ethernet0 = &cp0_eth0;
27		ethernet1 = &cp0_eth2;
28		ethernet2 = &cp1_eth0;
29		ethernet3 = &cp1_eth1;
30		i2c1 = &cp0_i2c0;
31		i2c2 = &cp1_i2c0;
32	};
33
34	cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
35		compatible = "regulator-fixed";
36		regulator-name = "cp0-usb3h0-vbus";
37		regulator-min-microvolt = <5000000>;
38		regulator-max-microvolt = <5000000>;
39		enable-active-high;
40		gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
41	};
42
43	cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {
44		compatible = "regulator-fixed";
45		regulator-name = "cp0-usb3h1-vbus";
46		regulator-min-microvolt = <5000000>;
47		regulator-max-microvolt = <5000000>;
48		enable-active-high;
49		gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
50	};
51
52	cp0_usb3_0_phy: cp0-usb3-0-phy {
53		compatible = "usb-nop-xceiv";
54		vcc-supply = <&cp0_reg_usb3_0_vbus>;
55	};
56
57	cp1_reg_usb3_0_vbus: cp1-usb3-0-vbus {
58		compatible = "regulator-fixed";
59		regulator-name = "cp1-usb3h0-vbus";
60		regulator-min-microvolt = <5000000>;
61		regulator-max-microvolt = <5000000>;
62		enable-active-high;
63		gpio = <&expander1 0 GPIO_ACTIVE_HIGH>;
64	};
65
66	cp1_usb3_0_phy: cp1-usb3-0-phy {
67		compatible = "usb-nop-xceiv";
68		vcc-supply = <&cp1_reg_usb3_0_vbus>;
69	};
70};
71
72&spi0 {
73	status = "okay";
74
75	flash@0 {
76		compatible = "jedec,spi-nor";
77		reg = <0>;
78		spi-max-frequency = <10000000>;
79
80		partitions {
81			compatible = "fixed-partitions";
82			#address-cells = <1>;
83			#size-cells = <1>;
84
85			partition@0 {
86				label = "U-Boot";
87				reg = <0 0x200000>;
88			};
89			partition@400000 {
90				label = "Filesystem";
91				reg = <0x200000 0xce0000>;
92			};
93		};
94	};
95};
96
97/* Accessible over the mini-USB CON9 connector on the main board */
98&uart0 {
99	status = "okay";
100	pinctrl-0 = <&uart0_pins>;
101	pinctrl-names = "default";
102};
103
104/* CON6 on CP0 expansion */
105&cp0_pcie0 {
106	phys = <&cp0_comphy0 0>;
107	phy-names = "cp0-pcie0-x1-phy";
108	status = "okay";
109};
110
111/* CON5 on CP0 expansion */
112&cp0_pcie2 {
113	phys = <&cp0_comphy5 2>;
114	phy-names = "cp0-pcie2-x1-phy";
115	status = "okay";
116};
117
118&cp0_i2c0 {
119	status = "okay";
120	clock-frequency = <100000>;
121
122	/* U31 */
123	expander0: pca9555@21 {
124		compatible = "nxp,pca9555";
125		gpio-controller;
126		#gpio-cells = <2>;
127		reg = <0x21>;
128	};
129
130	/* U25 */
131	expander1: pca9555@25 {
132		compatible = "nxp,pca9555";
133		gpio-controller;
134		#gpio-cells = <2>;
135		reg = <0x25>;
136	};
137
138};
139
140/* CON4 on CP0 expansion */
141&cp0_sata0 {
142	status = "okay";
143
144	sata-port@0 {
145		phys = <&cp0_comphy1 0>;
146		status = "okay";
147	};
148
149	sata-port@1 {
150		phys = <&cp0_comphy3 1>;
151		status = "okay";
152	};
153};
154
155/* CON9 on CP0 expansion */
156&cp0_utmi {
157	status = "okay";
158};
159
160&cp0_usb3_0 {
161	usb-phy = <&cp0_usb3_0_phy>;
162	phys = <&cp0_utmi0>;
163	phy-names = "utmi";
164	dr_mode = "host";
165	status = "okay";
166};
167
168&cp0_comphy4 {
169	cp0_usbh1_con: connector {
170		compatible = "usb-a-connector";
171		phy-supply = <&cp0_reg_usb3_1_vbus>;
172	};
173};
174
175/* CON10 on CP0 expansion */
176&cp0_usb3_1 {
177	phys = <&cp0_comphy4 1>, <&cp0_utmi1>;
178	phy-names = "usb", "utmi";
179	dr_mode = "host";
180	status = "okay";
181};
182
183&cp0_mdio {
184	status = "okay";
185
186	phy1: ethernet-phy@1 {
187		reg = <1>;
188	};
189};
190
191&cp0_ethernet {
192	status = "okay";
193};
194
195&cp0_eth0 {
196	status = "okay";
197	phy-mode = "10gbase-r";
198
199	fixed-link {
200		speed = <10000>;
201		full-duplex;
202	};
203};
204
205&cp0_eth2 {
206	status = "okay";
207	phy = <&phy1>;
208	phy-mode = "rgmii-id";
209};
210
211/* CON6 on CP1 expansion */
212&cp1_pcie0 {
213	phys = <&cp1_comphy0 0>;
214	phy-names = "cp1-pcie0-x1-phy";
215	status = "okay";
216};
217
218/* CON7 on CP1 expansion */
219&cp1_pcie1 {
220	phys = <&cp1_comphy4 1>;
221	phy-names = "cp1-pcie1-x1-phy";
222	status = "okay";
223};
224
225/* CON5 on CP1 expansion */
226&cp1_pcie2 {
227	phys = <&cp1_comphy5 2>;
228	phy-names = "cp1-pcie2-x1-phy";
229	status = "okay";
230};
231
232&cp1_i2c0 {
233	status = "okay";
234	clock-frequency = <100000>;
235};
236
237&cp1_spi1 {
238	status = "okay";
239
240	flash@0 {
241		compatible = "jedec,spi-nor";
242		reg = <0x0>;
243		spi-max-frequency = <20000000>;
244
245		partitions {
246			compatible = "fixed-partitions";
247			#address-cells = <1>;
248			#size-cells = <1>;
249
250			partition@0 {
251				label = "Boot";
252				reg = <0x0 0x200000>;
253			};
254			partition@200000 {
255				label = "Filesystem";
256				reg = <0x200000 0xd00000>;
257			};
258			partition@f00000 {
259				label = "Boot_2nd";
260				reg = <0xf00000 0x100000>;
261			};
262		};
263	};
264};
265
266/*
267 * Proper NAND usage will require DPR-76 to be in position 1-2, which disables
268 * MDIO signal of CP1.
269 */
270&cp1_nand_controller {
271	pinctrl-0 = <&nand_pins>, <&nand_rb>;
272	pinctrl-names = "default";
273
274	nand@0 {
275		reg = <0>;
276		nand-rb = <0>;
277		nand-on-flash-bbt;
278		nand-ecc-strength = <4>;
279		nand-ecc-step-size = <512>;
280
281		partitions {
282			compatible = "fixed-partitions";
283			#address-cells = <1>;
284			#size-cells = <1>;
285
286			partition@0 {
287				label = "U-Boot";
288				reg = <0 0x200000>;
289			};
290			partition@200000 {
291				label = "Linux";
292				reg = <0x200000 0xe00000>;
293			};
294			partition@1000000 {
295				label = "Filesystem";
296				reg = <0x1000000 0x3f000000>;
297			};
298		};
299	};
300};
301
302/* CON4 on CP1 expansion */
303&cp1_sata0 {
304	status = "okay";
305
306	sata-port@0 {
307		phys = <&cp1_comphy1 0>;
308	};
309	sata-port@1 {
310		phys = <&cp1_comphy3 1>;
311	};
312};
313
314&cp1_utmi {
315	status = "okay";
316};
317
318/* CON9 on CP1 expansion */
319&cp1_usb3_0 {
320	usb-phy = <&cp1_usb3_0_phy>;
321	phys = <&cp1_utmi0>;
322	phy-names = "utmi";
323	dr_mode = "host";
324	status = "okay";
325};
326
327/* CON10 on CP1 expansion */
328&cp1_usb3_1 {
329	phys = <&cp1_utmi1>;
330	phy-names = "utmi";
331	status = "okay";
332};
333
334&cp1_mdio {
335	status = "okay";
336
337	phy0: ethernet-phy@0 {
338		reg = <0>;
339	};
340};
341
342&cp1_ethernet {
343	status = "okay";
344};
345
346&cp1_eth0 {
347	status = "okay";
348	phy-mode = "10gbase-r";
349
350	fixed-link {
351		speed = <10000>;
352		full-duplex;
353	};
354};
355
356&cp1_eth1 {
357	status = "okay";
358	phy = <&phy0>;
359	phy-mode = "rgmii-id";
360};
361
362&ap_sdhci0 {
363	status = "okay";
364	bus-width = <4>;
365	non-removable;
366};
367
368&cp0_sdhci0 {
369	status = "okay";
370	bus-width = <8>;
371	non-removable;
372};
373