xref: /linux/arch/arm64/boot/dts/marvell/armada-8040-db.dts (revision 26bda0dff9ca74ae071643e0176f248d72f43580) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2016 Marvell Technology Group Ltd.
4 *
5 * Device Tree file for Marvell Armada 8040 Development board platform
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include "armada-8040.dtsi"
10
11/ {
12	model = "Marvell Armada 8040 DB board";
13	compatible = "marvell,armada8040-db", "marvell,armada8040",
14		     "marvell,armada-ap806-quad", "marvell,armada-ap806";
15
16	chosen {
17		stdout-path = "serial0:115200n8";
18	};
19
20	memory@0 {
21		device_type = "memory";
22		reg = <0x0 0x0 0x0 0x80000000>;
23	};
24
25	aliases {
26		ethernet0 = &cp0_eth0;
27		ethernet1 = &cp0_eth2;
28		ethernet2 = &cp1_eth0;
29		ethernet3 = &cp1_eth1;
30		i2c1 = &cp0_i2c0;
31		i2c2 = &cp1_i2c0;
32	};
33
34	cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
35		compatible = "regulator-fixed";
36		regulator-name = "cp0-usb3h0-vbus";
37		regulator-min-microvolt = <5000000>;
38		regulator-max-microvolt = <5000000>;
39		enable-active-high;
40		gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
41	};
42
43	cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {
44		compatible = "regulator-fixed";
45		regulator-name = "cp0-usb3h1-vbus";
46		regulator-min-microvolt = <5000000>;
47		regulator-max-microvolt = <5000000>;
48		enable-active-high;
49		gpio = <&expander0 1 GPIO_ACTIVE_HIGH>;
50	};
51
52	cp0_usb3_0_phy: cp0-usb3-0-phy {
53		compatible = "usb-nop-xceiv";
54		vcc-supply = <&cp0_reg_usb3_0_vbus>;
55	};
56
57	cp1_reg_usb3_0_vbus: cp1-usb3-0-vbus {
58		compatible = "regulator-fixed";
59		regulator-name = "cp1-usb3h0-vbus";
60		regulator-min-microvolt = <5000000>;
61		regulator-max-microvolt = <5000000>;
62		enable-active-high;
63		gpio = <&expander1 0 GPIO_ACTIVE_HIGH>;
64	};
65
66	cp1_usb3_0_phy: cp1-usb3-0-phy {
67		compatible = "usb-nop-xceiv";
68		vcc-supply = <&cp1_reg_usb3_0_vbus>;
69	};
70};
71
72&spi0 {
73	status = "okay";
74
75	flash@0 {
76		compatible = "jedec,spi-nor";
77		reg = <0>;
78		spi-max-frequency = <10000000>;
79
80		partitions {
81			compatible = "fixed-partitions";
82			#address-cells = <1>;
83			#size-cells = <1>;
84
85			partition@0 {
86				label = "U-Boot";
87				reg = <0 0x200000>;
88			};
89			partition@400000 {
90				label = "Filesystem";
91				reg = <0x200000 0xce0000>;
92			};
93		};
94	};
95};
96
97/* Accessible over the mini-USB CON9 connector on the main board */
98&uart0 {
99	status = "okay";
100	pinctrl-0 = <&uart0_pins>;
101	pinctrl-names = "default";
102};
103
104/* CON6 on CP0 expansion */
105&cp0_pcie0 {
106	phys = <&cp0_comphy0 0>;
107	phy-names = "cp0-pcie0-x1-phy";
108	status = "okay";
109};
110
111/* CON5 on CP0 expansion */
112&cp0_pcie2 {
113	phys = <&cp0_comphy5 2>;
114	phy-names = "cp0-pcie2-x1-phy";
115	status = "okay";
116};
117
118&cp0_i2c0 {
119	status = "okay";
120	clock-frequency = <100000>;
121
122	/* U31 */
123	expander0: pca9555@21 {
124		compatible = "nxp,pca9555";
125		pinctrl-names = "default";
126		gpio-controller;
127		#gpio-cells = <2>;
128		reg = <0x21>;
129	};
130
131	/* U25 */
132	expander1: pca9555@25 {
133		compatible = "nxp,pca9555";
134		pinctrl-names = "default";
135		gpio-controller;
136		#gpio-cells = <2>;
137		reg = <0x25>;
138	};
139
140};
141
142/* CON4 on CP0 expansion */
143&cp0_sata0 {
144	status = "okay";
145
146	sata-port@0 {
147		phys = <&cp0_comphy1 0>;
148	};
149	sata-port@1 {
150		phys = <&cp0_comphy3 1>;
151	};
152};
153
154/* CON9 on CP0 expansion */
155&cp0_utmi {
156	status = "okay";
157};
158
159&cp0_usb3_0 {
160	usb-phy = <&cp0_usb3_0_phy>;
161	phys = <&cp0_utmi0>;
162	phy-names = "utmi";
163	dr_mode = "host";
164	status = "okay";
165};
166
167&cp0_comphy4 {
168	cp0_usbh1_con: connector {
169		compatible = "usb-a-connector";
170		phy-supply = <&cp0_reg_usb3_1_vbus>;
171	};
172};
173
174/* CON10 on CP0 expansion */
175&cp0_usb3_1 {
176	phys = <&cp0_comphy4 1>, <&cp0_utmi1>;
177	phy-names = "usb", "utmi";
178	dr_mode = "host";
179	status = "okay";
180};
181
182&cp0_mdio {
183	status = "okay";
184
185	phy1: ethernet-phy@1 {
186		reg = <1>;
187	};
188};
189
190&cp0_ethernet {
191	status = "okay";
192};
193
194&cp0_eth0 {
195	status = "okay";
196	phy-mode = "10gbase-r";
197
198	fixed-link {
199		speed = <10000>;
200		full-duplex;
201	};
202};
203
204&cp0_eth2 {
205	status = "okay";
206	phy = <&phy1>;
207	phy-mode = "rgmii-id";
208};
209
210/* CON6 on CP1 expansion */
211&cp1_pcie0 {
212	phys = <&cp1_comphy0 0>;
213	phy-names = "cp1-pcie0-x1-phy";
214	status = "okay";
215};
216
217/* CON7 on CP1 expansion */
218&cp1_pcie1 {
219	phys = <&cp1_comphy4 1>;
220	phy-names = "cp1-pcie1-x1-phy";
221	status = "okay";
222};
223
224/* CON5 on CP1 expansion */
225&cp1_pcie2 {
226	phys = <&cp1_comphy5 2>;
227	phy-names = "cp1-pcie2-x1-phy";
228	status = "okay";
229};
230
231&cp1_i2c0 {
232	status = "okay";
233	clock-frequency = <100000>;
234};
235
236&cp1_spi1 {
237	status = "okay";
238
239	flash@0 {
240		compatible = "jedec,spi-nor";
241		reg = <0x0>;
242		spi-max-frequency = <20000000>;
243
244		partitions {
245			compatible = "fixed-partitions";
246			#address-cells = <1>;
247			#size-cells = <1>;
248
249			partition@0 {
250				label = "Boot";
251				reg = <0x0 0x200000>;
252			};
253			partition@200000 {
254				label = "Filesystem";
255				reg = <0x200000 0xd00000>;
256			};
257			partition@f00000 {
258				label = "Boot_2nd";
259				reg = <0xf00000 0x100000>;
260			};
261		};
262	};
263};
264
265/*
266 * Proper NAND usage will require DPR-76 to be in position 1-2, which disables
267 * MDIO signal of CP1.
268 */
269&cp1_nand_controller {
270	pinctrl-0 = <&nand_pins>, <&nand_rb>;
271	pinctrl-names = "default";
272
273	nand@0 {
274		reg = <0>;
275		nand-rb = <0>;
276		nand-on-flash-bbt;
277		nand-ecc-strength = <4>;
278		nand-ecc-step-size = <512>;
279
280		partitions {
281			compatible = "fixed-partitions";
282			#address-cells = <1>;
283			#size-cells = <1>;
284
285			partition@0 {
286				label = "U-Boot";
287				reg = <0 0x200000>;
288			};
289			partition@200000 {
290				label = "Linux";
291				reg = <0x200000 0xe00000>;
292			};
293			partition@1000000 {
294				label = "Filesystem";
295				reg = <0x1000000 0x3f000000>;
296			};
297		};
298	};
299};
300
301/* CON4 on CP1 expansion */
302&cp1_sata0 {
303	status = "okay";
304
305	sata-port@0 {
306		phys = <&cp1_comphy1 0>;
307		phy-names = "cp1-sata0-0-phy";
308	};
309	sata-port@1 {
310		phys = <&cp1_comphy3 1>;
311		phy-names = "cp1-sata0-1-phy";
312	};
313};
314
315&cp1_utmi {
316	status = "okay";
317};
318
319/* CON9 on CP1 expansion */
320&cp1_usb3_0 {
321	usb-phy = <&cp1_usb3_0_phy>;
322	phys = <&cp1_utmi0>;
323	phy-names = "utmi";
324	dr_mode = "host";
325	status = "okay";
326};
327
328/* CON10 on CP1 expansion */
329&cp1_usb3_1 {
330	phys = <&cp1_utmi1>;
331	phy-names = "utmi";
332	status = "okay";
333};
334
335&cp1_mdio {
336	status = "okay";
337
338	phy0: ethernet-phy@0 {
339		reg = <0>;
340	};
341};
342
343&cp1_ethernet {
344	status = "okay";
345};
346
347&cp1_eth0 {
348	status = "okay";
349	phy-mode = "10gbase-r";
350
351	fixed-link {
352		speed = <10000>;
353		full-duplex;
354	};
355};
356
357&cp1_eth1 {
358	status = "okay";
359	phy = <&phy0>;
360	phy-mode = "rgmii-id";
361};
362
363&ap_sdhci0 {
364	status = "okay";
365	bus-width = <4>;
366	non-removable;
367};
368
369&cp0_sdhci0 {
370	status = "okay";
371	bus-width = <8>;
372	non-removable;
373};
374