xref: /linux/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts (revision 06d07429858317ded2db7986113a9e0129cd599b)
173792919SRobert Marko// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
273792919SRobert Marko/*
373792919SRobert Marko * Device Tree file for Globalscale MOCHAbin
473792919SRobert Marko * Copyright (C) 2019 Globalscale technologies, Inc.
573792919SRobert Marko * Copyright (C) 2021 Sartura Ltd.
673792919SRobert Marko *
773792919SRobert Marko */
873792919SRobert Marko
973792919SRobert Marko/dts-v1/;
1073792919SRobert Marko
1173792919SRobert Marko#include <dt-bindings/gpio/gpio.h>
1273792919SRobert Marko#include "armada-7040.dtsi"
1373792919SRobert Marko
1473792919SRobert Marko/ {
1573792919SRobert Marko	model = "Globalscale MOCHAbin";
1673792919SRobert Marko	compatible = "globalscale,mochabin", "marvell,armada7040",
1773792919SRobert Marko		     "marvell,armada-ap806-quad", "marvell,armada-ap806";
1873792919SRobert Marko
1973792919SRobert Marko	chosen {
2073792919SRobert Marko		stdout-path = "serial0:115200n8";
2173792919SRobert Marko	};
2273792919SRobert Marko
2373792919SRobert Marko	aliases {
2473792919SRobert Marko		ethernet0 = &cp0_eth0;
2573792919SRobert Marko		ethernet1 = &cp0_eth1;
2673792919SRobert Marko		ethernet2 = &cp0_eth2;
2773792919SRobert Marko		ethernet3 = &swport1;
2873792919SRobert Marko		ethernet4 = &swport2;
2973792919SRobert Marko		ethernet5 = &swport3;
3073792919SRobert Marko		ethernet6 = &swport4;
3173792919SRobert Marko	};
3273792919SRobert Marko
3373792919SRobert Marko	/* SFP+ 10G */
3473792919SRobert Marko	sfp_eth0: sfp-eth0 {
3573792919SRobert Marko		compatible = "sff,sfp";
3673792919SRobert Marko		i2c-bus = <&cp0_i2c1>;
374ce223e5SIoana Ciornei		los-gpios = <&sfp_gpio 3 GPIO_ACTIVE_HIGH>;
384ce223e5SIoana Ciornei		mod-def0-gpios = <&sfp_gpio 2 GPIO_ACTIVE_LOW>;
394ce223e5SIoana Ciornei		tx-disable-gpios = <&sfp_gpio 1 GPIO_ACTIVE_HIGH>;
404ce223e5SIoana Ciornei		tx-fault-gpios = <&sfp_gpio 0 GPIO_ACTIVE_HIGH>;
4173792919SRobert Marko	};
4273792919SRobert Marko
4373792919SRobert Marko	/* SFP 1G */
4473792919SRobert Marko	sfp_eth2: sfp-eth2 {
4573792919SRobert Marko		compatible = "sff,sfp";
4673792919SRobert Marko		i2c-bus = <&cp0_i2c0>;
474ce223e5SIoana Ciornei		los-gpios = <&sfp_gpio 7 GPIO_ACTIVE_HIGH>;
484ce223e5SIoana Ciornei		mod-def0-gpios = <&sfp_gpio 6 GPIO_ACTIVE_LOW>;
494ce223e5SIoana Ciornei		tx-disable-gpios = <&sfp_gpio 5 GPIO_ACTIVE_HIGH>;
504ce223e5SIoana Ciornei		tx-fault-gpios = <&sfp_gpio 4 GPIO_ACTIVE_HIGH>;
5173792919SRobert Marko	};
5273792919SRobert Marko};
5373792919SRobert Marko
5473792919SRobert Marko/* microUSB UART console */
5573792919SRobert Marko&uart0 {
5673792919SRobert Marko	status = "okay";
5773792919SRobert Marko
5873792919SRobert Marko	pinctrl-0 = <&uart0_pins>;
5973792919SRobert Marko	pinctrl-names = "default";
6073792919SRobert Marko};
6173792919SRobert Marko
6273792919SRobert Marko/* eMMC */
6373792919SRobert Marko&ap_sdhci0 {
6473792919SRobert Marko	status = "okay";
6573792919SRobert Marko
6673792919SRobert Marko	bus-width = <4>;
6773792919SRobert Marko	non-removable;
6873792919SRobert Marko	/delete-property/ marvell,xenon-phy-slow-mode;
6973792919SRobert Marko	no-1-8-v;
7073792919SRobert Marko};
7173792919SRobert Marko
7273792919SRobert Marko&cp0_pinctrl {
7373792919SRobert Marko	cp0_uart0_pins: cp0-uart0-pins {
7473792919SRobert Marko		marvell,pins = "mpp6", "mpp7";
7573792919SRobert Marko		marvell,function = "uart0";
7673792919SRobert Marko	};
7773792919SRobert Marko
7873792919SRobert Marko	cp0_spi0_pins: cp0-spi0-pins {
7973792919SRobert Marko		marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59";
8073792919SRobert Marko		marvell,function = "spi0";
8173792919SRobert Marko	};
8273792919SRobert Marko
8373792919SRobert Marko	cp0_spi1_pins: cp0-spi1-pins {
8473792919SRobert Marko		marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
8573792919SRobert Marko		marvell,function = "spi1";
8673792919SRobert Marko	};
8773792919SRobert Marko
8873792919SRobert Marko	cp0_i2c0_pins: cp0-i2c0-pins {
8973792919SRobert Marko		marvell,pins = "mpp37", "mpp38";
9073792919SRobert Marko		marvell,function = "i2c0";
9173792919SRobert Marko	};
9273792919SRobert Marko
9373792919SRobert Marko	cp0_i2c1_pins: cp0-i2c1-pins {
9473792919SRobert Marko		marvell,pins = "mpp2", "mpp3";
9573792919SRobert Marko		marvell,function = "i2c1";
9673792919SRobert Marko	};
9773792919SRobert Marko
9873792919SRobert Marko	pca9554_int_pins: pca9554-int-pins {
9973792919SRobert Marko		marvell,pins = "mpp27";
10073792919SRobert Marko		marvell,function = "gpio";
10173792919SRobert Marko	};
10273792919SRobert Marko
10373792919SRobert Marko	cp0_rgmii1_pins: cp0-rgmii1-pins {
10473792919SRobert Marko		marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47", "mpp48", "mpp49",
10573792919SRobert Marko			       "mpp50", "mpp51", "mpp52", "mpp53", "mpp54", "mpp55";
10673792919SRobert Marko		marvell,function = "ge1";
10773792919SRobert Marko	};
10873792919SRobert Marko
10973792919SRobert Marko	is31_sdb_pins: is31-sdb-pins {
11073792919SRobert Marko		marvell,pins = "mpp30";
11173792919SRobert Marko		marvell,function = "gpio";
11273792919SRobert Marko	};
11373792919SRobert Marko
11473792919SRobert Marko	cp0_pcie_reset_pins: cp0-pcie-reset-pins {
11573792919SRobert Marko		marvell,pins = "mpp9";
11673792919SRobert Marko		marvell,function = "gpio";
11773792919SRobert Marko	};
11873792919SRobert Marko
11973792919SRobert Marko	cp0_pcie_clkreq_pins: cp0-pcie-clkreq-pins {
12073792919SRobert Marko		marvell,pins = "mpp5";
12173792919SRobert Marko		marvell,function = "pcie1";
12273792919SRobert Marko	};
12373792919SRobert Marko
12473792919SRobert Marko	cp0_switch_pins: cp0-switch-pins {
12573792919SRobert Marko		marvell,pins = "mpp0", "mpp1";
12673792919SRobert Marko		marvell,function = "gpio";
12773792919SRobert Marko	};
12873792919SRobert Marko
12973792919SRobert Marko	cp0_phy_pins: cp0-phy-pins {
13073792919SRobert Marko		marvell,pins = "mpp12";
13173792919SRobert Marko		marvell,function = "gpio";
13273792919SRobert Marko	};
13373792919SRobert Marko};
13473792919SRobert Marko
13573792919SRobert Marko/* mikroBUS UART */
13673792919SRobert Marko&cp0_uart0 {
13773792919SRobert Marko	status = "okay";
13873792919SRobert Marko
13973792919SRobert Marko	pinctrl-names = "default";
14073792919SRobert Marko	pinctrl-0 = <&cp0_uart0_pins>;
14173792919SRobert Marko};
14273792919SRobert Marko
14373792919SRobert Marko/* mikroBUS SPI */
14473792919SRobert Marko&cp0_spi0 {
14573792919SRobert Marko	status = "okay";
14673792919SRobert Marko
14773792919SRobert Marko	pinctrl-names = "default";
14873792919SRobert Marko	pinctrl-0 = <&cp0_spi0_pins>;
14973792919SRobert Marko};
15073792919SRobert Marko
15173792919SRobert Marko/* SPI-NOR */
15273792919SRobert Marko&cp0_spi1 {
15373792919SRobert Marko	status = "okay";
15473792919SRobert Marko
15573792919SRobert Marko	pinctrl-names = "default";
15673792919SRobert Marko	pinctrl-0 = <&cp0_spi1_pins>;
15773792919SRobert Marko
1582f00bb4aSKrzysztof Kozlowski	flash@0 {
15973792919SRobert Marko		#address-cells = <1>;
16073792919SRobert Marko		#size-cells = <1>;
16173792919SRobert Marko		compatible = "jedec,spi-nor";
16273792919SRobert Marko		reg = <0>;
16373792919SRobert Marko		spi-max-frequency = <20000000>;
16473792919SRobert Marko
16573792919SRobert Marko		partitions {
16673792919SRobert Marko			compatible = "fixed-partitions";
16773792919SRobert Marko			#address-cells = <1>;
16873792919SRobert Marko			#size-cells = <1>;
16973792919SRobert Marko
17073792919SRobert Marko			partition@0 {
17173792919SRobert Marko				label = "firmware";
17273792919SRobert Marko				reg = <0x0 0x3e0000>;
17373792919SRobert Marko				read-only;
17473792919SRobert Marko			};
17573792919SRobert Marko
17673792919SRobert Marko			partition@3e0000 {
17773792919SRobert Marko				label = "hw-info";
17873792919SRobert Marko				reg = <0x3e0000 0x10000>;
17973792919SRobert Marko				read-only;
18073792919SRobert Marko			};
18173792919SRobert Marko
18273792919SRobert Marko			partition@3f0000 {
18373792919SRobert Marko				label = "u-boot-env";
18473792919SRobert Marko				reg = <0x3f0000 0x10000>;
18573792919SRobert Marko			};
18673792919SRobert Marko		};
18773792919SRobert Marko	};
18873792919SRobert Marko};
18973792919SRobert Marko
19073792919SRobert Marko/* mikroBUS, 1G SFP and GPIO expander */
19173792919SRobert Marko&cp0_i2c0 {
19273792919SRobert Marko	status = "okay";
19373792919SRobert Marko
19473792919SRobert Marko	pinctrl-names = "default";
19573792919SRobert Marko	pinctrl-0 = <&cp0_i2c0_pins>;
19673792919SRobert Marko	clock-frequency = <100000>;
19773792919SRobert Marko
19873792919SRobert Marko	sfp_gpio: pca9554@39 {
19973792919SRobert Marko		compatible = "nxp,pca9554";
20073792919SRobert Marko		pinctrl-names = "default";
20173792919SRobert Marko		pinctrl-0 = <&pca9554_int_pins>;
20273792919SRobert Marko		reg = <0x39>;
20373792919SRobert Marko
20473792919SRobert Marko		interrupt-parent = <&cp0_gpio1>;
20573792919SRobert Marko		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
20673792919SRobert Marko		interrupt-controller;
20773792919SRobert Marko		#interrupt-cells = <2>;
20873792919SRobert Marko
20973792919SRobert Marko		gpio-controller;
21073792919SRobert Marko		#gpio-cells = <2>;
21173792919SRobert Marko
21273792919SRobert Marko		/*
21373792919SRobert Marko		 * IO0_0: SFP+_TX_FAULT
21473792919SRobert Marko		 * IO0_1: SFP+_TX_DISABLE
21573792919SRobert Marko		 * IO0_2: SFP+_PRSNT
21673792919SRobert Marko		 * IO0_3: SFP+_LOSS
21773792919SRobert Marko		 * IO0_4: SFP_TX_FAULT
21873792919SRobert Marko		 * IO0_5: SFP_TX_DISABLE
21973792919SRobert Marko		 * IO0_6: SFP_PRSNT
22073792919SRobert Marko		 * IO0_7: SFP_LOSS
22173792919SRobert Marko		 */
22273792919SRobert Marko	};
22373792919SRobert Marko};
22473792919SRobert Marko
22573792919SRobert Marko/* IS31FL3199, mini-PCIe and 10G SFP+ */
22673792919SRobert Marko&cp0_i2c1 {
22773792919SRobert Marko	status = "okay";
22873792919SRobert Marko
22973792919SRobert Marko	pinctrl-names = "default";
23073792919SRobert Marko	pinctrl-0 = <&cp0_i2c1_pins>;
23173792919SRobert Marko	clock-frequency = <100000>;
23273792919SRobert Marko
23373792919SRobert Marko	leds@64 {
23473792919SRobert Marko		compatible = "issi,is31fl3199";
23573792919SRobert Marko		#address-cells = <1>;
23673792919SRobert Marko		#size-cells = <0>;
23773792919SRobert Marko		pinctrl-names = "default";
23873792919SRobert Marko		pinctrl-0 = <&is31_sdb_pins>;
23973792919SRobert Marko		shutdown-gpios = <&cp0_gpio1 30 GPIO_ACTIVE_HIGH>;
24073792919SRobert Marko		reg = <0x64>;
24173792919SRobert Marko
24273792919SRobert Marko		led1_red: led@1 {
24373792919SRobert Marko			label = "red:led1";
24473792919SRobert Marko			reg = <1>;
24573792919SRobert Marko			led-max-microamp = <20000>;
24673792919SRobert Marko		};
24773792919SRobert Marko
24873792919SRobert Marko		led1_green: led@2 {
24973792919SRobert Marko			label = "green:led1";
25073792919SRobert Marko			reg = <2>;
25173792919SRobert Marko		};
25273792919SRobert Marko
25373792919SRobert Marko		led1_blue: led@3 {
25473792919SRobert Marko			label = "blue:led1";
25573792919SRobert Marko			reg = <3>;
25673792919SRobert Marko		};
25773792919SRobert Marko
25873792919SRobert Marko		led2_red: led@4 {
25973792919SRobert Marko			label = "red:led2";
26073792919SRobert Marko			reg = <4>;
26173792919SRobert Marko		};
26273792919SRobert Marko
26373792919SRobert Marko		led2_green: led@5 {
26473792919SRobert Marko			label = "green:led2";
26573792919SRobert Marko			reg = <5>;
26673792919SRobert Marko		};
26773792919SRobert Marko
26873792919SRobert Marko		led2_blue: led@6 {
26973792919SRobert Marko			label = "blue:led2";
27073792919SRobert Marko			reg = <6>;
27173792919SRobert Marko		};
27273792919SRobert Marko
27373792919SRobert Marko		led3_red: led@7 {
27473792919SRobert Marko			label = "red:led3";
27573792919SRobert Marko			reg = <7>;
27673792919SRobert Marko		};
27773792919SRobert Marko
27873792919SRobert Marko		led3_green: led@8 {
27973792919SRobert Marko			label = "green:led3";
28073792919SRobert Marko			reg = <8>;
28173792919SRobert Marko		};
28273792919SRobert Marko
28373792919SRobert Marko		led3_blue: led@9 {
28473792919SRobert Marko			label = "blue:led3";
28573792919SRobert Marko			reg = <9>;
28673792919SRobert Marko		};
28773792919SRobert Marko	};
28873792919SRobert Marko};
28973792919SRobert Marko
29073792919SRobert Marko&cp0_mdio {
29173792919SRobert Marko	status = "okay";
29273792919SRobert Marko
29373792919SRobert Marko	/* 88E1512 PHY */
29473792919SRobert Marko	eth2phy: ethernet-phy@1 {
29573792919SRobert Marko		reg = <1>;
29673792919SRobert Marko		sfp = <&sfp_eth2>;
29773792919SRobert Marko
29873792919SRobert Marko		pinctrl-names = "default";
29973792919SRobert Marko		pinctrl-0 = <&cp0_phy_pins>;
30073792919SRobert Marko		reset-gpios = <&cp0_gpio1 12 GPIO_ACTIVE_LOW>;
30173792919SRobert Marko	};
30273792919SRobert Marko
30373792919SRobert Marko	/* 88E6141 Topaz switch */
304*fedb923aSLinus Walleij	switch: ethernet-switch@3 {
30573792919SRobert Marko		compatible = "marvell,mv88e6085";
30673792919SRobert Marko		reg = <3>;
30773792919SRobert Marko
30873792919SRobert Marko		pinctrl-names = "default";
30973792919SRobert Marko		pinctrl-0 = <&cp0_switch_pins>;
31073792919SRobert Marko		reset-gpios = <&cp0_gpio1 0 GPIO_ACTIVE_LOW>;
31173792919SRobert Marko
31273792919SRobert Marko		interrupt-parent = <&cp0_gpio1>;
31373792919SRobert Marko		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
31473792919SRobert Marko
315*fedb923aSLinus Walleij		ethernet-ports {
31673792919SRobert Marko			#address-cells = <1>;
31773792919SRobert Marko			#size-cells = <0>;
31873792919SRobert Marko
319*fedb923aSLinus Walleij			swport1: ethernet-port@1 {
32073792919SRobert Marko				reg = <1>;
32173792919SRobert Marko				label = "lan0";
32273792919SRobert Marko				phy-handle = <&swphy1>;
32373792919SRobert Marko			};
32473792919SRobert Marko
325*fedb923aSLinus Walleij			swport2: ethernet-port@2 {
32673792919SRobert Marko				reg = <2>;
32773792919SRobert Marko				label = "lan1";
32873792919SRobert Marko				phy-handle = <&swphy2>;
32973792919SRobert Marko			};
33073792919SRobert Marko
331*fedb923aSLinus Walleij			swport3: ethernet-port@3 {
33273792919SRobert Marko				reg = <3>;
33373792919SRobert Marko				label = "lan2";
33473792919SRobert Marko				phy-handle = <&swphy3>;
33573792919SRobert Marko			};
33673792919SRobert Marko
337*fedb923aSLinus Walleij			swport4: ethernet-port@4 {
33873792919SRobert Marko				reg = <4>;
33973792919SRobert Marko				label = "lan3";
34073792919SRobert Marko				phy-handle = <&swphy4>;
34173792919SRobert Marko			};
34273792919SRobert Marko
343*fedb923aSLinus Walleij			ethernet-port@5 {
34473792919SRobert Marko				reg = <5>;
34573792919SRobert Marko				label = "cpu";
34673792919SRobert Marko				ethernet = <&cp0_eth1>;
34773792919SRobert Marko				phy-mode = "2500base-x";
34873792919SRobert Marko				managed = "in-band-status";
34973792919SRobert Marko			};
35073792919SRobert Marko		};
35173792919SRobert Marko
35273792919SRobert Marko		mdio {
35373792919SRobert Marko			#address-cells = <1>;
35473792919SRobert Marko			#size-cells = <0>;
35573792919SRobert Marko
356*fedb923aSLinus Walleij			swphy1: ethernet-phy@17 {
35773792919SRobert Marko				reg = <17>;
35873792919SRobert Marko			};
35973792919SRobert Marko
360*fedb923aSLinus Walleij			swphy2: ethernet-phy@18 {
36173792919SRobert Marko				reg = <18>;
36273792919SRobert Marko			};
36373792919SRobert Marko
364*fedb923aSLinus Walleij			swphy3: ethernet-phy@19 {
36573792919SRobert Marko				reg = <19>;
36673792919SRobert Marko			};
36773792919SRobert Marko
368*fedb923aSLinus Walleij			swphy4: ethernet-phy@20 {
36973792919SRobert Marko				reg = <20>;
37073792919SRobert Marko			};
37173792919SRobert Marko		};
37273792919SRobert Marko	};
37373792919SRobert Marko};
37473792919SRobert Marko
37573792919SRobert Marko&cp0_ethernet {
37673792919SRobert Marko	status = "okay";
37773792919SRobert Marko};
37873792919SRobert Marko
37973792919SRobert Marko/* 10G SFP+ */
38073792919SRobert Marko&cp0_eth0 {
38173792919SRobert Marko	status = "okay";
38273792919SRobert Marko
38373792919SRobert Marko	phy-mode = "10gbase-r";
38473792919SRobert Marko	phys = <&cp0_comphy4 0>;
38573792919SRobert Marko	managed = "in-band-status";
38673792919SRobert Marko	sfp = <&sfp_eth0>;
38773792919SRobert Marko};
38873792919SRobert Marko
38973792919SRobert Marko/* Topaz switch uplink */
39073792919SRobert Marko&cp0_eth1 {
39173792919SRobert Marko	status = "okay";
39273792919SRobert Marko
39373792919SRobert Marko	phy-mode = "2500base-x";
39473792919SRobert Marko	phys = <&cp0_comphy0 1>;
39573792919SRobert Marko
39673792919SRobert Marko	fixed-link {
39773792919SRobert Marko		speed = <2500>;
39873792919SRobert Marko		full-duplex;
39973792919SRobert Marko	};
40073792919SRobert Marko};
40173792919SRobert Marko
40273792919SRobert Marko/* 1G SFP or 1G RJ45 */
40373792919SRobert Marko&cp0_eth2 {
40473792919SRobert Marko	status = "okay";
40573792919SRobert Marko
40673792919SRobert Marko	pinctrl-names = "default";
40773792919SRobert Marko	pinctrl-0 = <&cp0_rgmii1_pins>;
40873792919SRobert Marko
40973792919SRobert Marko	phy = <&eth2phy>;
41073792919SRobert Marko	phy-mode = "rgmii-id";
41173792919SRobert Marko};
41273792919SRobert Marko
41373792919SRobert Marko&cp0_utmi {
41473792919SRobert Marko	status = "okay";
41573792919SRobert Marko};
41673792919SRobert Marko
41773792919SRobert Marko/* SMSC USB5434B hub */
41873792919SRobert Marko&cp0_usb3_0 {
41973792919SRobert Marko	status = "okay";
42073792919SRobert Marko
42173792919SRobert Marko	phys = <&cp0_comphy1 0>, <&cp0_utmi0>;
42273792919SRobert Marko	phy-names = "cp0-usb3h0-comphy", "utmi";
42373792919SRobert Marko};
42473792919SRobert Marko
42573792919SRobert Marko/* miniPCI-E USB */
42673792919SRobert Marko&cp0_usb3_1 {
42773792919SRobert Marko	status = "okay";
42873792919SRobert Marko};
42973792919SRobert Marko
43073792919SRobert Marko&cp0_sata0 {
43173792919SRobert Marko	status = "okay";
43273792919SRobert Marko
43373792919SRobert Marko	/* 7 + 12 SATA connector (J24) */
43473792919SRobert Marko	sata-port@0 {
43573792919SRobert Marko		phys = <&cp0_comphy2 0>;
43673792919SRobert Marko		phy-names = "cp0-sata0-0-phy";
43773792919SRobert Marko	};
43873792919SRobert Marko
43973792919SRobert Marko	/* M.2-2250 B-key (J39) */
44073792919SRobert Marko	sata-port@1 {
44173792919SRobert Marko		phys = <&cp0_comphy3 1>;
44273792919SRobert Marko		phy-names = "cp0-sata0-1-phy";
44373792919SRobert Marko	};
44473792919SRobert Marko};
44573792919SRobert Marko
44673792919SRobert Marko/* miniPCI-E (J5) */
44773792919SRobert Marko&cp0_pcie2 {
44873792919SRobert Marko	status = "okay";
44973792919SRobert Marko
45073792919SRobert Marko	pinctrl-names = "default", "clkreq";
45173792919SRobert Marko	pinctrl-0 = <&cp0_pcie_reset_pins>;
45273792919SRobert Marko	pinctrl-1 = <&cp0_pcie_clkreq_pins>;
45373792919SRobert Marko	phys = <&cp0_comphy5 2>;
45473792919SRobert Marko	phy-names = "cp0-pcie2-x1-phy";
45573792919SRobert Marko	reset-gpios = <&cp0_gpio1 9 GPIO_ACTIVE_LOW>;
45622a9554eSRobert Marko	ranges = <0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x8000000>;
45773792919SRobert Marko};
458