1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Device Tree file for Globalscale Marvell ESPRESSOBin Board 4 * Copyright (C) 2016 Marvell 5 * 6 * Romain Perier <romain.perier@free-electrons.com> 7 * 8 */ 9/* 10 * Schematic available at http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schematics.pdf 11 */ 12 13/dts-v1/; 14 15#include <dt-bindings/gpio/gpio.h> 16#include "armada-372x.dtsi" 17 18/ { 19 model = "Globalscale Marvell ESPRESSOBin Board"; 20 compatible = "globalscale,espressobin", "marvell,armada3720", "marvell,armada3710"; 21 22 chosen { 23 stdout-path = "serial0:115200n8"; 24 }; 25 26 memory@0 { 27 device_type = "memory"; 28 reg = <0x00000000 0x00000000 0x00000000 0x20000000>; 29 }; 30 31 vcc_sd_reg1: regulator { 32 compatible = "regulator-gpio"; 33 regulator-name = "vcc_sd1"; 34 regulator-min-microvolt = <1800000>; 35 regulator-max-microvolt = <3300000>; 36 regulator-boot-on; 37 38 gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>; 39 gpios-states = <0>; 40 states = <1800000 0x1 41 3300000 0x0>; 42 enable-active-high; 43 }; 44}; 45 46/* J9 */ 47&pcie0 { 48 status = "okay"; 49}; 50 51/* J6 */ 52&sata { 53 status = "okay"; 54}; 55 56/* J1 */ 57&sdhci1 { 58 wp-inverted; 59 bus-width = <4>; 60 cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>; 61 marvell,pad-type = "sd"; 62 vqmmc-supply = <&vcc_sd_reg1>; 63 64 pinctrl-names = "default"; 65 pinctrl-0 = <&sdio_pins>; 66 status = "okay"; 67}; 68 69/* U11 */ 70&sdhci0 { 71 non-removable; 72 bus-width = <8>; 73 mmc-ddr-1_8v; 74 mmc-hs400-1_8v; 75 marvell,xenon-emmc; 76 marvell,xenon-tun-count = <9>; 77 marvell,pad-type = "fixed-1-8v"; 78 79 pinctrl-names = "default"; 80 pinctrl-0 = <&mmc_pins>; 81/* 82 * This eMMC is not populated on all boards, so disable it by 83 * default and let the bootloader enable it, if it is present 84 */ 85 status = "disabled"; 86}; 87 88&spi0 { 89 status = "okay"; 90 91 flash@0 { 92 reg = <0>; 93 compatible = "winbond,w25q32dw", "jedec,spi-flash"; 94 spi-max-frequency = <104000000>; 95 m25p,fast-read; 96 97 partitions { 98 compatible = "fixed-partitions"; 99 #address-cells = <1>; 100 #size-cells = <1>; 101 102 partition@0 { 103 label = "uboot"; 104 reg = <0 0x180000>; 105 }; 106 107 partition@180000 { 108 label = "ubootenv"; 109 reg = <0x180000 0x10000>; 110 }; 111 }; 112 }; 113}; 114 115/* Exported on the micro USB connector J5 through an FTDI */ 116&uart0 { 117 pinctrl-names = "default"; 118 pinctrl-0 = <&uart1_pins>; 119 status = "okay"; 120}; 121 122/* 123 * Connector J17 and J18 expose a number of different features. Some pins are 124 * multiplexed. This is the case for instance for the following features: 125 * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of 126 * how to enable it. Beware that the signals are 1.8V TTL. 127 * - I2C 128 * - SPI 129 * - MMC 130 */ 131 132/* J7 */ 133&usb3 { 134 status = "okay"; 135}; 136 137/* J8 */ 138&usb2 { 139 status = "okay"; 140}; 141 142&mdio { 143 switch0: switch0@1 { 144 compatible = "marvell,mv88e6085"; 145 #address-cells = <1>; 146 #size-cells = <0>; 147 reg = <1>; 148 149 dsa,member = <0 0>; 150 151 ports { 152 #address-cells = <1>; 153 #size-cells = <0>; 154 155 port@0 { 156 reg = <0>; 157 label = "cpu"; 158 ethernet = <ð0>; 159 }; 160 161 port@1 { 162 reg = <1>; 163 label = "wan"; 164 phy-handle = <&switch0phy0>; 165 }; 166 167 port@2 { 168 reg = <2>; 169 label = "lan0"; 170 phy-handle = <&switch0phy1>; 171 }; 172 173 port@3 { 174 reg = <3>; 175 label = "lan1"; 176 phy-handle = <&switch0phy2>; 177 }; 178 179 }; 180 181 mdio { 182 #address-cells = <1>; 183 #size-cells = <0>; 184 185 switch0phy0: switch0phy0@11 { 186 reg = <0x11>; 187 }; 188 switch0phy1: switch0phy1@12 { 189 reg = <0x12>; 190 }; 191 switch0phy2: switch0phy2@13 { 192 reg = <0x13>; 193 }; 194 }; 195 }; 196}; 197 198ð0 { 199 phy-mode = "rgmii-id"; 200 status = "okay"; 201 202 fixed-link { 203 speed = <1000>; 204 full-duplex; 205 }; 206}; 207