xref: /linux/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts (revision 55d0969c451159cff86949b38c39171cab962069)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Device Tree file for ESPRESSObin-Ultra board.
4 * Copyright (C) 2019 Globalscale technologies, Inc.
5 *
6 * Jason Hung <jhung@globalscaletechnologies.com>
7 */
8
9/dts-v1/;
10
11#include "armada-3720-espressobin.dtsi"
12
13/ {
14	model = "Globalscale Marvell ESPRESSOBin Ultra Board";
15	compatible = "globalscale,espressobin-ultra", "globalscale,espressobin",
16		     "marvell,armada3720", "marvell,armada3700";
17
18	aliases {
19		/* ethernet1 is WAN port */
20		ethernet1 = &switch0port5;
21		ethernet2 = &switch0port1;
22		ethernet3 = &switch0port2;
23		ethernet4 = &switch0port3;
24		ethernet5 = &switch0port4;
25	};
26
27	/delete-node/ regulator;
28
29	reg_usb3_vbus: usb3-vbus {
30		compatible = "regulator-fixed";
31		regulator-name = "usb3-vbus";
32		regulator-min-microvolt = <5000000>;
33		regulator-max-microvolt = <5000000>;
34		enable-active-high;
35		gpio = <&gpionb 19 GPIO_ACTIVE_HIGH>;
36	};
37
38	usb3_phy: usb3-phy {
39		compatible = "usb-nop-xceiv";
40		vcc-supply = <&reg_usb3_vbus>;
41	};
42
43	gpio-leds {
44		pinctrl-names = "default";
45		compatible = "gpio-leds";
46		/* No assigned functions to the LEDs by default */
47		led1 {
48			label = "ebin-ultra:blue:led1";
49			gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
50		};
51		led2 {
52			label = "ebin-ultra:green:led2";
53			gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
54		};
55		led3 {
56			label = "ebin-ultra:red:led3";
57			gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
58		};
59		led4 {
60			label = "ebin-ultra:yellow:led4";
61			gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
62		};
63	};
64};
65
66&sdhci0 {
67	status = "okay";
68};
69
70&sdhci1 {
71	/delete-property/ vqmmc-supply;
72	status = "disabled";
73};
74
75&spi0 {
76	flash@0 {
77		partitions {
78			compatible = "fixed-partitions";
79			#address-cells = <1>;
80			#size-cells = <1>;
81
82			partition@0 {
83				label = "firmware";
84				reg = <0x0 0x3e0000>;
85			};
86			partition@3e0000 {
87				label = "hw-info";
88				reg = <0x3e0000 0x10000>;
89				read-only;
90			};
91			partition@3f0000 {
92				label = "u-boot-env";
93				reg = <0x3f0000 0x10000>;
94			};
95		};
96	};
97};
98
99&i2c0 {
100	status = "okay";
101	pinctrl-names = "default";
102	pinctrl-0 = <&i2c1_pins>;
103
104	clock-frequency = <100000>;
105
106	rtc@51 {
107		compatible = "nxp,pcf8563";
108		reg = <0x51>;
109	};
110};
111
112&usb3 {
113	usb-phy = <&usb3_phy>;
114};
115
116&mdio {
117	/* Switch is @3, not @1 */
118	/delete-node/ ethernet-switch@1;
119	extphy: ethernet-phy@1 {
120		reg = <1>;
121
122		reset-gpios = <&gpionb 2 GPIO_ACTIVE_LOW>;
123	};
124
125	switch0: ethernet-switch@3 {
126		compatible = "marvell,mv88e6085";
127		reg = <3>;
128
129		reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>;
130		dsa,member = <0 0>;
131
132		ethernet-ports {
133			#address-cells = <1>;
134			#size-cells = <0>;
135
136			switch0port0: ethernet-port@0 {
137				reg = <0>;
138				label = "cpu";
139				ethernet = <&eth0>;
140				phy-mode = "rgmii-id";
141				fixed-link {
142					speed = <1000>;
143					full-duplex;
144				};
145			};
146
147			switch0port1: ethernet-port@1 {
148				reg = <1>;
149				label = "lan0";
150				phy-handle = <&switch0phy0>;
151			};
152
153			switch0port2: ethernet-port@2 {
154				reg = <2>;
155				label = "lan1";
156				phy-handle = <&switch0phy1>;
157			};
158
159			switch0port3: ethernet-port@3 {
160				reg = <3>;
161				label = "lan2";
162				phy-handle = <&switch0phy2>;
163			};
164
165			switch0port4: ethernet-port@4 {
166				reg = <4>;
167				label = "lan3";
168				phy-handle = <&switch0phy3>;
169			};
170
171			switch0port5: ethernet-port@5 {
172				reg = <5>;
173				label = "wan";
174				phy-handle = <&extphy>;
175				phy-mode = "sgmii";
176			};
177		};
178
179		mdio {
180			#address-cells = <1>;
181			#size-cells = <0>;
182
183			switch0phy0: ethernet-phy@11 {
184				reg = <0x11>;
185			};
186			switch0phy1: ethernet-phy@12 {
187				reg = <0x12>;
188			};
189			switch0phy2: ethernet-phy@13 {
190				reg = <0x13>;
191			};
192			switch0phy3: ethernet-phy@14 {
193				reg = <0x14>;
194			};
195		};
196	};
197};
198