xref: /linux/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts (revision 47e2843f5e2e1cdcf25fdfa28173ae5315e6497b)
1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0
235ca8168SChen Feng/*
335ca8168SChen Feng * dts file for Hisilicon HiKey960 Development Board
435ca8168SChen Feng *
535ca8168SChen Feng * Copyright (C) 2016, Hisilicon Ltd.
635ca8168SChen Feng *
735ca8168SChen Feng */
835ca8168SChen Feng
935ca8168SChen Feng/dts-v1/;
1035ca8168SChen Feng
1135ca8168SChen Feng#include "hi3660.dtsi"
12d4e1eaeeSWang Xiaoyin#include "hikey960-pinctrl.dtsi"
132e9b4447SGuodong Xu#include <dt-bindings/gpio/gpio.h>
148cb53a8dSChen Jun#include <dt-bindings/input/input.h>
158cb53a8dSChen Jun#include <dt-bindings/interrupt-controller/irq.h>
16*47e2843fSJohn Stultz#include <dt-bindings/usb/pd.h>
1735ca8168SChen Feng
1835ca8168SChen Feng/ {
1935ca8168SChen Feng	model = "HiKey960";
20b6c93186SGuodong Xu	compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
2135ca8168SChen Feng
2235ca8168SChen Feng	aliases {
23804d7d7aSLi Wei		mshc1 = &dwmmc1;
24804d7d7aSLi Wei		mshc2 = &dwmmc2;
25254b07b2SChen Feng		serial0 = &uart0;
26254b07b2SChen Feng		serial1 = &uart1;
27254b07b2SChen Feng		serial2 = &uart2;
28254b07b2SChen Feng		serial3 = &uart3;
29254b07b2SChen Feng		serial4 = &uart4;
30254b07b2SChen Feng		serial5 = &uart5;
31254b07b2SChen Feng		serial6 = &uart6;
3235ca8168SChen Feng	};
3335ca8168SChen Feng
3435ca8168SChen Feng	chosen {
35254b07b2SChen Feng		stdout-path = "serial6:115200n8";
3635ca8168SChen Feng	};
3735ca8168SChen Feng
3835ca8168SChen Feng	memory@0 {
3935ca8168SChen Feng		device_type = "memory";
4035ca8168SChen Feng		/* rewrite this at bootloader */
4135ca8168SChen Feng		reg = <0x0 0x0 0x0 0x0>;
4235ca8168SChen Feng	};
438cb53a8dSChen Jun
449c24dc9dSGuodong Xu	reserved-memory {
459c24dc9dSGuodong Xu		#address-cells = <2>;
469c24dc9dSGuodong Xu		#size-cells = <2>;
479c24dc9dSGuodong Xu		ranges;
489c24dc9dSGuodong Xu
499c24dc9dSGuodong Xu		ramoops@32000000 {
509c24dc9dSGuodong Xu			compatible = "ramoops";
519c24dc9dSGuodong Xu			reg = <0x0 0x32000000 0x0 0x00100000>;
529c24dc9dSGuodong Xu			record-size	= <0x00020000>;
539c24dc9dSGuodong Xu			console-size	= <0x00020000>;
549c24dc9dSGuodong Xu			ftrace-size	= <0x00020000>;
559c24dc9dSGuodong Xu		};
569c24dc9dSGuodong Xu	};
579c24dc9dSGuodong Xu
58b6b681c1SGuodong Xu	reboot-mode-syscon@32100000 {
59b6b681c1SGuodong Xu		compatible = "syscon", "simple-mfd";
60b6b681c1SGuodong Xu		reg = <0x0 0x32100000 0x0 0x00001000>;
61b6b681c1SGuodong Xu
62b6b681c1SGuodong Xu		reboot-mode {
63b6b681c1SGuodong Xu			compatible = "syscon-reboot-mode";
64b6b681c1SGuodong Xu			offset = <0x0>;
65b6b681c1SGuodong Xu
66b6b681c1SGuodong Xu			mode-normal	= <0x77665501>;
67b6b681c1SGuodong Xu			mode-bootloader	= <0x77665500>;
68b6b681c1SGuodong Xu			mode-recovery	= <0x77665502>;
69b6b681c1SGuodong Xu		};
70b6b681c1SGuodong Xu	};
71b6b681c1SGuodong Xu
728cb53a8dSChen Jun	keys {
738cb53a8dSChen Jun		compatible = "gpio-keys";
748cb53a8dSChen Jun		pinctrl-names = "default";
758cb53a8dSChen Jun		pinctrl-0 = <&pwr_key_pmx_func &pwr_key_cfg_func>;
768cb53a8dSChen Jun
778cb53a8dSChen Jun		power {
788cb53a8dSChen Jun			wakeup-source;
798cb53a8dSChen Jun			gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
808cb53a8dSChen Jun			label = "GPIO Power";
818cb53a8dSChen Jun			linux,code = <KEY_POWER>;
828cb53a8dSChen Jun		};
838cb53a8dSChen Jun	};
84fc5f2ed6SGuodong Xu
85fc5f2ed6SGuodong Xu	leds {
86fc5f2ed6SGuodong Xu		compatible = "gpio-leds";
87fc5f2ed6SGuodong Xu
88fc5f2ed6SGuodong Xu		user_led1 {
8928b45da9SManivannan Sadhasivam			label = "green:user1";
90fc5f2ed6SGuodong Xu			/* gpio_150_user_led1 */
91fc5f2ed6SGuodong Xu			gpios = <&gpio18 6 0>;
92fc5f2ed6SGuodong Xu			linux,default-trigger = "heartbeat";
93fc5f2ed6SGuodong Xu		};
94fc5f2ed6SGuodong Xu
95fc5f2ed6SGuodong Xu		user_led2 {
9628b45da9SManivannan Sadhasivam			label = "green:user2";
97fc5f2ed6SGuodong Xu			/* gpio_151_user_led2 */
98fc5f2ed6SGuodong Xu			gpios = <&gpio18 7 0>;
9928b45da9SManivannan Sadhasivam			linux,default-trigger = "none";
100fc5f2ed6SGuodong Xu		};
101fc5f2ed6SGuodong Xu
102fc5f2ed6SGuodong Xu		user_led3 {
10328b45da9SManivannan Sadhasivam			label = "green:user3";
104fc5f2ed6SGuodong Xu			/* gpio_189_user_led3 */
105fc5f2ed6SGuodong Xu			gpios = <&gpio23 5 0>;
10628b45da9SManivannan Sadhasivam			linux,default-trigger = "mmc0";
107fc5f2ed6SGuodong Xu		};
108fc5f2ed6SGuodong Xu
109fc5f2ed6SGuodong Xu		user_led4 {
11028b45da9SManivannan Sadhasivam			label = "green:user4";
111fc5f2ed6SGuodong Xu			/* gpio_190_user_led4 */
112fc5f2ed6SGuodong Xu			gpios = <&gpio23 6 0>;
1135d4afa73SAmit Kucheria			panic-indicator;
11428b45da9SManivannan Sadhasivam			linux,default-trigger = "none";
115fc5f2ed6SGuodong Xu		};
116fc5f2ed6SGuodong Xu
117fc5f2ed6SGuodong Xu		wlan_active_led {
11828b45da9SManivannan Sadhasivam			label = "yellow:wlan";
119fc5f2ed6SGuodong Xu			/* gpio_205_wifi_active */
120fc5f2ed6SGuodong Xu			gpios = <&gpio25 5 0>;
121fc5f2ed6SGuodong Xu			linux,default-trigger = "phy0tx";
122fc5f2ed6SGuodong Xu			default-state = "off";
123fc5f2ed6SGuodong Xu		};
124fc5f2ed6SGuodong Xu
125fc5f2ed6SGuodong Xu		bt_active_led {
12628b45da9SManivannan Sadhasivam			label = "blue:bt";
127fc5f2ed6SGuodong Xu			gpios = <&gpio25 7 0>;
128fc5f2ed6SGuodong Xu			/* gpio_207_user_led1 */
129fc5f2ed6SGuodong Xu			linux,default-trigger = "hci0-power";
130fc5f2ed6SGuodong Xu			default-state = "off";
131fc5f2ed6SGuodong Xu		};
132fc5f2ed6SGuodong Xu	};
133e02045aaSWang Xiaoyin
134e02045aaSWang Xiaoyin	pmic: pmic@fff34000 {
135e02045aaSWang Xiaoyin		compatible = "hisilicon,hi6421v530-pmic";
136e02045aaSWang Xiaoyin		reg = <0x0 0xfff34000 0x0 0x1000>;
137e02045aaSWang Xiaoyin		interrupt-controller;
138e02045aaSWang Xiaoyin		#interrupt-cells = <2>;
139e02045aaSWang Xiaoyin
140e02045aaSWang Xiaoyin		regulators {
141e02045aaSWang Xiaoyin			ldo3: LDO3 { /* HDMI */
142e02045aaSWang Xiaoyin				regulator-name = "VOUT3_1V85";
143e02045aaSWang Xiaoyin				regulator-min-microvolt = <1800000>;
144e02045aaSWang Xiaoyin				regulator-max-microvolt = <2200000>;
145e02045aaSWang Xiaoyin				regulator-enable-ramp-delay = <120>;
146e02045aaSWang Xiaoyin			};
147e02045aaSWang Xiaoyin
148e02045aaSWang Xiaoyin			ldo9: LDO9 { /* SDCARD I/O */
149e02045aaSWang Xiaoyin				regulator-name = "VOUT9_1V8_2V95";
150e02045aaSWang Xiaoyin				regulator-min-microvolt = <1750000>;
151e02045aaSWang Xiaoyin				regulator-max-microvolt = <3300000>;
152e02045aaSWang Xiaoyin				regulator-enable-ramp-delay = <240>;
153e02045aaSWang Xiaoyin			};
154e02045aaSWang Xiaoyin
155e02045aaSWang Xiaoyin			ldo11: LDO11 { /* Low Speed Connector */
156e02045aaSWang Xiaoyin				regulator-name = "VOUT11_1V8_2V95";
157e02045aaSWang Xiaoyin				regulator-min-microvolt = <1750000>;
158e02045aaSWang Xiaoyin				regulator-max-microvolt = <3300000>;
159e02045aaSWang Xiaoyin				regulator-enable-ramp-delay = <240>;
160e02045aaSWang Xiaoyin			};
161e02045aaSWang Xiaoyin
162e02045aaSWang Xiaoyin			ldo15: LDO15 { /* UFS VCC */
163e02045aaSWang Xiaoyin				regulator-name = "VOUT15_3V0";
164e02045aaSWang Xiaoyin				regulator-min-microvolt = <1750000>;
165e02045aaSWang Xiaoyin				regulator-max-microvolt = <3000000>;
166e02045aaSWang Xiaoyin				regulator-boot-on;
167e02045aaSWang Xiaoyin				regulator-always-on;
168e02045aaSWang Xiaoyin				regulator-enable-ramp-delay = <120>;
169e02045aaSWang Xiaoyin			};
170e02045aaSWang Xiaoyin
171e02045aaSWang Xiaoyin			ldo16: LDO16 { /* SD VDD */
172e02045aaSWang Xiaoyin				regulator-name = "VOUT16_2V95";
173e02045aaSWang Xiaoyin				regulator-min-microvolt = <1750000>;
174e02045aaSWang Xiaoyin				regulator-max-microvolt = <3000000>;
175e02045aaSWang Xiaoyin				regulator-enable-ramp-delay = <360>;
176e02045aaSWang Xiaoyin			};
177e02045aaSWang Xiaoyin		};
178e02045aaSWang Xiaoyin	};
1797d8c3667SGuodong Xu
1807d8c3667SGuodong Xu	wlan_en: wlan-en-1-8v {
1817d8c3667SGuodong Xu		compatible = "regulator-fixed";
1827d8c3667SGuodong Xu		regulator-name = "wlan-en-regulator";
1837d8c3667SGuodong Xu		regulator-min-microvolt = <1800000>;
1847d8c3667SGuodong Xu		regulator-max-microvolt = <1800000>;
1857d8c3667SGuodong Xu
1867d8c3667SGuodong Xu		/* GPIO_051_WIFI_EN */
1877d8c3667SGuodong Xu		gpio = <&gpio6 3 0>;
1887d8c3667SGuodong Xu
1897d8c3667SGuodong Xu		/* WLAN card specific delay */
1907d8c3667SGuodong Xu		startup-delay-us = <70000>;
1917d8c3667SGuodong Xu		enable-active-high;
1927d8c3667SGuodong Xu	};
193313aebdaSVictor Chong
194313aebdaSVictor Chong	firmware {
195313aebdaSVictor Chong		optee {
196313aebdaSVictor Chong			compatible = "linaro,optee-tz";
197313aebdaSVictor Chong			method = "smc";
198313aebdaSVictor Chong		};
199313aebdaSVictor Chong	};
20035ca8168SChen Feng};
20135ca8168SChen Feng
20263fc36cdSLinus Walleij/*
20363fc36cdSLinus Walleij * Legend: proper name = the GPIO line is used as GPIO
20463fc36cdSLinus Walleij *         NC = not connected (pin out but not routed from the chip to
20563fc36cdSLinus Walleij *              anything the board)
20663fc36cdSLinus Walleij *         "[PER]" = pin is muxed for [peripheral] (not GPIO)
20763fc36cdSLinus Walleij *         "" = no idea, schematic doesn't say, could be
20863fc36cdSLinus Walleij *              unrouted (not connected to any external pin)
20963fc36cdSLinus Walleij *         LSEC = Low Speed External Connector
21063fc36cdSLinus Walleij *         HSEC = High Speed External Connector
21163fc36cdSLinus Walleij *
21263fc36cdSLinus Walleij * Line names are taken from "HiKey 960 Board ver A" schematics
21363fc36cdSLinus Walleij * from Huawei. The 40 pin low speed expansion connector is named
21463fc36cdSLinus Walleij * J2002 63453-140LF.
21563fc36cdSLinus Walleij *
21663fc36cdSLinus Walleij * For the lines routed to the external connectors the
21763fc36cdSLinus Walleij * lines are named after the 96Boards CE Specification 1.0,
21863fc36cdSLinus Walleij * Appendix "Expansion Connector Signal Description".
21963fc36cdSLinus Walleij *
22063fc36cdSLinus Walleij * When the 96Board naming of a line and the schematic name of
22163fc36cdSLinus Walleij * the same line are in conflict, the 96Board specification
22263fc36cdSLinus Walleij * takes precedence, which means that the external UART on the
22363fc36cdSLinus Walleij * LSEC is named UART0 while the schematic and SoC names this
22463fc36cdSLinus Walleij * UART3. This is only for the informational lines i.e. "[FOO]",
22563fc36cdSLinus Walleij * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
22663fc36cdSLinus Walleij * ones actually used for GPIO.
22763fc36cdSLinus Walleij */
22863fc36cdSLinus Walleij&gpio0 {
22963fc36cdSLinus Walleij	/* GPIO_000-GPIO_007 */
23063fc36cdSLinus Walleij	gpio-line-names =
23163fc36cdSLinus Walleij		"",
23263fc36cdSLinus Walleij		"TP901", /* TEST_MODE connected to TP901 */
23363fc36cdSLinus Walleij		"[PMU0_SSI]",
23463fc36cdSLinus Walleij		"[PMU1_SSI]",
23563fc36cdSLinus Walleij		"[PMU2_SSI]",
23663fc36cdSLinus Walleij		"[PMU0_CLKOUT]",
23763fc36cdSLinus Walleij		"[JTAG_TCK]",
23863fc36cdSLinus Walleij		"[JTAG_TMS]";
23963fc36cdSLinus Walleij};
24063fc36cdSLinus Walleij
24163fc36cdSLinus Walleij&gpio1 {
24263fc36cdSLinus Walleij	/* GPIO_008-GPIO_015 */
24363fc36cdSLinus Walleij	gpio-line-names =
24463fc36cdSLinus Walleij		"[JTAG_TRST_N]",
24563fc36cdSLinus Walleij		"[JTAG_TDI]",
24663fc36cdSLinus Walleij		"[JTAG_TDO]",
24763fc36cdSLinus Walleij		"NC", "NC",
24863fc36cdSLinus Walleij		"[I2C3_SCL]",
24963fc36cdSLinus Walleij		"[I2C3_SDA]",
25063fc36cdSLinus Walleij		"NC";
25163fc36cdSLinus Walleij};
25263fc36cdSLinus Walleij
25363fc36cdSLinus Walleij&gpio2 {
25463fc36cdSLinus Walleij	/* GPIO_016-GPIO_023 */
25563fc36cdSLinus Walleij	gpio-line-names =
25663fc36cdSLinus Walleij		"NC", "NC", "NC",
25763fc36cdSLinus Walleij		"GPIO-J", /* LSEC pin 32: GPIO_019 */
25863fc36cdSLinus Walleij		"GPIO_020_HDMI_SEL",
25963fc36cdSLinus Walleij		"GPIO-L", /* LSEC pin 34: GPIO_021 */
26063fc36cdSLinus Walleij		"GPIO_022_UFSBUCK_INT_N",
26163fc36cdSLinus Walleij		"GPIO-G"; /* LSEC pin 29: LCD_TE0 */
26263fc36cdSLinus Walleij};
26363fc36cdSLinus Walleij
26463fc36cdSLinus Walleij&gpio3 {
26563fc36cdSLinus Walleij	/* GPIO_024-GPIO_031 */
26663fc36cdSLinus Walleij	/* The rail from pin BK36 is named LCD_TE0, we assume to be muxed as GPIO for GPIO-G */
26763fc36cdSLinus Walleij	gpio-line-names =
26863fc36cdSLinus Walleij		"[CSI0_MCLK]", /* HSEC pin 15: ISP_CCLK0_MCAM */
26963fc36cdSLinus Walleij		"[CSI1_MCLK]", /* HSEC pin 17: ISP_CCLK1_SCAM */
27063fc36cdSLinus Walleij		"NC",
27163fc36cdSLinus Walleij		"[I2C2_SCL]", /* HSEC pin 32: ISP_SCL0 */
27263fc36cdSLinus Walleij		"[I2C2_SDA]", /* HSEC pin 34: ISP_SDA0 */
27363fc36cdSLinus Walleij		"[I2C3_SCL]", /* HSEC pin 36: ISP_SCL1 */
27463fc36cdSLinus Walleij		"[I2C3_SDA]", /* HSEC pin 38: ISP_SDA1 */
27563fc36cdSLinus Walleij		"NC";
27663fc36cdSLinus Walleij};
27763fc36cdSLinus Walleij
27863fc36cdSLinus Walleij&gpio4 {
27963fc36cdSLinus Walleij	/* GPIO_032-GPIO_039 */
28063fc36cdSLinus Walleij	gpio-line-names =
28163fc36cdSLinus Walleij		"NC", "NC",
28263fc36cdSLinus Walleij		"PWR_BTN_N", /* LSEC pin 4: GPIO_034_PWRON_DET */
28363fc36cdSLinus Walleij		"GPIO_035_PMU2_EN",
28463fc36cdSLinus Walleij		"GPIO_036_USB_HUB_RESET",
28563fc36cdSLinus Walleij		"NC", "NC", "NC";
28663fc36cdSLinus Walleij};
28763fc36cdSLinus Walleij
28863fc36cdSLinus Walleij&gpio5 {
28963fc36cdSLinus Walleij	/* GPIO_040-GPIO_047 */
29063fc36cdSLinus Walleij	gpio-line-names =
29163fc36cdSLinus Walleij		"GPIO-H", /* LSEC pin 30: GPIO_040_LCD_RST_N */
29263fc36cdSLinus Walleij		"GPIO_041_HDMI_PD",
29363fc36cdSLinus Walleij		"TP904", /* Test point */
29463fc36cdSLinus Walleij		"TP905", /* Test point */
29563fc36cdSLinus Walleij		"NC", "NC",
29663fc36cdSLinus Walleij		"GPIO_046_HUB_VDD33_EN",
29763fc36cdSLinus Walleij		"GPIO_047_PMU1_EN";
29863fc36cdSLinus Walleij};
29963fc36cdSLinus Walleij
30063fc36cdSLinus Walleij&gpio6 {
30163fc36cdSLinus Walleij	/* GPIO_048-GPIO_055 */
30263fc36cdSLinus Walleij	gpio-line-names =
30363fc36cdSLinus Walleij		"NC", "NC", "NC",
30463fc36cdSLinus Walleij		"GPIO_051_WIFI_EN",
30563fc36cdSLinus Walleij		"GPIO-I", /* LSEC pin 31: GPIO_052_CAM0_RST_N */
30663fc36cdSLinus Walleij		/*
30763fc36cdSLinus Walleij		 * These two pins should be used for SD(IO) data according to the
30863fc36cdSLinus Walleij		 * 96boards specification but seems to be repurposed for a IRDA UART.
30963fc36cdSLinus Walleij		 * They are however named according to the spec.
31063fc36cdSLinus Walleij		 */
31163fc36cdSLinus Walleij		"[SD_DAT1]", /* HSEC pin 3: UART0_IRDA_RXD */
31263fc36cdSLinus Walleij		"[SD_DAT2]", /* HSEC pin 5: UART0_IRDA_TXD */
31363fc36cdSLinus Walleij		"[UART1_RXD]"; /* LSEC pin 13: DEBUG_UART6_RXD */
31463fc36cdSLinus Walleij};
31563fc36cdSLinus Walleij
31663fc36cdSLinus Walleij&gpio7 {
31763fc36cdSLinus Walleij	/* GPIO_056-GPIO_063 */
31863fc36cdSLinus Walleij	gpio-line-names =
31963fc36cdSLinus Walleij		"[UART1_TXD]", /* LSEC pin 11: DEBUG_UART6_TXD */
32063fc36cdSLinus Walleij		"[UART0_CTS]", /* LSEC pin 3: UART3_CTS_N */
32163fc36cdSLinus Walleij		"[UART0_RTS]", /* LSEC pin 9: UART3_RTS_N */
32263fc36cdSLinus Walleij		"[UART0_RXD]", /* LSEC pin 7: UART3_RXD */
32363fc36cdSLinus Walleij		"[UART0_TXD]", /* LSEC pin 5: UART3_TXD */
32463fc36cdSLinus Walleij		"[SOC_BT_UART4_CTS_N]",
32563fc36cdSLinus Walleij		"[SOC_BT_UART4_RTS_N]",
32663fc36cdSLinus Walleij		"[SOC_BT_UART4_RXD]";
32763fc36cdSLinus Walleij};
32863fc36cdSLinus Walleij
32963fc36cdSLinus Walleij&gpio8 {
33063fc36cdSLinus Walleij	/* GPIO_064-GPIO_071 */
33163fc36cdSLinus Walleij	gpio-line-names =
33263fc36cdSLinus Walleij		"[SOC_BT_UART4_TXD]",
33363fc36cdSLinus Walleij		"NC",
33463fc36cdSLinus Walleij		"[PMU_HKADC_SSI]",
33563fc36cdSLinus Walleij		"NC",
33663fc36cdSLinus Walleij		"GPIO_068_SEL",
33763fc36cdSLinus Walleij		"NC", "NC", "NC";
33863fc36cdSLinus Walleij
33963fc36cdSLinus Walleij};
34063fc36cdSLinus Walleij
34163fc36cdSLinus Walleij&gpio9 {
34263fc36cdSLinus Walleij	/* GPIO_072-GPIO_079 */
34363fc36cdSLinus Walleij	gpio-line-names =
34463fc36cdSLinus Walleij		"NC", "NC", "NC",
34563fc36cdSLinus Walleij		"GPIO-K", /* LSEC pin 33: GPIO_075_CAM1_RST_N */
34663fc36cdSLinus Walleij		"NC", "NC", "NC", "NC";
34763fc36cdSLinus Walleij};
34863fc36cdSLinus Walleij
34963fc36cdSLinus Walleij&gpio10 {
35063fc36cdSLinus Walleij	/* GPIO_080-GPIO_087 */
35163fc36cdSLinus Walleij	gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC";
35263fc36cdSLinus Walleij};
35363fc36cdSLinus Walleij
35463fc36cdSLinus Walleij&gpio11 {
35563fc36cdSLinus Walleij	/* GPIO_088-GPIO_095 */
35663fc36cdSLinus Walleij	gpio-line-names =
35763fc36cdSLinus Walleij		"NC",
35863fc36cdSLinus Walleij		"[PCIE_PERST_N]",
35963fc36cdSLinus Walleij		"NC", "NC", "NC", "NC", "NC", "NC";
36063fc36cdSLinus Walleij};
36163fc36cdSLinus Walleij
36263fc36cdSLinus Walleij&gpio12 {
36363fc36cdSLinus Walleij	/* GPIO_096-GPIO_103 */
36463fc36cdSLinus Walleij	gpio-line-names = "NC", "NC", "NC", "", "", "", "", "NC";
36563fc36cdSLinus Walleij};
36663fc36cdSLinus Walleij
36763fc36cdSLinus Walleij&gpio13 {
36863fc36cdSLinus Walleij	/* GPIO_104-GPIO_111 */
36963fc36cdSLinus Walleij	gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC";
37063fc36cdSLinus Walleij};
37163fc36cdSLinus Walleij
37263fc36cdSLinus Walleij&gpio14 {
37363fc36cdSLinus Walleij	/* GPIO_112-GPIO_119 */
37463fc36cdSLinus Walleij	gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC";
37563fc36cdSLinus Walleij};
37663fc36cdSLinus Walleij
37763fc36cdSLinus Walleij&gpio15 {
37863fc36cdSLinus Walleij	/* GPIO_120-GPIO_127 */
37963fc36cdSLinus Walleij	gpio-line-names =
38063fc36cdSLinus Walleij		"NC", "NC", "NC", "NC", "NC", "NC",
38163fc36cdSLinus Walleij		"GPIO_126_BT_EN",
38263fc36cdSLinus Walleij		"TP902"; /* GPIO_127_JTAG_SEL0 */
38363fc36cdSLinus Walleij};
38463fc36cdSLinus Walleij
38563fc36cdSLinus Walleij&gpio16 {
38663fc36cdSLinus Walleij	/* GPIO_128-GPIO_135 */
38763fc36cdSLinus Walleij	gpio-line-names = "", "", "", "", "", "", "", "";
38863fc36cdSLinus Walleij};
38963fc36cdSLinus Walleij
39063fc36cdSLinus Walleij&gpio17 {
39163fc36cdSLinus Walleij	/* GPIO_136-GPIO_143 */
39263fc36cdSLinus Walleij	gpio-line-names = "", "", "", "", "", "", "", "";
39363fc36cdSLinus Walleij};
39463fc36cdSLinus Walleij
39563fc36cdSLinus Walleij&gpio18 {
39663fc36cdSLinus Walleij	/* GPIO_144-GPIO_151 */
39763fc36cdSLinus Walleij	gpio-line-names =
39863fc36cdSLinus Walleij		"[UFS_REF_CLK]",
39963fc36cdSLinus Walleij		"[UFS_RST_N]",
40063fc36cdSLinus Walleij		"[SPI1_SCLK]", /* HSEC pin 9: GPIO_146_SPI3_CLK */
40163fc36cdSLinus Walleij		"[SPI1_DIN]", /* HSEC pin 11: GPIO_147_SPI3_DI */
40263fc36cdSLinus Walleij		"[SPI1_DOUT]", /* HSEC pin 1: GPIO_148_SPI3_DO */
40363fc36cdSLinus Walleij		"[SPI1_CS]", /* HSEC pin 7: GPIO_149_SPI3_CS0_N */
40463fc36cdSLinus Walleij		"GPIO_150_USER_LED1",
40563fc36cdSLinus Walleij		"GPIO_151_USER_LED2";
40663fc36cdSLinus Walleij};
40763fc36cdSLinus Walleij
40863fc36cdSLinus Walleij&gpio19 {
40963fc36cdSLinus Walleij	/* GPIO_152-GPIO_159 */
41063fc36cdSLinus Walleij	gpio-line-names = "NC", "NC", "NC", "NC", "", "", "", "";
41163fc36cdSLinus Walleij};
41263fc36cdSLinus Walleij
41363fc36cdSLinus Walleij&gpio20 {
41463fc36cdSLinus Walleij	/* GPIO_160-GPIO_167 */
41563fc36cdSLinus Walleij	gpio-line-names =
41663fc36cdSLinus Walleij		"[SD_CLK]",
41763fc36cdSLinus Walleij		"[SD_CMD]",
41863fc36cdSLinus Walleij		"[SD_DATA0]",
41963fc36cdSLinus Walleij		"[SD_DATA1]",
42063fc36cdSLinus Walleij		"[SD_DATA2]",
42163fc36cdSLinus Walleij		"[SD_DATA3]",
42263fc36cdSLinus Walleij		"", "";
42363fc36cdSLinus Walleij};
42463fc36cdSLinus Walleij
42563fc36cdSLinus Walleij&gpio21 {
42663fc36cdSLinus Walleij	/* GPIO_168-GPIO_175 */
42763fc36cdSLinus Walleij	gpio-line-names =
42863fc36cdSLinus Walleij		"[WL_SDIO_CLK]",
42963fc36cdSLinus Walleij		"[WL_SDIO_CMD]",
43063fc36cdSLinus Walleij		"[WL_SDIO_DATA0]",
43163fc36cdSLinus Walleij		"[WL_SDIO_DATA1]",
43263fc36cdSLinus Walleij		"[WL_SDIO_DATA2]",
43363fc36cdSLinus Walleij		"[WL_SDIO_DATA3]",
43463fc36cdSLinus Walleij		"", "";
43563fc36cdSLinus Walleij};
43663fc36cdSLinus Walleij
43763fc36cdSLinus Walleij&gpio22 {
43863fc36cdSLinus Walleij	/* GPIO_176-GPIO_183 */
43963fc36cdSLinus Walleij	gpio-line-names =
44063fc36cdSLinus Walleij		"[GPIO_176_PMU_PWR_HOLD]",
44163fc36cdSLinus Walleij		"NA",
44263fc36cdSLinus Walleij		"[SYSCLK_EN]",
44363fc36cdSLinus Walleij		"GPIO_179_WL_WAKEUP_AP",
44463fc36cdSLinus Walleij		"GPIO_180_HDMI_INT",
44563fc36cdSLinus Walleij		"NA",
44663fc36cdSLinus Walleij		"GPIO-F", /* LSEC pin 28: LCD_BL_PWM */
44763fc36cdSLinus Walleij		"[I2C0_SCL]"; /* LSEC pin 15 */
44863fc36cdSLinus Walleij};
44963fc36cdSLinus Walleij
45063fc36cdSLinus Walleij&gpio23 {
45163fc36cdSLinus Walleij	/* GPIO_184-GPIO_191 */
45263fc36cdSLinus Walleij	gpio-line-names =
45363fc36cdSLinus Walleij		"[I2C0_SDA]", /* LSEC pin 17 */
45463fc36cdSLinus Walleij		"[I2C1_SCL]", /* Actual SoC I2C1 */
45563fc36cdSLinus Walleij		"[I2C1_SDA]", /* Actual SoC I2C1 */
45663fc36cdSLinus Walleij		"[I2C1_SCL]", /* LSEC pin 19: I2C7_SCL */
45763fc36cdSLinus Walleij		"[I2C1_SDA]", /* LSEC pin 21: I2C7_SDA */
45863fc36cdSLinus Walleij		"GPIO_189_USER_LED3",
45963fc36cdSLinus Walleij		"GPIO_190_USER_LED4",
46063fc36cdSLinus Walleij		"";
46163fc36cdSLinus Walleij};
46263fc36cdSLinus Walleij
46363fc36cdSLinus Walleij&gpio24 {
46463fc36cdSLinus Walleij	/* GPIO_192-GPIO_199 */
46563fc36cdSLinus Walleij	gpio-line-names =
46663fc36cdSLinus Walleij		"[PCM_DI]", /* LSEC pin 22: GPIO_192_I2S0_DI */
46763fc36cdSLinus Walleij		"[PCM_DO]", /* LSEC pin 20: GPIO_193_I2S0_DO */
46863fc36cdSLinus Walleij		"[PCM_CLK]", /* LSEC pin 18: GPIO_194_I2S0_XCLK */
46963fc36cdSLinus Walleij		"[PCM_FS]", /* LSEC pin 16: GPIO_195_I2S0_XFS */
47063fc36cdSLinus Walleij		"[GPIO_196_I2S2_DI]",
47163fc36cdSLinus Walleij		"[GPIO_197_I2S2_DO]",
47263fc36cdSLinus Walleij		"[GPIO_198_I2S2_XCLK]",
47363fc36cdSLinus Walleij		"[GPIO_199_I2S2_XFS]";
47463fc36cdSLinus Walleij};
47563fc36cdSLinus Walleij
47663fc36cdSLinus Walleij&gpio25 {
47763fc36cdSLinus Walleij	/* GPIO_200-GPIO_207 */
47863fc36cdSLinus Walleij	gpio-line-names =
47963fc36cdSLinus Walleij		"NC",
48063fc36cdSLinus Walleij		"NC",
48163fc36cdSLinus Walleij		"GPIO_202_VBUS_TYPEC",
48263fc36cdSLinus Walleij		"GPIO_203_SD_DET",
48363fc36cdSLinus Walleij		"GPIO_204_PMU12_IRQ_N",
48463fc36cdSLinus Walleij		"GPIO_205_WIFI_ACTIVE",
48563fc36cdSLinus Walleij		"GPIO_206_USBSW_SEL",
48663fc36cdSLinus Walleij		"GPIO_207_BT_ACTIVE";
48763fc36cdSLinus Walleij};
48863fc36cdSLinus Walleij
48963fc36cdSLinus Walleij&gpio26 {
49063fc36cdSLinus Walleij	/* GPIO_208-GPIO_215 */
49163fc36cdSLinus Walleij	gpio-line-names =
49263fc36cdSLinus Walleij		"GPIO-A", /* LSEC pin 23: GPIO_208 */
49363fc36cdSLinus Walleij		"GPIO-B", /* LSEC pin 24: GPIO_209 */
49463fc36cdSLinus Walleij		"GPIO-C", /* LSEC pin 25: GPIO_210 */
49563fc36cdSLinus Walleij		"GPIO-D", /* LSEC pin 26: GPIO_211 */
49663fc36cdSLinus Walleij		"GPIO-E", /* LSEC pin 27: GPIO_212 */
49763fc36cdSLinus Walleij		"[PCIE_CLKREQ_N]",
49863fc36cdSLinus Walleij		"[PCIE_WAKE_N]",
49963fc36cdSLinus Walleij		"[SPI0_CLK]"; /* LSEC pin 8: SPI2_CLK */
50063fc36cdSLinus Walleij};
50163fc36cdSLinus Walleij
50263fc36cdSLinus Walleij&gpio27 {
50363fc36cdSLinus Walleij	/* GPIO_216-GPIO_223 */
50463fc36cdSLinus Walleij	gpio-line-names =
50563fc36cdSLinus Walleij		"[SPI0_DIN]", /* LSEC pin 10: SPI2_DI */
50663fc36cdSLinus Walleij		"[SPI0_DOUT]", /* LSEC pin 14: SPI2_DO */
50763fc36cdSLinus Walleij		"[SPI0_CS]", /* LSEC pin 12: SPI2_CS0_N */
50863fc36cdSLinus Walleij		"GPIO_219_CC_INT",
50963fc36cdSLinus Walleij		"NC",
51063fc36cdSLinus Walleij		"NC",
51163fc36cdSLinus Walleij		"[PMU_INT]",
51263fc36cdSLinus Walleij		"";
51363fc36cdSLinus Walleij};
51463fc36cdSLinus Walleij
51563fc36cdSLinus Walleij&gpio28 {
51663fc36cdSLinus Walleij	/* GPIO_224-GPIO_231 */
51763fc36cdSLinus Walleij	gpio-line-names =
51863fc36cdSLinus Walleij		"", "", "", "", "", "", "", "";
51963fc36cdSLinus Walleij};
52063fc36cdSLinus Walleij
5215f8a3b77SZhangfei Gao&i2c0 {
5225f8a3b77SZhangfei Gao	/* On Low speed expansion */
5235f8a3b77SZhangfei Gao	label = "LS-I2C0";
5245f8a3b77SZhangfei Gao	status = "okay";
5255f8a3b77SZhangfei Gao};
5265f8a3b77SZhangfei Gao
5275f8a3b77SZhangfei Gao&i2c1 {
5285f8a3b77SZhangfei Gao	status = "okay";
5295f8a3b77SZhangfei Gao
530*47e2843fSJohn Stultz	rt1711h: rt1711h@4e {
531*47e2843fSJohn Stultz		compatible = "richtek,rt1711h";
532*47e2843fSJohn Stultz		reg = <0x4e>;
533*47e2843fSJohn Stultz		status = "ok";
534*47e2843fSJohn Stultz		interrupt-parent = <&gpio27>;
535*47e2843fSJohn Stultz		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
536*47e2843fSJohn Stultz		pinctrl-names = "default";
537*47e2843fSJohn Stultz		pinctrl-0 = <&usb_cfg_func>;
538*47e2843fSJohn Stultz
539*47e2843fSJohn Stultz		usb_con: connector {
540*47e2843fSJohn Stultz			compatible = "usb-c-connector";
541*47e2843fSJohn Stultz			label = "USB-C";
542*47e2843fSJohn Stultz			data-role = "dual";
543*47e2843fSJohn Stultz			power-role = "dual";
544*47e2843fSJohn Stultz			try-power-role = "sink";
545*47e2843fSJohn Stultz			source-pdos = <PDO_FIXED(5000, 500, PDO_FIXED_USB_COMM)>;
546*47e2843fSJohn Stultz			sink-pdos = <PDO_FIXED(5000, 500, PDO_FIXED_USB_COMM)
547*47e2843fSJohn Stultz				PDO_VAR(5000, 5000, 1000)>;
548*47e2843fSJohn Stultz			op-sink-microwatt = <10000000>;
549*47e2843fSJohn Stultz
550*47e2843fSJohn Stultz			ports {
551*47e2843fSJohn Stultz				#address-cells = <1>;
552*47e2843fSJohn Stultz				#size-cells = <0>;
553*47e2843fSJohn Stultz				port@1 {
554*47e2843fSJohn Stultz					reg = <1>;
555*47e2843fSJohn Stultz					usb_con_ss: endpoint {
556*47e2843fSJohn Stultz						remote-endpoint = <&dwc3_ss>;
557*47e2843fSJohn Stultz					};
558*47e2843fSJohn Stultz				};
559*47e2843fSJohn Stultz			};
560*47e2843fSJohn Stultz		};
561*47e2843fSJohn Stultz		port {
562*47e2843fSJohn Stultz			#address-cells = <1>;
563*47e2843fSJohn Stultz			#size-cells = <0>;
564*47e2843fSJohn Stultz
565*47e2843fSJohn Stultz			rt1711h_ep: endpoint@0 {
566*47e2843fSJohn Stultz				reg = <0>;
567*47e2843fSJohn Stultz				remote-endpoint = <&dwc3_role_switch>;
568*47e2843fSJohn Stultz			};
569*47e2843fSJohn Stultz		};
570*47e2843fSJohn Stultz	};
571*47e2843fSJohn Stultz
5725f8a3b77SZhangfei Gao	adv7533: adv7533@39 {
5735f8a3b77SZhangfei Gao		status = "ok";
5745f8a3b77SZhangfei Gao		compatible = "adi,adv7533";
5755f8a3b77SZhangfei Gao		reg = <0x39>;
5765f8a3b77SZhangfei Gao	};
5775f8a3b77SZhangfei Gao};
5785f8a3b77SZhangfei Gao
5795f8a3b77SZhangfei Gao&i2c7 {
5805f8a3b77SZhangfei Gao	/* On Low speed expansion */
5815f8a3b77SZhangfei Gao	label = "LS-I2C1";
5825f8a3b77SZhangfei Gao	status = "okay";
5835f8a3b77SZhangfei Gao};
5845f8a3b77SZhangfei Gao
585254b07b2SChen Feng&uart3 {
586254b07b2SChen Feng	/* On Low speed expansion */
587254b07b2SChen Feng	label = "LS-UART0";
588254b07b2SChen Feng	status = "okay";
589254b07b2SChen Feng};
590254b07b2SChen Feng
5912e9b4447SGuodong Xu&uart4 {
5922e9b4447SGuodong Xu	status = "okay";
5932e9b4447SGuodong Xu
5942e9b4447SGuodong Xu	bluetooth {
5952e9b4447SGuodong Xu		compatible = "ti,wl1837-st";
5962e9b4447SGuodong Xu		enable-gpios = <&gpio15 6 GPIO_ACTIVE_HIGH>;
597bf1ff532SGuodong Xu		max-speed = <3000000>;
5982e9b4447SGuodong Xu	};
5992e9b4447SGuodong Xu};
6002e9b4447SGuodong Xu
601254b07b2SChen Feng&uart6 {
602254b07b2SChen Feng	/* On Low speed expansion */
603254b07b2SChen Feng	label = "LS-UART1";
60435ca8168SChen Feng	status = "okay";
60535ca8168SChen Feng};
60638810497SWang Xiaoyin
60738810497SWang Xiaoyin&spi2 {
60838810497SWang Xiaoyin	/* On Low speed expansion */
60938810497SWang Xiaoyin	label = "LS-SPI0";
61038810497SWang Xiaoyin	status = "okay";
61138810497SWang Xiaoyin};
61238810497SWang Xiaoyin
61338810497SWang Xiaoyin&spi3 {
61438810497SWang Xiaoyin	/* On High speed expansion */
61538810497SWang Xiaoyin	label = "HS-SPI1";
61638810497SWang Xiaoyin	status = "okay";
61738810497SWang Xiaoyin};
618804d7d7aSLi Wei
619804d7d7aSLi Wei&dwmmc1 {
620f0ab786fSoscardagrach	bus-width = <0x4>;
621f0ab786fSoscardagrach	cap-sd-highspeed;
622f0ab786fSoscardagrach	sd-uhs-sdr12;
623f0ab786fSoscardagrach	sd-uhs-sdr25;
624f0ab786fSoscardagrach	sd-uhs-sdr50;
625f0ab786fSoscardagrach	sd-uhs-sdr104;
626f0ab786fSoscardagrach	disable-wp;
62711d1447eSVincent Guittot	cd-gpios = <&gpio25 3 GPIO_ACTIVE_LOW>;
628f0ab786fSoscardagrach	pinctrl-names = "default";
629f0ab786fSoscardagrach	pinctrl-0 = <&sd_pmx_func
630f0ab786fSoscardagrach		     &sd_clk_cfg_func
631f0ab786fSoscardagrach		     &sd_cfg_func>;
632804d7d7aSLi Wei	vmmc-supply = <&ldo16>;
633804d7d7aSLi Wei	vqmmc-supply = <&ldo9>;
634804d7d7aSLi Wei	status = "okay";
635804d7d7aSLi Wei};
6367d8c3667SGuodong Xu
6377d8c3667SGuodong Xu&dwmmc2 { /* WIFI */
638f0ab786fSoscardagrach	bus-width = <0x4>;
6397d8c3667SGuodong Xu	non-removable;
640f0ab786fSoscardagrach	broken-cd;
641a30449ebSoscardagrach	cap-power-off-card;
642f0ab786fSoscardagrach	pinctrl-names = "default";
643f0ab786fSoscardagrach	pinctrl-0 = <&sdio_pmx_func
644f0ab786fSoscardagrach		     &sdio_clk_cfg_func
645f0ab786fSoscardagrach		     &sdio_cfg_func>;
646f0ab786fSoscardagrach	/* WL_EN */
647f0ab786fSoscardagrach	vmmc-supply = <&wlan_en>;
6487d8c3667SGuodong Xu	status = "ok";
6497d8c3667SGuodong Xu
6507d8c3667SGuodong Xu	wlcore: wlcore@2 {
6517d8c3667SGuodong Xu		compatible = "ti,wl1837";
6527d8c3667SGuodong Xu		reg = <2>;      /* sdio func num */
6537d8c3667SGuodong Xu		/* WL_IRQ, GPIO_179_WL_WAKEUP_AP */
6547d8c3667SGuodong Xu		interrupt-parent = <&gpio22>;
6557d8c3667SGuodong Xu		interrupts = <3 IRQ_TYPE_EDGE_RISING>;
6567d8c3667SGuodong Xu	};
6577d8c3667SGuodong Xu};
658*47e2843fSJohn Stultz
659*47e2843fSJohn Stultz&dwc3 { /* USB */
660*47e2843fSJohn Stultz	dr_mode = "otg";
661*47e2843fSJohn Stultz	maximum-speed = "super-speed";
662*47e2843fSJohn Stultz	phy_type = "utmi";
663*47e2843fSJohn Stultz	snps,dis-del-phy-power-chg-quirk;
664*47e2843fSJohn Stultz	snps,lfps_filter_quirk;
665*47e2843fSJohn Stultz	snps,dis_u2_susphy_quirk;
666*47e2843fSJohn Stultz	snps,dis_u3_susphy_quirk;
667*47e2843fSJohn Stultz	snps,tx_de_emphasis_quirk;
668*47e2843fSJohn Stultz	snps,tx_de_emphasis = <1>;
669*47e2843fSJohn Stultz	snps,dis_enblslpm_quirk;
670*47e2843fSJohn Stultz	snps,gctl-reset-quirk;
671*47e2843fSJohn Stultz	usb-role-switch;
672*47e2843fSJohn Stultz	role-switch-default-mode = "host";
673*47e2843fSJohn Stultz	port {
674*47e2843fSJohn Stultz		#address-cells = <1>;
675*47e2843fSJohn Stultz		#size-cells = <0>;
676*47e2843fSJohn Stultz		dwc3_role_switch: endpoint@0 {
677*47e2843fSJohn Stultz			reg = <0>;
678*47e2843fSJohn Stultz			remote-endpoint = <&rt1711h_ep>;
679*47e2843fSJohn Stultz		};
680*47e2843fSJohn Stultz
681*47e2843fSJohn Stultz		dwc3_ss: endpoint@1 {
682*47e2843fSJohn Stultz			reg = <1>;
683*47e2843fSJohn Stultz			remote-endpoint = <&usb_con_ss>;
684*47e2843fSJohn Stultz		};
685*47e2843fSJohn Stultz	};
686*47e2843fSJohn Stultz};
687