1b2441318SGreg Kroah-Hartman// SPDX-License-Identifier: GPL-2.0 235ca8168SChen Feng/* 335ca8168SChen Feng * dts file for Hisilicon HiKey960 Development Board 435ca8168SChen Feng * 535ca8168SChen Feng * Copyright (C) 2016, Hisilicon Ltd. 635ca8168SChen Feng * 735ca8168SChen Feng */ 835ca8168SChen Feng 935ca8168SChen Feng/dts-v1/; 1035ca8168SChen Feng 1135ca8168SChen Feng#include "hi3660.dtsi" 12d4e1eaeeSWang Xiaoyin#include "hikey960-pinctrl.dtsi" 132e9b4447SGuodong Xu#include <dt-bindings/gpio/gpio.h> 148cb53a8dSChen Jun#include <dt-bindings/input/input.h> 158cb53a8dSChen Jun#include <dt-bindings/interrupt-controller/irq.h> 1635ca8168SChen Feng 1735ca8168SChen Feng/ { 1835ca8168SChen Feng model = "HiKey960"; 19b6c93186SGuodong Xu compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; 2035ca8168SChen Feng 2135ca8168SChen Feng aliases { 22804d7d7aSLi Wei mshc1 = &dwmmc1; 23804d7d7aSLi Wei mshc2 = &dwmmc2; 24254b07b2SChen Feng serial0 = &uart0; 25254b07b2SChen Feng serial1 = &uart1; 26254b07b2SChen Feng serial2 = &uart2; 27254b07b2SChen Feng serial3 = &uart3; 28254b07b2SChen Feng serial4 = &uart4; 29254b07b2SChen Feng serial5 = &uart5; 30254b07b2SChen Feng serial6 = &uart6; 3135ca8168SChen Feng }; 3235ca8168SChen Feng 3335ca8168SChen Feng chosen { 34254b07b2SChen Feng stdout-path = "serial6:115200n8"; 3535ca8168SChen Feng }; 3635ca8168SChen Feng 3735ca8168SChen Feng memory@0 { 3835ca8168SChen Feng device_type = "memory"; 3935ca8168SChen Feng /* rewrite this at bootloader */ 4035ca8168SChen Feng reg = <0x0 0x0 0x0 0x0>; 4135ca8168SChen Feng }; 428cb53a8dSChen Jun 439c24dc9dSGuodong Xu reserved-memory { 449c24dc9dSGuodong Xu #address-cells = <2>; 459c24dc9dSGuodong Xu #size-cells = <2>; 469c24dc9dSGuodong Xu ranges; 479c24dc9dSGuodong Xu 489c24dc9dSGuodong Xu ramoops@32000000 { 499c24dc9dSGuodong Xu compatible = "ramoops"; 509c24dc9dSGuodong Xu reg = <0x0 0x32000000 0x0 0x00100000>; 519c24dc9dSGuodong Xu record-size = <0x00020000>; 529c24dc9dSGuodong Xu console-size = <0x00020000>; 539c24dc9dSGuodong Xu ftrace-size = <0x00020000>; 549c24dc9dSGuodong Xu }; 559c24dc9dSGuodong Xu }; 569c24dc9dSGuodong Xu 57b6b681c1SGuodong Xu reboot-mode-syscon@32100000 { 58b6b681c1SGuodong Xu compatible = "syscon", "simple-mfd"; 59b6b681c1SGuodong Xu reg = <0x0 0x32100000 0x0 0x00001000>; 60b6b681c1SGuodong Xu 61b6b681c1SGuodong Xu reboot-mode { 62b6b681c1SGuodong Xu compatible = "syscon-reboot-mode"; 63b6b681c1SGuodong Xu offset = <0x0>; 64b6b681c1SGuodong Xu 65b6b681c1SGuodong Xu mode-normal = <0x77665501>; 66b6b681c1SGuodong Xu mode-bootloader = <0x77665500>; 67b6b681c1SGuodong Xu mode-recovery = <0x77665502>; 68b6b681c1SGuodong Xu }; 69b6b681c1SGuodong Xu }; 70b6b681c1SGuodong Xu 718cb53a8dSChen Jun keys { 728cb53a8dSChen Jun compatible = "gpio-keys"; 738cb53a8dSChen Jun pinctrl-names = "default"; 748cb53a8dSChen Jun pinctrl-0 = <&pwr_key_pmx_func &pwr_key_cfg_func>; 758cb53a8dSChen Jun 768cb53a8dSChen Jun power { 778cb53a8dSChen Jun wakeup-source; 788cb53a8dSChen Jun gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; 798cb53a8dSChen Jun label = "GPIO Power"; 808cb53a8dSChen Jun linux,code = <KEY_POWER>; 818cb53a8dSChen Jun }; 828cb53a8dSChen Jun }; 83fc5f2ed6SGuodong Xu 84fc5f2ed6SGuodong Xu leds { 85fc5f2ed6SGuodong Xu compatible = "gpio-leds"; 86fc5f2ed6SGuodong Xu 87fc5f2ed6SGuodong Xu user_led1 { 8828b45da9SManivannan Sadhasivam label = "green:user1"; 89fc5f2ed6SGuodong Xu /* gpio_150_user_led1 */ 90fc5f2ed6SGuodong Xu gpios = <&gpio18 6 0>; 91fc5f2ed6SGuodong Xu linux,default-trigger = "heartbeat"; 92fc5f2ed6SGuodong Xu }; 93fc5f2ed6SGuodong Xu 94fc5f2ed6SGuodong Xu user_led2 { 9528b45da9SManivannan Sadhasivam label = "green:user2"; 96fc5f2ed6SGuodong Xu /* gpio_151_user_led2 */ 97fc5f2ed6SGuodong Xu gpios = <&gpio18 7 0>; 9828b45da9SManivannan Sadhasivam linux,default-trigger = "none"; 99fc5f2ed6SGuodong Xu }; 100fc5f2ed6SGuodong Xu 101fc5f2ed6SGuodong Xu user_led3 { 10228b45da9SManivannan Sadhasivam label = "green:user3"; 103fc5f2ed6SGuodong Xu /* gpio_189_user_led3 */ 104fc5f2ed6SGuodong Xu gpios = <&gpio23 5 0>; 10528b45da9SManivannan Sadhasivam linux,default-trigger = "mmc0"; 106fc5f2ed6SGuodong Xu }; 107fc5f2ed6SGuodong Xu 108fc5f2ed6SGuodong Xu user_led4 { 10928b45da9SManivannan Sadhasivam label = "green:user4"; 110fc5f2ed6SGuodong Xu /* gpio_190_user_led4 */ 111fc5f2ed6SGuodong Xu gpios = <&gpio23 6 0>; 1125d4afa73SAmit Kucheria panic-indicator; 11328b45da9SManivannan Sadhasivam linux,default-trigger = "none"; 114fc5f2ed6SGuodong Xu }; 115fc5f2ed6SGuodong Xu 116fc5f2ed6SGuodong Xu wlan_active_led { 11728b45da9SManivannan Sadhasivam label = "yellow:wlan"; 118fc5f2ed6SGuodong Xu /* gpio_205_wifi_active */ 119fc5f2ed6SGuodong Xu gpios = <&gpio25 5 0>; 120fc5f2ed6SGuodong Xu linux,default-trigger = "phy0tx"; 121fc5f2ed6SGuodong Xu default-state = "off"; 122fc5f2ed6SGuodong Xu }; 123fc5f2ed6SGuodong Xu 124fc5f2ed6SGuodong Xu bt_active_led { 12528b45da9SManivannan Sadhasivam label = "blue:bt"; 126fc5f2ed6SGuodong Xu gpios = <&gpio25 7 0>; 127fc5f2ed6SGuodong Xu /* gpio_207_user_led1 */ 128fc5f2ed6SGuodong Xu linux,default-trigger = "hci0-power"; 129fc5f2ed6SGuodong Xu default-state = "off"; 130fc5f2ed6SGuodong Xu }; 131fc5f2ed6SGuodong Xu }; 132e02045aaSWang Xiaoyin 133e02045aaSWang Xiaoyin pmic: pmic@fff34000 { 134e02045aaSWang Xiaoyin compatible = "hisilicon,hi6421v530-pmic"; 135e02045aaSWang Xiaoyin reg = <0x0 0xfff34000 0x0 0x1000>; 136e02045aaSWang Xiaoyin interrupt-controller; 137e02045aaSWang Xiaoyin #interrupt-cells = <2>; 138e02045aaSWang Xiaoyin 139e02045aaSWang Xiaoyin regulators { 140e02045aaSWang Xiaoyin ldo3: LDO3 { /* HDMI */ 141e02045aaSWang Xiaoyin regulator-name = "VOUT3_1V85"; 142e02045aaSWang Xiaoyin regulator-min-microvolt = <1800000>; 143e02045aaSWang Xiaoyin regulator-max-microvolt = <2200000>; 144e02045aaSWang Xiaoyin regulator-enable-ramp-delay = <120>; 145e02045aaSWang Xiaoyin }; 146e02045aaSWang Xiaoyin 147e02045aaSWang Xiaoyin ldo9: LDO9 { /* SDCARD I/O */ 148e02045aaSWang Xiaoyin regulator-name = "VOUT9_1V8_2V95"; 149e02045aaSWang Xiaoyin regulator-min-microvolt = <1750000>; 150e02045aaSWang Xiaoyin regulator-max-microvolt = <3300000>; 151e02045aaSWang Xiaoyin regulator-enable-ramp-delay = <240>; 152e02045aaSWang Xiaoyin }; 153e02045aaSWang Xiaoyin 154e02045aaSWang Xiaoyin ldo11: LDO11 { /* Low Speed Connector */ 155e02045aaSWang Xiaoyin regulator-name = "VOUT11_1V8_2V95"; 156e02045aaSWang Xiaoyin regulator-min-microvolt = <1750000>; 157e02045aaSWang Xiaoyin regulator-max-microvolt = <3300000>; 158e02045aaSWang Xiaoyin regulator-enable-ramp-delay = <240>; 159e02045aaSWang Xiaoyin }; 160e02045aaSWang Xiaoyin 161e02045aaSWang Xiaoyin ldo15: LDO15 { /* UFS VCC */ 162e02045aaSWang Xiaoyin regulator-name = "VOUT15_3V0"; 163e02045aaSWang Xiaoyin regulator-min-microvolt = <1750000>; 164e02045aaSWang Xiaoyin regulator-max-microvolt = <3000000>; 165e02045aaSWang Xiaoyin regulator-boot-on; 166e02045aaSWang Xiaoyin regulator-always-on; 167e02045aaSWang Xiaoyin regulator-enable-ramp-delay = <120>; 168e02045aaSWang Xiaoyin }; 169e02045aaSWang Xiaoyin 170e02045aaSWang Xiaoyin ldo16: LDO16 { /* SD VDD */ 171e02045aaSWang Xiaoyin regulator-name = "VOUT16_2V95"; 172e02045aaSWang Xiaoyin regulator-min-microvolt = <1750000>; 173e02045aaSWang Xiaoyin regulator-max-microvolt = <3000000>; 174e02045aaSWang Xiaoyin regulator-enable-ramp-delay = <360>; 175e02045aaSWang Xiaoyin }; 176e02045aaSWang Xiaoyin }; 177e02045aaSWang Xiaoyin }; 1787d8c3667SGuodong Xu 1797d8c3667SGuodong Xu wlan_en: wlan-en-1-8v { 1807d8c3667SGuodong Xu compatible = "regulator-fixed"; 1817d8c3667SGuodong Xu regulator-name = "wlan-en-regulator"; 1827d8c3667SGuodong Xu regulator-min-microvolt = <1800000>; 1837d8c3667SGuodong Xu regulator-max-microvolt = <1800000>; 1847d8c3667SGuodong Xu 1857d8c3667SGuodong Xu /* GPIO_051_WIFI_EN */ 1867d8c3667SGuodong Xu gpio = <&gpio6 3 0>; 1877d8c3667SGuodong Xu 1887d8c3667SGuodong Xu /* WLAN card specific delay */ 1897d8c3667SGuodong Xu startup-delay-us = <70000>; 1907d8c3667SGuodong Xu enable-active-high; 1917d8c3667SGuodong Xu }; 192313aebdaSVictor Chong 193313aebdaSVictor Chong firmware { 194313aebdaSVictor Chong optee { 195313aebdaSVictor Chong compatible = "linaro,optee-tz"; 196313aebdaSVictor Chong method = "smc"; 197313aebdaSVictor Chong }; 198313aebdaSVictor Chong }; 19935ca8168SChen Feng}; 20035ca8168SChen Feng 20163fc36cdSLinus Walleij/* 20263fc36cdSLinus Walleij * Legend: proper name = the GPIO line is used as GPIO 20363fc36cdSLinus Walleij * NC = not connected (pin out but not routed from the chip to 20463fc36cdSLinus Walleij * anything the board) 20563fc36cdSLinus Walleij * "[PER]" = pin is muxed for [peripheral] (not GPIO) 20663fc36cdSLinus Walleij * "" = no idea, schematic doesn't say, could be 20763fc36cdSLinus Walleij * unrouted (not connected to any external pin) 20863fc36cdSLinus Walleij * LSEC = Low Speed External Connector 20963fc36cdSLinus Walleij * HSEC = High Speed External Connector 21063fc36cdSLinus Walleij * 21163fc36cdSLinus Walleij * Line names are taken from "HiKey 960 Board ver A" schematics 21263fc36cdSLinus Walleij * from Huawei. The 40 pin low speed expansion connector is named 21363fc36cdSLinus Walleij * J2002 63453-140LF. 21463fc36cdSLinus Walleij * 21563fc36cdSLinus Walleij * For the lines routed to the external connectors the 21663fc36cdSLinus Walleij * lines are named after the 96Boards CE Specification 1.0, 21763fc36cdSLinus Walleij * Appendix "Expansion Connector Signal Description". 21863fc36cdSLinus Walleij * 21963fc36cdSLinus Walleij * When the 96Board naming of a line and the schematic name of 22063fc36cdSLinus Walleij * the same line are in conflict, the 96Board specification 22163fc36cdSLinus Walleij * takes precedence, which means that the external UART on the 22263fc36cdSLinus Walleij * LSEC is named UART0 while the schematic and SoC names this 22363fc36cdSLinus Walleij * UART3. This is only for the informational lines i.e. "[FOO]", 22463fc36cdSLinus Walleij * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 22563fc36cdSLinus Walleij * ones actually used for GPIO. 22663fc36cdSLinus Walleij */ 22763fc36cdSLinus Walleij&gpio0 { 22863fc36cdSLinus Walleij /* GPIO_000-GPIO_007 */ 22963fc36cdSLinus Walleij gpio-line-names = 23063fc36cdSLinus Walleij "", 23163fc36cdSLinus Walleij "TP901", /* TEST_MODE connected to TP901 */ 23263fc36cdSLinus Walleij "[PMU0_SSI]", 23363fc36cdSLinus Walleij "[PMU1_SSI]", 23463fc36cdSLinus Walleij "[PMU2_SSI]", 23563fc36cdSLinus Walleij "[PMU0_CLKOUT]", 23663fc36cdSLinus Walleij "[JTAG_TCK]", 23763fc36cdSLinus Walleij "[JTAG_TMS]"; 23863fc36cdSLinus Walleij}; 23963fc36cdSLinus Walleij 24063fc36cdSLinus Walleij&gpio1 { 24163fc36cdSLinus Walleij /* GPIO_008-GPIO_015 */ 24263fc36cdSLinus Walleij gpio-line-names = 24363fc36cdSLinus Walleij "[JTAG_TRST_N]", 24463fc36cdSLinus Walleij "[JTAG_TDI]", 24563fc36cdSLinus Walleij "[JTAG_TDO]", 24663fc36cdSLinus Walleij "NC", "NC", 24763fc36cdSLinus Walleij "[I2C3_SCL]", 24863fc36cdSLinus Walleij "[I2C3_SDA]", 24963fc36cdSLinus Walleij "NC"; 25063fc36cdSLinus Walleij}; 25163fc36cdSLinus Walleij 25263fc36cdSLinus Walleij&gpio2 { 25363fc36cdSLinus Walleij /* GPIO_016-GPIO_023 */ 25463fc36cdSLinus Walleij gpio-line-names = 25563fc36cdSLinus Walleij "NC", "NC", "NC", 25663fc36cdSLinus Walleij "GPIO-J", /* LSEC pin 32: GPIO_019 */ 25763fc36cdSLinus Walleij "GPIO_020_HDMI_SEL", 25863fc36cdSLinus Walleij "GPIO-L", /* LSEC pin 34: GPIO_021 */ 25963fc36cdSLinus Walleij "GPIO_022_UFSBUCK_INT_N", 26063fc36cdSLinus Walleij "GPIO-G"; /* LSEC pin 29: LCD_TE0 */ 26163fc36cdSLinus Walleij}; 26263fc36cdSLinus Walleij 26363fc36cdSLinus Walleij&gpio3 { 26463fc36cdSLinus Walleij /* GPIO_024-GPIO_031 */ 26563fc36cdSLinus Walleij /* The rail from pin BK36 is named LCD_TE0, we assume to be muxed as GPIO for GPIO-G */ 26663fc36cdSLinus Walleij gpio-line-names = 26763fc36cdSLinus Walleij "[CSI0_MCLK]", /* HSEC pin 15: ISP_CCLK0_MCAM */ 26863fc36cdSLinus Walleij "[CSI1_MCLK]", /* HSEC pin 17: ISP_CCLK1_SCAM */ 26963fc36cdSLinus Walleij "NC", 27063fc36cdSLinus Walleij "[I2C2_SCL]", /* HSEC pin 32: ISP_SCL0 */ 27163fc36cdSLinus Walleij "[I2C2_SDA]", /* HSEC pin 34: ISP_SDA0 */ 27263fc36cdSLinus Walleij "[I2C3_SCL]", /* HSEC pin 36: ISP_SCL1 */ 27363fc36cdSLinus Walleij "[I2C3_SDA]", /* HSEC pin 38: ISP_SDA1 */ 27463fc36cdSLinus Walleij "NC"; 27563fc36cdSLinus Walleij}; 27663fc36cdSLinus Walleij 27763fc36cdSLinus Walleij&gpio4 { 27863fc36cdSLinus Walleij /* GPIO_032-GPIO_039 */ 27963fc36cdSLinus Walleij gpio-line-names = 28063fc36cdSLinus Walleij "NC", "NC", 28163fc36cdSLinus Walleij "PWR_BTN_N", /* LSEC pin 4: GPIO_034_PWRON_DET */ 28263fc36cdSLinus Walleij "GPIO_035_PMU2_EN", 28363fc36cdSLinus Walleij "GPIO_036_USB_HUB_RESET", 28463fc36cdSLinus Walleij "NC", "NC", "NC"; 28563fc36cdSLinus Walleij}; 28663fc36cdSLinus Walleij 28763fc36cdSLinus Walleij&gpio5 { 28863fc36cdSLinus Walleij /* GPIO_040-GPIO_047 */ 28963fc36cdSLinus Walleij gpio-line-names = 29063fc36cdSLinus Walleij "GPIO-H", /* LSEC pin 30: GPIO_040_LCD_RST_N */ 29163fc36cdSLinus Walleij "GPIO_041_HDMI_PD", 29263fc36cdSLinus Walleij "TP904", /* Test point */ 29363fc36cdSLinus Walleij "TP905", /* Test point */ 29463fc36cdSLinus Walleij "NC", "NC", 29563fc36cdSLinus Walleij "GPIO_046_HUB_VDD33_EN", 29663fc36cdSLinus Walleij "GPIO_047_PMU1_EN"; 29763fc36cdSLinus Walleij}; 29863fc36cdSLinus Walleij 29963fc36cdSLinus Walleij&gpio6 { 30063fc36cdSLinus Walleij /* GPIO_048-GPIO_055 */ 30163fc36cdSLinus Walleij gpio-line-names = 30263fc36cdSLinus Walleij "NC", "NC", "NC", 30363fc36cdSLinus Walleij "GPIO_051_WIFI_EN", 30463fc36cdSLinus Walleij "GPIO-I", /* LSEC pin 31: GPIO_052_CAM0_RST_N */ 30563fc36cdSLinus Walleij /* 30663fc36cdSLinus Walleij * These two pins should be used for SD(IO) data according to the 30763fc36cdSLinus Walleij * 96boards specification but seems to be repurposed for a IRDA UART. 30863fc36cdSLinus Walleij * They are however named according to the spec. 30963fc36cdSLinus Walleij */ 31063fc36cdSLinus Walleij "[SD_DAT1]", /* HSEC pin 3: UART0_IRDA_RXD */ 31163fc36cdSLinus Walleij "[SD_DAT2]", /* HSEC pin 5: UART0_IRDA_TXD */ 31263fc36cdSLinus Walleij "[UART1_RXD]"; /* LSEC pin 13: DEBUG_UART6_RXD */ 31363fc36cdSLinus Walleij}; 31463fc36cdSLinus Walleij 31563fc36cdSLinus Walleij&gpio7 { 31663fc36cdSLinus Walleij /* GPIO_056-GPIO_063 */ 31763fc36cdSLinus Walleij gpio-line-names = 31863fc36cdSLinus Walleij "[UART1_TXD]", /* LSEC pin 11: DEBUG_UART6_TXD */ 31963fc36cdSLinus Walleij "[UART0_CTS]", /* LSEC pin 3: UART3_CTS_N */ 32063fc36cdSLinus Walleij "[UART0_RTS]", /* LSEC pin 9: UART3_RTS_N */ 32163fc36cdSLinus Walleij "[UART0_RXD]", /* LSEC pin 7: UART3_RXD */ 32263fc36cdSLinus Walleij "[UART0_TXD]", /* LSEC pin 5: UART3_TXD */ 32363fc36cdSLinus Walleij "[SOC_BT_UART4_CTS_N]", 32463fc36cdSLinus Walleij "[SOC_BT_UART4_RTS_N]", 32563fc36cdSLinus Walleij "[SOC_BT_UART4_RXD]"; 32663fc36cdSLinus Walleij}; 32763fc36cdSLinus Walleij 32863fc36cdSLinus Walleij&gpio8 { 32963fc36cdSLinus Walleij /* GPIO_064-GPIO_071 */ 33063fc36cdSLinus Walleij gpio-line-names = 33163fc36cdSLinus Walleij "[SOC_BT_UART4_TXD]", 33263fc36cdSLinus Walleij "NC", 33363fc36cdSLinus Walleij "[PMU_HKADC_SSI]", 33463fc36cdSLinus Walleij "NC", 33563fc36cdSLinus Walleij "GPIO_068_SEL", 33663fc36cdSLinus Walleij "NC", "NC", "NC"; 33763fc36cdSLinus Walleij 33863fc36cdSLinus Walleij}; 33963fc36cdSLinus Walleij 34063fc36cdSLinus Walleij&gpio9 { 34163fc36cdSLinus Walleij /* GPIO_072-GPIO_079 */ 34263fc36cdSLinus Walleij gpio-line-names = 34363fc36cdSLinus Walleij "NC", "NC", "NC", 34463fc36cdSLinus Walleij "GPIO-K", /* LSEC pin 33: GPIO_075_CAM1_RST_N */ 34563fc36cdSLinus Walleij "NC", "NC", "NC", "NC"; 34663fc36cdSLinus Walleij}; 34763fc36cdSLinus Walleij 34863fc36cdSLinus Walleij&gpio10 { 34963fc36cdSLinus Walleij /* GPIO_080-GPIO_087 */ 35063fc36cdSLinus Walleij gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC"; 35163fc36cdSLinus Walleij}; 35263fc36cdSLinus Walleij 35363fc36cdSLinus Walleij&gpio11 { 35463fc36cdSLinus Walleij /* GPIO_088-GPIO_095 */ 35563fc36cdSLinus Walleij gpio-line-names = 35663fc36cdSLinus Walleij "NC", 35763fc36cdSLinus Walleij "[PCIE_PERST_N]", 35863fc36cdSLinus Walleij "NC", "NC", "NC", "NC", "NC", "NC"; 35963fc36cdSLinus Walleij}; 36063fc36cdSLinus Walleij 36163fc36cdSLinus Walleij&gpio12 { 36263fc36cdSLinus Walleij /* GPIO_096-GPIO_103 */ 36363fc36cdSLinus Walleij gpio-line-names = "NC", "NC", "NC", "", "", "", "", "NC"; 36463fc36cdSLinus Walleij}; 36563fc36cdSLinus Walleij 36663fc36cdSLinus Walleij&gpio13 { 36763fc36cdSLinus Walleij /* GPIO_104-GPIO_111 */ 36863fc36cdSLinus Walleij gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC"; 36963fc36cdSLinus Walleij}; 37063fc36cdSLinus Walleij 37163fc36cdSLinus Walleij&gpio14 { 37263fc36cdSLinus Walleij /* GPIO_112-GPIO_119 */ 37363fc36cdSLinus Walleij gpio-line-names = "NC", "NC", "NC", "NC", "NC", "NC", "NC", "NC"; 37463fc36cdSLinus Walleij}; 37563fc36cdSLinus Walleij 37663fc36cdSLinus Walleij&gpio15 { 37763fc36cdSLinus Walleij /* GPIO_120-GPIO_127 */ 37863fc36cdSLinus Walleij gpio-line-names = 37963fc36cdSLinus Walleij "NC", "NC", "NC", "NC", "NC", "NC", 38063fc36cdSLinus Walleij "GPIO_126_BT_EN", 38163fc36cdSLinus Walleij "TP902"; /* GPIO_127_JTAG_SEL0 */ 38263fc36cdSLinus Walleij}; 38363fc36cdSLinus Walleij 38463fc36cdSLinus Walleij&gpio16 { 38563fc36cdSLinus Walleij /* GPIO_128-GPIO_135 */ 38663fc36cdSLinus Walleij gpio-line-names = "", "", "", "", "", "", "", ""; 38763fc36cdSLinus Walleij}; 38863fc36cdSLinus Walleij 38963fc36cdSLinus Walleij&gpio17 { 39063fc36cdSLinus Walleij /* GPIO_136-GPIO_143 */ 39163fc36cdSLinus Walleij gpio-line-names = "", "", "", "", "", "", "", ""; 39263fc36cdSLinus Walleij}; 39363fc36cdSLinus Walleij 39463fc36cdSLinus Walleij&gpio18 { 39563fc36cdSLinus Walleij /* GPIO_144-GPIO_151 */ 39663fc36cdSLinus Walleij gpio-line-names = 39763fc36cdSLinus Walleij "[UFS_REF_CLK]", 39863fc36cdSLinus Walleij "[UFS_RST_N]", 39963fc36cdSLinus Walleij "[SPI1_SCLK]", /* HSEC pin 9: GPIO_146_SPI3_CLK */ 40063fc36cdSLinus Walleij "[SPI1_DIN]", /* HSEC pin 11: GPIO_147_SPI3_DI */ 40163fc36cdSLinus Walleij "[SPI1_DOUT]", /* HSEC pin 1: GPIO_148_SPI3_DO */ 40263fc36cdSLinus Walleij "[SPI1_CS]", /* HSEC pin 7: GPIO_149_SPI3_CS0_N */ 40363fc36cdSLinus Walleij "GPIO_150_USER_LED1", 40463fc36cdSLinus Walleij "GPIO_151_USER_LED2"; 40563fc36cdSLinus Walleij}; 40663fc36cdSLinus Walleij 40763fc36cdSLinus Walleij&gpio19 { 40863fc36cdSLinus Walleij /* GPIO_152-GPIO_159 */ 40963fc36cdSLinus Walleij gpio-line-names = "NC", "NC", "NC", "NC", "", "", "", ""; 41063fc36cdSLinus Walleij}; 41163fc36cdSLinus Walleij 41263fc36cdSLinus Walleij&gpio20 { 41363fc36cdSLinus Walleij /* GPIO_160-GPIO_167 */ 41463fc36cdSLinus Walleij gpio-line-names = 41563fc36cdSLinus Walleij "[SD_CLK]", 41663fc36cdSLinus Walleij "[SD_CMD]", 41763fc36cdSLinus Walleij "[SD_DATA0]", 41863fc36cdSLinus Walleij "[SD_DATA1]", 41963fc36cdSLinus Walleij "[SD_DATA2]", 42063fc36cdSLinus Walleij "[SD_DATA3]", 42163fc36cdSLinus Walleij "", ""; 42263fc36cdSLinus Walleij}; 42363fc36cdSLinus Walleij 42463fc36cdSLinus Walleij&gpio21 { 42563fc36cdSLinus Walleij /* GPIO_168-GPIO_175 */ 42663fc36cdSLinus Walleij gpio-line-names = 42763fc36cdSLinus Walleij "[WL_SDIO_CLK]", 42863fc36cdSLinus Walleij "[WL_SDIO_CMD]", 42963fc36cdSLinus Walleij "[WL_SDIO_DATA0]", 43063fc36cdSLinus Walleij "[WL_SDIO_DATA1]", 43163fc36cdSLinus Walleij "[WL_SDIO_DATA2]", 43263fc36cdSLinus Walleij "[WL_SDIO_DATA3]", 43363fc36cdSLinus Walleij "", ""; 43463fc36cdSLinus Walleij}; 43563fc36cdSLinus Walleij 43663fc36cdSLinus Walleij&gpio22 { 43763fc36cdSLinus Walleij /* GPIO_176-GPIO_183 */ 43863fc36cdSLinus Walleij gpio-line-names = 43963fc36cdSLinus Walleij "[GPIO_176_PMU_PWR_HOLD]", 44063fc36cdSLinus Walleij "NA", 44163fc36cdSLinus Walleij "[SYSCLK_EN]", 44263fc36cdSLinus Walleij "GPIO_179_WL_WAKEUP_AP", 44363fc36cdSLinus Walleij "GPIO_180_HDMI_INT", 44463fc36cdSLinus Walleij "NA", 44563fc36cdSLinus Walleij "GPIO-F", /* LSEC pin 28: LCD_BL_PWM */ 44663fc36cdSLinus Walleij "[I2C0_SCL]"; /* LSEC pin 15 */ 44763fc36cdSLinus Walleij}; 44863fc36cdSLinus Walleij 44963fc36cdSLinus Walleij&gpio23 { 45063fc36cdSLinus Walleij /* GPIO_184-GPIO_191 */ 45163fc36cdSLinus Walleij gpio-line-names = 45263fc36cdSLinus Walleij "[I2C0_SDA]", /* LSEC pin 17 */ 45363fc36cdSLinus Walleij "[I2C1_SCL]", /* Actual SoC I2C1 */ 45463fc36cdSLinus Walleij "[I2C1_SDA]", /* Actual SoC I2C1 */ 45563fc36cdSLinus Walleij "[I2C1_SCL]", /* LSEC pin 19: I2C7_SCL */ 45663fc36cdSLinus Walleij "[I2C1_SDA]", /* LSEC pin 21: I2C7_SDA */ 45763fc36cdSLinus Walleij "GPIO_189_USER_LED3", 45863fc36cdSLinus Walleij "GPIO_190_USER_LED4", 45963fc36cdSLinus Walleij ""; 46063fc36cdSLinus Walleij}; 46163fc36cdSLinus Walleij 46263fc36cdSLinus Walleij&gpio24 { 46363fc36cdSLinus Walleij /* GPIO_192-GPIO_199 */ 46463fc36cdSLinus Walleij gpio-line-names = 46563fc36cdSLinus Walleij "[PCM_DI]", /* LSEC pin 22: GPIO_192_I2S0_DI */ 46663fc36cdSLinus Walleij "[PCM_DO]", /* LSEC pin 20: GPIO_193_I2S0_DO */ 46763fc36cdSLinus Walleij "[PCM_CLK]", /* LSEC pin 18: GPIO_194_I2S0_XCLK */ 46863fc36cdSLinus Walleij "[PCM_FS]", /* LSEC pin 16: GPIO_195_I2S0_XFS */ 46963fc36cdSLinus Walleij "[GPIO_196_I2S2_DI]", 47063fc36cdSLinus Walleij "[GPIO_197_I2S2_DO]", 47163fc36cdSLinus Walleij "[GPIO_198_I2S2_XCLK]", 47263fc36cdSLinus Walleij "[GPIO_199_I2S2_XFS]"; 47363fc36cdSLinus Walleij}; 47463fc36cdSLinus Walleij 47563fc36cdSLinus Walleij&gpio25 { 47663fc36cdSLinus Walleij /* GPIO_200-GPIO_207 */ 47763fc36cdSLinus Walleij gpio-line-names = 47863fc36cdSLinus Walleij "NC", 47963fc36cdSLinus Walleij "NC", 48063fc36cdSLinus Walleij "GPIO_202_VBUS_TYPEC", 48163fc36cdSLinus Walleij "GPIO_203_SD_DET", 48263fc36cdSLinus Walleij "GPIO_204_PMU12_IRQ_N", 48363fc36cdSLinus Walleij "GPIO_205_WIFI_ACTIVE", 48463fc36cdSLinus Walleij "GPIO_206_USBSW_SEL", 48563fc36cdSLinus Walleij "GPIO_207_BT_ACTIVE"; 48663fc36cdSLinus Walleij}; 48763fc36cdSLinus Walleij 48863fc36cdSLinus Walleij&gpio26 { 48963fc36cdSLinus Walleij /* GPIO_208-GPIO_215 */ 49063fc36cdSLinus Walleij gpio-line-names = 49163fc36cdSLinus Walleij "GPIO-A", /* LSEC pin 23: GPIO_208 */ 49263fc36cdSLinus Walleij "GPIO-B", /* LSEC pin 24: GPIO_209 */ 49363fc36cdSLinus Walleij "GPIO-C", /* LSEC pin 25: GPIO_210 */ 49463fc36cdSLinus Walleij "GPIO-D", /* LSEC pin 26: GPIO_211 */ 49563fc36cdSLinus Walleij "GPIO-E", /* LSEC pin 27: GPIO_212 */ 49663fc36cdSLinus Walleij "[PCIE_CLKREQ_N]", 49763fc36cdSLinus Walleij "[PCIE_WAKE_N]", 49863fc36cdSLinus Walleij "[SPI0_CLK]"; /* LSEC pin 8: SPI2_CLK */ 49963fc36cdSLinus Walleij}; 50063fc36cdSLinus Walleij 50163fc36cdSLinus Walleij&gpio27 { 50263fc36cdSLinus Walleij /* GPIO_216-GPIO_223 */ 50363fc36cdSLinus Walleij gpio-line-names = 50463fc36cdSLinus Walleij "[SPI0_DIN]", /* LSEC pin 10: SPI2_DI */ 50563fc36cdSLinus Walleij "[SPI0_DOUT]", /* LSEC pin 14: SPI2_DO */ 50663fc36cdSLinus Walleij "[SPI0_CS]", /* LSEC pin 12: SPI2_CS0_N */ 50763fc36cdSLinus Walleij "GPIO_219_CC_INT", 50863fc36cdSLinus Walleij "NC", 50963fc36cdSLinus Walleij "NC", 51063fc36cdSLinus Walleij "[PMU_INT]", 51163fc36cdSLinus Walleij ""; 51263fc36cdSLinus Walleij}; 51363fc36cdSLinus Walleij 51463fc36cdSLinus Walleij&gpio28 { 51563fc36cdSLinus Walleij /* GPIO_224-GPIO_231 */ 51663fc36cdSLinus Walleij gpio-line-names = 51763fc36cdSLinus Walleij "", "", "", "", "", "", "", ""; 51863fc36cdSLinus Walleij}; 51963fc36cdSLinus Walleij 5205f8a3b77SZhangfei Gao&i2c0 { 5215f8a3b77SZhangfei Gao /* On Low speed expansion */ 5225f8a3b77SZhangfei Gao label = "LS-I2C0"; 5235f8a3b77SZhangfei Gao status = "okay"; 5245f8a3b77SZhangfei Gao}; 5255f8a3b77SZhangfei Gao 5265f8a3b77SZhangfei Gao&i2c1 { 5275f8a3b77SZhangfei Gao status = "okay"; 5285f8a3b77SZhangfei Gao 5295f8a3b77SZhangfei Gao adv7533: adv7533@39 { 5305f8a3b77SZhangfei Gao status = "ok"; 5315f8a3b77SZhangfei Gao compatible = "adi,adv7533"; 5325f8a3b77SZhangfei Gao reg = <0x39>; 5335f8a3b77SZhangfei Gao }; 5345f8a3b77SZhangfei Gao}; 5355f8a3b77SZhangfei Gao 5365f8a3b77SZhangfei Gao&i2c7 { 5375f8a3b77SZhangfei Gao /* On Low speed expansion */ 5385f8a3b77SZhangfei Gao label = "LS-I2C1"; 5395f8a3b77SZhangfei Gao status = "okay"; 5405f8a3b77SZhangfei Gao}; 5415f8a3b77SZhangfei Gao 542254b07b2SChen Feng&uart3 { 543254b07b2SChen Feng /* On Low speed expansion */ 544254b07b2SChen Feng label = "LS-UART0"; 545254b07b2SChen Feng status = "okay"; 546254b07b2SChen Feng}; 547254b07b2SChen Feng 5482e9b4447SGuodong Xu&uart4 { 5492e9b4447SGuodong Xu status = "okay"; 5502e9b4447SGuodong Xu 5512e9b4447SGuodong Xu bluetooth { 5522e9b4447SGuodong Xu compatible = "ti,wl1837-st"; 5532e9b4447SGuodong Xu enable-gpios = <&gpio15 6 GPIO_ACTIVE_HIGH>; 554bf1ff532SGuodong Xu max-speed = <3000000>; 5552e9b4447SGuodong Xu }; 5562e9b4447SGuodong Xu}; 5572e9b4447SGuodong Xu 558254b07b2SChen Feng&uart6 { 559254b07b2SChen Feng /* On Low speed expansion */ 560254b07b2SChen Feng label = "LS-UART1"; 56135ca8168SChen Feng status = "okay"; 56235ca8168SChen Feng}; 56338810497SWang Xiaoyin 56438810497SWang Xiaoyin&spi2 { 56538810497SWang Xiaoyin /* On Low speed expansion */ 56638810497SWang Xiaoyin label = "LS-SPI0"; 56738810497SWang Xiaoyin status = "okay"; 56838810497SWang Xiaoyin}; 56938810497SWang Xiaoyin 57038810497SWang Xiaoyin&spi3 { 57138810497SWang Xiaoyin /* On High speed expansion */ 57238810497SWang Xiaoyin label = "HS-SPI1"; 57338810497SWang Xiaoyin status = "okay"; 57438810497SWang Xiaoyin}; 575804d7d7aSLi Wei 576804d7d7aSLi Wei&dwmmc1 { 577f0ab786fSoscardagrach bus-width = <0x4>; 578f0ab786fSoscardagrach cap-sd-highspeed; 579f0ab786fSoscardagrach sd-uhs-sdr12; 580f0ab786fSoscardagrach sd-uhs-sdr25; 581f0ab786fSoscardagrach sd-uhs-sdr50; 582f0ab786fSoscardagrach sd-uhs-sdr104; 583f0ab786fSoscardagrach disable-wp; 584*11d1447eSVincent Guittot cd-gpios = <&gpio25 3 GPIO_ACTIVE_LOW>; 585f0ab786fSoscardagrach pinctrl-names = "default"; 586f0ab786fSoscardagrach pinctrl-0 = <&sd_pmx_func 587f0ab786fSoscardagrach &sd_clk_cfg_func 588f0ab786fSoscardagrach &sd_cfg_func>; 589804d7d7aSLi Wei vmmc-supply = <&ldo16>; 590804d7d7aSLi Wei vqmmc-supply = <&ldo9>; 591804d7d7aSLi Wei status = "okay"; 592804d7d7aSLi Wei}; 5937d8c3667SGuodong Xu 5947d8c3667SGuodong Xu&dwmmc2 { /* WIFI */ 595f0ab786fSoscardagrach bus-width = <0x4>; 5967d8c3667SGuodong Xu non-removable; 597f0ab786fSoscardagrach broken-cd; 598a30449ebSoscardagrach cap-power-off-card; 599f0ab786fSoscardagrach pinctrl-names = "default"; 600f0ab786fSoscardagrach pinctrl-0 = <&sdio_pmx_func 601f0ab786fSoscardagrach &sdio_clk_cfg_func 602f0ab786fSoscardagrach &sdio_cfg_func>; 603f0ab786fSoscardagrach /* WL_EN */ 604f0ab786fSoscardagrach vmmc-supply = <&wlan_en>; 6057d8c3667SGuodong Xu status = "ok"; 6067d8c3667SGuodong Xu 6077d8c3667SGuodong Xu wlcore: wlcore@2 { 6087d8c3667SGuodong Xu compatible = "ti,wl1837"; 6097d8c3667SGuodong Xu reg = <2>; /* sdio func num */ 6107d8c3667SGuodong Xu /* WL_IRQ, GPIO_179_WL_WAKEUP_AP */ 6117d8c3667SGuodong Xu interrupt-parent = <&gpio22>; 6127d8c3667SGuodong Xu interrupts = <3 IRQ_TYPE_EDGE_RISING>; 6137d8c3667SGuodong Xu }; 6147d8c3667SGuodong Xu}; 615