1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* 3 * Copyright 2021-2024 NXP 4 * 5 * NXP S32G3 Reference Design Board 3 (S32G-VNP-RDB3) 6 */ 7 8/dts-v1/; 9 10#include "s32g3.dtsi" 11#include "s32gxxxa-rdb.dtsi" 12 13/ { 14 model = "NXP S32G3 Reference Design Board 3 (S32G-VNP-RDB3)"; 15 compatible = "nxp,s32g399a-rdb3", "nxp,s32g3"; 16 17 aliases { 18 mmc0 = &usdhc0; 19 serial0 = &uart0; 20 serial1 = &uart1; 21 }; 22 23 chosen { 24 stdout-path = "serial0:115200n8"; 25 }; 26 27 /* 4GiB RAM */ 28 memory@80000000 { 29 device_type = "memory"; 30 reg = <0x0 0x80000000 0 0x80000000>, 31 <0x8 0x80000000 0 0x80000000>; 32 }; 33}; 34 35&uart0 { 36 status = "okay"; 37}; 38 39&uart1 { 40 status = "okay"; 41}; 42 43&stm0 { 44 status = "okay"; 45}; 46 47&stm1 { 48 status = "okay"; 49}; 50 51&stm2 { 52 status = "okay"; 53}; 54 55&stm3 { 56 status = "okay"; 57}; 58 59&stm4 { 60 status = "okay"; 61}; 62 63&stm5 { 64 status = "okay"; 65}; 66 67&stm6 { 68 status = "okay"; 69}; 70 71&stm8 { 72 status = "okay"; 73}; 74 75&swt0 { 76 status = "okay"; 77}; 78 79&i2c4 { 80 current-sensor@40 { 81 compatible = "ti,ina231"; 82 reg = <0x40>; 83 shunt-resistor = <1000>; 84 }; 85}; 86 87&usdhc0 { 88 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 89 pinctrl-0 = <&pinctrl_usdhc0>; 90 pinctrl-1 = <&pinctrl_usdhc0_100mhz>; 91 pinctrl-2 = <&pinctrl_usdhc0_200mhz>; 92 bus-width = <8>; 93 disable-wp; 94 status = "okay"; 95}; 96