xref: /linux/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts (revision db4a3f0fbedb0398f77b9047e8b8bb2b49f355bb)
1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2/*
3 * Copyright (c) 2021 SUSE LLC
4 * Copyright 2019-2021, 2024 NXP
5 */
6
7/dts-v1/;
8
9#include "s32g2.dtsi"
10#include "s32gxxxa-rdb.dtsi"
11
12/ {
13	model = "NXP S32G2 Reference Design Board 2 (S32G-VNP-RDB2)";
14	compatible = "nxp,s32g274a-rdb2", "nxp,s32g2";
15
16	aliases {
17		serial0 = &uart0;
18		serial1 = &uart1;
19	};
20
21	chosen {
22		stdout-path = "serial0:115200n8";
23	};
24
25	/* 4GiB RAM */
26	memory@80000000 {
27		device_type = "memory";
28		reg = <0x0 0x80000000 0 0x80000000>,
29		      <0x8 0x80000000 0 0x80000000>;
30	};
31};
32
33/* UART (J2) to Micro USB port */
34&uart0 {
35	status = "okay";
36};
37
38/* UART (J1) to Micro USB port */
39&uart1 {
40	status = "okay";
41};
42
43&stm0 {
44	status = "okay";
45};
46
47&stm1 {
48	status = "okay";
49};
50
51&stm2 {
52	status = "okay";
53};
54
55&stm3 {
56	status = "okay";
57};
58
59&swt0 {
60	status = "okay";
61};
62
63&usdhc0 {
64	pinctrl-names = "default", "state_100mhz", "state_200mhz";
65	pinctrl-0 = <&pinctrl_usdhc0>;
66	pinctrl-1 = <&pinctrl_usdhc0_100mhz>;
67	pinctrl-2 = <&pinctrl_usdhc0_200mhz>;
68	disable-wp;
69	/* Remove no-1-8-v to enable higher speed modes for SD card.
70	 * However, this is not enough to enable HS400 or HS200 modes for eMMC.
71	 * In this case, the position of the resistor R797 must be changed
72	 * from A to B before removing the property.
73	 * If the property is removed without changing the resistor position,
74	 * HS*00 may be enabled, but the interface might be unstable because of
75	 * the wrong VCCQ voltage applied to the eMMC.
76	 */
77	no-1-8-v;
78	status = "okay";
79};
80