xref: /linux/arch/arm64/boot/dts/freescale/imx95-19x19-evk-sof.dts (revision ec71f661a572a770d7c861cd52a50cbbb0e1a8d1)
1*9f0928eaSLaurentiu Mihalcea// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*9f0928eaSLaurentiu Mihalcea/*
3*9f0928eaSLaurentiu Mihalcea * Copyright 2025 NXP
4*9f0928eaSLaurentiu Mihalcea */
5*9f0928eaSLaurentiu Mihalcea
6*9f0928eaSLaurentiu Mihalcea/dts-v1/;
7*9f0928eaSLaurentiu Mihalcea
8*9f0928eaSLaurentiu Mihalcea#include "imx95-19x19-evk.dts"
9*9f0928eaSLaurentiu Mihalcea
10*9f0928eaSLaurentiu Mihalcea/ {
11*9f0928eaSLaurentiu Mihalcea	sof_cpu: cm7-cpu@80000000 {
12*9f0928eaSLaurentiu Mihalcea		compatible = "fsl,imx95-cm7-sof";
13*9f0928eaSLaurentiu Mihalcea		reg = <0x0 0x80000000 0x0 0x6100000>;
14*9f0928eaSLaurentiu Mihalcea		reg-names = "sram";
15*9f0928eaSLaurentiu Mihalcea		memory-region = <&adma_res>;
16*9f0928eaSLaurentiu Mihalcea		memory-region-names = "dma";
17*9f0928eaSLaurentiu Mihalcea		mboxes = <&mu7 2 0>, <&mu7 2 1>, <&mu7 3 0>, <&mu7 3 1>;
18*9f0928eaSLaurentiu Mihalcea		mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
19*9f0928eaSLaurentiu Mihalcea
20*9f0928eaSLaurentiu Mihalcea		sai3_cpu: port {
21*9f0928eaSLaurentiu Mihalcea			sai3_cpu_ep: endpoint {
22*9f0928eaSLaurentiu Mihalcea				remote-endpoint = <&wm8962_ep>;
23*9f0928eaSLaurentiu Mihalcea			};
24*9f0928eaSLaurentiu Mihalcea		};
25*9f0928eaSLaurentiu Mihalcea	};
26*9f0928eaSLaurentiu Mihalcea
27*9f0928eaSLaurentiu Mihalcea	reserved-memory {
28*9f0928eaSLaurentiu Mihalcea		adma_res: memory@86100000 {
29*9f0928eaSLaurentiu Mihalcea			compatible = "shared-dma-pool";
30*9f0928eaSLaurentiu Mihalcea			reg = <0x0 0x86100000 0x0 0x100000>;
31*9f0928eaSLaurentiu Mihalcea			no-map;
32*9f0928eaSLaurentiu Mihalcea		};
33*9f0928eaSLaurentiu Mihalcea	};
34*9f0928eaSLaurentiu Mihalcea
35*9f0928eaSLaurentiu Mihalcea	sof-sound {
36*9f0928eaSLaurentiu Mihalcea		compatible = "audio-graph-card2";
37*9f0928eaSLaurentiu Mihalcea		links = <&sai3_cpu>;
38*9f0928eaSLaurentiu Mihalcea		label = "audio";
39*9f0928eaSLaurentiu Mihalcea		hp-det-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
40*9f0928eaSLaurentiu Mihalcea		pinctrl-names = "default";
41*9f0928eaSLaurentiu Mihalcea		pinctrl-0 = <&pinctrl_hp>;
42*9f0928eaSLaurentiu Mihalcea		widgets = "Headphone", "Headphones",
43*9f0928eaSLaurentiu Mihalcea			  "Microphone", "Headset Mic";
44*9f0928eaSLaurentiu Mihalcea		routing = "Headphones", "HPOUTL",
45*9f0928eaSLaurentiu Mihalcea			  "Headphones", "HPOUTR",
46*9f0928eaSLaurentiu Mihalcea			  "Headset Mic", "MICBIAS",
47*9f0928eaSLaurentiu Mihalcea			  "IN3R", "Headset Mic",
48*9f0928eaSLaurentiu Mihalcea			  "IN1R", "Headset Mic";
49*9f0928eaSLaurentiu Mihalcea	};
50*9f0928eaSLaurentiu Mihalcea
51*9f0928eaSLaurentiu Mihalcea	sound-wm8962 {
52*9f0928eaSLaurentiu Mihalcea		status = "disabled";
53*9f0928eaSLaurentiu Mihalcea	};
54*9f0928eaSLaurentiu Mihalcea
55*9f0928eaSLaurentiu Mihalcea};
56*9f0928eaSLaurentiu Mihalcea
57*9f0928eaSLaurentiu Mihalcea&edma2 {
58*9f0928eaSLaurentiu Mihalcea	/* channels 30 and 31 reserved for FW usage */
59*9f0928eaSLaurentiu Mihalcea	dma-channel-mask = <0xc0000000>, <0x0>;
60*9f0928eaSLaurentiu Mihalcea};
61*9f0928eaSLaurentiu Mihalcea
62*9f0928eaSLaurentiu Mihalcea&sai3 {
63*9f0928eaSLaurentiu Mihalcea	status = "disabled";
64*9f0928eaSLaurentiu Mihalcea};
65*9f0928eaSLaurentiu Mihalcea
66*9f0928eaSLaurentiu Mihalcea&wm8962 {
67*9f0928eaSLaurentiu Mihalcea	assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>,
68*9f0928eaSLaurentiu Mihalcea			  <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>,
69*9f0928eaSLaurentiu Mihalcea			  <&scmi_clk IMX95_CLK_AUDIOPLL1>,
70*9f0928eaSLaurentiu Mihalcea			  <&scmi_clk IMX95_CLK_AUDIOPLL2>,
71*9f0928eaSLaurentiu Mihalcea			  <&scmi_clk IMX95_CLK_SAI3>;
72*9f0928eaSLaurentiu Mihalcea	assigned-clock-parents = <0>, <0>, <0>, <0>, <&scmi_clk IMX95_CLK_AUDIOPLL1>;
73*9f0928eaSLaurentiu Mihalcea	assigned-clock-rates = <3932160000>, <3612672000>,
74*9f0928eaSLaurentiu Mihalcea			       <393216000>, <361267200>,
75*9f0928eaSLaurentiu Mihalcea			       <12288000>;
76*9f0928eaSLaurentiu Mihalcea
77*9f0928eaSLaurentiu Mihalcea	port {
78*9f0928eaSLaurentiu Mihalcea		wm8962_ep: endpoint {
79*9f0928eaSLaurentiu Mihalcea			bitclock-master;
80*9f0928eaSLaurentiu Mihalcea			frame-master;
81*9f0928eaSLaurentiu Mihalcea			remote-endpoint = <&sai3_cpu_ep>;
82*9f0928eaSLaurentiu Mihalcea		};
83*9f0928eaSLaurentiu Mihalcea	};
84*9f0928eaSLaurentiu Mihalcea};
85