1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright 2017~2018 NXP 4 */ 5 6/dts-v1/; 7 8#include "imx8qxp.dtsi" 9#include <dt-bindings/usb/pd.h> 10 11/ { 12 model = "Freescale i.MX8QXP MEK"; 13 compatible = "fsl,imx8qxp-mek", "fsl,imx8qxp"; 14 15 bt_sco_codec: audio-codec-bt { 16 compatible = "linux,bt-sco"; 17 #sound-dai-cells = <1>; 18 }; 19 20 chosen { 21 stdout-path = &lpuart0; 22 }; 23 24 imx8x_cm4: imx8x-cm4 { 25 compatible = "fsl,imx8qxp-cm4"; 26 mbox-names = "tx", "rx", "rxdb"; 27 mboxes = <&lsio_mu5 0 1 28 &lsio_mu5 1 1 29 &lsio_mu5 3 1>; 30 memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, 31 <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>; 32 power-domains = <&pd IMX_SC_R_M4_0_PID0>, 33 <&pd IMX_SC_R_M4_0_MU_1A>; 34 fsl,entry-address = <0x34fe0000>; 35 fsl,resource-id = <IMX_SC_R_M4_0_PID0>; 36 }; 37 38 memory@80000000 { 39 device_type = "memory"; 40 reg = <0x00000000 0x80000000 0 0x40000000>; 41 }; 42 43 reg_usdhc2_vmmc: usdhc2-vmmc { 44 compatible = "regulator-fixed"; 45 regulator-name = "SD1_SPWR"; 46 regulator-min-microvolt = <3000000>; 47 regulator-max-microvolt = <3000000>; 48 gpio = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>; 49 enable-active-high; 50 }; 51 52 gpio-sbu-mux { 53 compatible = "nxp,cbdtu02043", "gpio-sbu-mux"; 54 pinctrl-names = "default"; 55 pinctrl-0 = <&pinctrl_typec_mux>; 56 select-gpios = <&lsio_gpio5 9 GPIO_ACTIVE_HIGH>; 57 enable-gpios = <&pca9557_a 7 GPIO_ACTIVE_LOW>; 58 orientation-switch; 59 60 port { 61 usb3_data_ss: endpoint { 62 remote-endpoint = <&typec_con_ss>; 63 }; 64 }; 65 }; 66 67 reg_pcieb: regulator-pcie { 68 compatible = "regulator-fixed"; 69 regulator-max-microvolt = <3300000>; 70 regulator-min-microvolt = <3300000>; 71 regulator-name = "mpcie_3v3"; 72 gpio = <&pca9557_a 2 GPIO_ACTIVE_HIGH>; 73 enable-active-high; 74 }; 75 76 reg_audio: regulator-audio { 77 compatible = "regulator-fixed"; 78 regulator-max-microvolt = <3300000>; 79 regulator-min-microvolt = <3300000>; 80 regulator-name = "cs42888_supply"; 81 }; 82 83 reg_audio_5v: regulator-audio-pwr { 84 compatible = "regulator-fixed"; 85 regulator-name = "audio-5v"; 86 regulator-min-microvolt = <5000000>; 87 regulator-max-microvolt = <5000000>; 88 regulator-always-on; 89 regulator-boot-on; 90 }; 91 92 reg_audio_3v3: regulator-audio-3v3 { 93 compatible = "regulator-fixed"; 94 regulator-name = "audio-3v3"; 95 regulator-min-microvolt = <3300000>; 96 regulator-max-microvolt = <3300000>; 97 regulator-always-on; 98 regulator-boot-on; 99 }; 100 101 reg_audio_1v8: regulator-audio-1v8 { 102 compatible = "regulator-fixed"; 103 regulator-name = "audio-1v8"; 104 regulator-min-microvolt = <1800000>; 105 regulator-max-microvolt = <1800000>; 106 regulator-always-on; 107 regulator-boot-on; 108 }; 109 110 reg_can_en: regulator-can-en { 111 compatible = "regulator-fixed"; 112 regulator-max-microvolt = <3300000>; 113 regulator-min-microvolt = <3300000>; 114 regulator-name = "can-en"; 115 gpio = <&pca6416 3 GPIO_ACTIVE_HIGH>; 116 enable-active-high; 117 }; 118 119 reg_can_stby: regulator-can-stby { 120 compatible = "regulator-fixed"; 121 regulator-max-microvolt = <3300000>; 122 regulator-min-microvolt = <3300000>; 123 regulator-name = "can-stby"; 124 gpio = <&pca6416 5 GPIO_ACTIVE_HIGH>; 125 enable-active-high; 126 vin-supply = <®_can_en>; 127 }; 128 129 reg_usb_otg1_vbus: regulator-usbotg1-vbus { 130 compatible = "regulator-fixed"; 131 regulator-max-microvolt = <5000000>; 132 regulator-min-microvolt = <5000000>; 133 regulator-name = "usb_otg1_vbus"; 134 gpio = <&pca9557_b 2 GPIO_ACTIVE_HIGH>; 135 enable-active-high; 136 }; 137 138 reserved-memory { 139 #address-cells = <2>; 140 #size-cells = <2>; 141 ranges; 142 143 vdev0vring0: memory@90000000 { 144 reg = <0 0x90000000 0 0x8000>; 145 no-map; 146 }; 147 148 vdev0vring1: memory@90008000 { 149 reg = <0 0x90008000 0 0x8000>; 150 no-map; 151 }; 152 153 vdev1vring0: memory@90010000 { 154 reg = <0 0x90010000 0 0x8000>; 155 no-map; 156 }; 157 158 vdev1vring1: memory@90018000 { 159 reg = <0 0x90018000 0 0x8000>; 160 no-map; 161 }; 162 163 rsc_table: memory@900ff000 { 164 reg = <0 0x900ff000 0 0x1000>; 165 no-map; 166 }; 167 168 vdevbuffer: memory@90400000 { 169 compatible = "shared-dma-pool"; 170 reg = <0 0x90400000 0 0x100000>; 171 no-map; 172 }; 173 174 dsp_vdev0vring0: memory@942f0000 { 175 reg = <0 0x942f0000 0 0x8000>; 176 no-map; 177 }; 178 179 dsp_vdev0vring1: memory@942f8000 { 180 reg = <0 0x942f8000 0 0x8000>; 181 no-map; 182 }; 183 184 dsp_vdev0buffer: memory@94300000 { 185 compatible = "shared-dma-pool"; 186 reg = <0 0x94300000 0 0x100000>; 187 no-map; 188 }; 189 190 gpu_reserved: memory@880000000 { 191 no-map; 192 reg = <0x8 0x80000000 0 0x10000000>; 193 }; 194 }; 195 196 sound-bt-sco { 197 compatible = "simple-audio-card"; 198 simple-audio-card,bitclock-inversion; 199 simple-audio-card,bitclock-master = <&btcpu>; 200 simple-audio-card,format = "dsp_a"; 201 simple-audio-card,frame-master = <&btcpu>; 202 simple-audio-card,name = "bt-sco-audio"; 203 204 simple-audio-card,codec { 205 sound-dai = <&bt_sco_codec 1>; 206 }; 207 208 btcpu: simple-audio-card,cpu { 209 dai-tdm-slot-num = <2>; 210 dai-tdm-slot-width = <16>; 211 sound-dai = <&sai0>; 212 }; 213 }; 214 215 sound-cs42888 { 216 compatible = "fsl,imx-audio-cs42888"; 217 audio-asrc = <&asrc0>; 218 audio-codec = <&cs42888>; 219 audio-cpu = <&esai0>; 220 audio-routing = 221 "Line Out Jack", "AOUT1L", 222 "Line Out Jack", "AOUT1R", 223 "Line Out Jack", "AOUT2L", 224 "Line Out Jack", "AOUT2R", 225 "Line Out Jack", "AOUT3L", 226 "Line Out Jack", "AOUT3R", 227 "Line Out Jack", "AOUT4L", 228 "Line Out Jack", "AOUT4R", 229 "AIN1L", "Line In Jack", 230 "AIN1R", "Line In Jack", 231 "AIN2L", "Line In Jack", 232 "AIN2R", "Line In Jack"; 233 model = "imx-cs42888"; 234 }; 235 236 sound-wm8960 { 237 compatible = "fsl,imx-audio-wm8960"; 238 model = "wm8960-audio"; 239 audio-cpu = <&sai1>; 240 audio-codec = <&wm8960>; 241 hp-det-gpio = <&lsio_gpio1 0 GPIO_ACTIVE_HIGH>; 242 audio-routing = "Headphone Jack", "HP_L", 243 "Headphone Jack", "HP_R", 244 "Ext Spk", "SPK_LP", 245 "Ext Spk", "SPK_LN", 246 "Ext Spk", "SPK_RP", 247 "Ext Spk", "SPK_RN", 248 "LINPUT1", "Mic Jack", 249 "Mic Jack", "MICB"; 250 }; 251}; 252 253&amix { 254 status = "okay"; 255}; 256 257&asrc0 { 258 fsl,asrc-rate = <48000>; 259 status = "okay"; 260}; 261 262&dsp { 263 memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>, 264 <&dsp_vdev0vring1>, <&dsp_reserved>; 265 status = "okay"; 266}; 267 268&dsp_reserved { 269 status = "okay"; 270}; 271 272&esai0 { 273 assigned-clocks = <&acm IMX_ADMA_ACM_ESAI0_MCLK_SEL>, 274 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, 275 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, 276 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, 277 <&esai0_lpcg IMX_LPCG_CLK_0>; 278 assigned-clock-parents = <&aud_pll_div0_lpcg IMX_LPCG_CLK_0>; 279 assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>; 280 pinctrl-0 = <&pinctrl_esai0>; 281 pinctrl-names = "default"; 282 status = "okay"; 283}; 284 285&fec1 { 286 pinctrl-names = "default"; 287 pinctrl-0 = <&pinctrl_fec1>; 288 phy-mode = "rgmii-id"; 289 phy-handle = <ðphy0>; 290 fsl,magic-packet; 291 status = "okay"; 292 293 mdio { 294 #address-cells = <1>; 295 #size-cells = <0>; 296 297 ethphy0: ethernet-phy@0 { 298 compatible = "ethernet-phy-ieee802.3-c22"; 299 reg = <0>; 300 }; 301 }; 302}; 303 304&i2c1 { 305 #address-cells = <1>; 306 #size-cells = <0>; 307 clock-frequency = <100000>; 308 pinctrl-names = "default"; 309 pinctrl-0 = <&pinctrl_lpi2c1 &pinctrl_ioexp_rst>; 310 status = "okay"; 311 312 i2c-mux@71 { 313 compatible = "nxp,pca9646", "nxp,pca9546"; 314 #address-cells = <1>; 315 #size-cells = <0>; 316 reg = <0x71>; 317 reset-gpios = <&lsio_gpio1 1 GPIO_ACTIVE_LOW>; 318 319 i2c@0 { 320 #address-cells = <1>; 321 #size-cells = <0>; 322 reg = <0>; 323 324 max7322: gpio@68 { 325 compatible = "maxim,max7322"; 326 reg = <0x68>; 327 gpio-controller; 328 #gpio-cells = <2>; 329 }; 330 }; 331 332 i2c@1 { 333 #address-cells = <1>; 334 #size-cells = <0>; 335 reg = <1>; 336 }; 337 338 i2c@2 { 339 #address-cells = <1>; 340 #size-cells = <0>; 341 reg = <2>; 342 343 pressure-sensor@60 { 344 compatible = "fsl,mpl3115"; 345 reg = <0x60>; 346 }; 347 }; 348 349 i2c@3 { 350 #address-cells = <1>; 351 #size-cells = <0>; 352 reg = <3>; 353 354 pca9557_a: gpio@1a { 355 compatible = "nxp,pca9557"; 356 reg = <0x1a>; 357 gpio-controller; 358 #gpio-cells = <2>; 359 }; 360 361 pca9557_b: gpio@1d { 362 compatible = "nxp,pca9557"; 363 reg = <0x1d>; 364 gpio-controller; 365 #gpio-cells = <2>; 366 }; 367 368 light-sensor@44 { 369 pinctrl-names = "default"; 370 pinctrl-0 = <&pinctrl_isl29023>; 371 compatible = "isil,isl29023"; 372 reg = <0x44>; 373 interrupt-parent = <&lsio_gpio1>; 374 interrupts = <2 IRQ_TYPE_EDGE_FALLING>; 375 }; 376 }; 377 }; 378 379 ptn5110: tcpc@50 { 380 compatible = "nxp,ptn5110", "tcpci"; 381 pinctrl-names = "default"; 382 pinctrl-0 = <&pinctrl_typec>; 383 reg = <0x50>; 384 interrupt-parent = <&lsio_gpio1>; 385 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 386 387 usb_con1: connector { 388 compatible = "usb-c-connector"; 389 label = "USB-C"; 390 power-role = "source"; 391 data-role = "dual"; 392 source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; 393 394 ports { 395 #address-cells = <1>; 396 #size-cells = <0>; 397 398 port@0 { 399 reg = <0>; 400 401 typec_dr_sw: endpoint { 402 remote-endpoint = <&usb3_drd_sw>; 403 }; 404 }; 405 406 port@1 { 407 reg = <1>; 408 409 typec_con_ss: endpoint { 410 remote-endpoint = <&usb3_data_ss>; 411 }; 412 }; 413 }; 414 }; 415 }; 416 417}; 418 419&cm40_i2c { 420 #address-cells = <1>; 421 #size-cells = <0>; 422 clock-frequency = <100000>; 423 pinctrl-names = "default", "gpio"; 424 pinctrl-0 = <&pinctrl_cm40_i2c>; 425 pinctrl-1 = <&pinctrl_cm40_i2c_gpio>; 426 scl-gpios = <&lsio_gpio1 10 GPIO_ACTIVE_HIGH>; 427 sda-gpios = <&lsio_gpio1 9 GPIO_ACTIVE_HIGH>; 428 status = "okay"; 429 430 wm8960: audio-codec@1a { 431 compatible = "wlf,wm8960"; 432 reg = <0x1a>; 433 clocks = <&mclkout0_lpcg IMX_LPCG_CLK_0>; 434 clock-names = "mclk"; 435 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, 436 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, 437 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, 438 <&mclkout0_lpcg IMX_LPCG_CLK_0>; 439 assigned-clock-rates = <786432000>, 440 <49152000>, 441 <12288000>, 442 <12288000>; 443 wlf,shared-lrclk; 444 wlf,hp-cfg = <2 2 3>; 445 wlf,gpio-cfg = <1 3>; 446 AVDD-supply = <®_audio_3v3>; 447 DBVDD-supply = <®_audio_1v8>; 448 DCVDD-supply = <®_audio_1v8>; 449 SPKVDD1-supply = <®_audio_5v>; 450 SPKVDD2-supply = <®_audio_5v>; 451 }; 452 453 pca6416: gpio@20 { 454 compatible = "ti,tca6416"; 455 reg = <0x20>; 456 gpio-controller; 457 #gpio-cells = <2>; 458 }; 459 460 cs42888: audio-codec@48 { 461 compatible = "cirrus,cs42888"; 462 reg = <0x48>; 463 clocks = <&mclkout0_lpcg IMX_LPCG_CLK_0>; 464 clock-names = "mclk"; 465 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, 466 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, 467 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, 468 <&mclkout0_lpcg IMX_LPCG_CLK_0>; 469 assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>; 470 reset-gpios = <&pca9557_b 1 GPIO_ACTIVE_LOW>; 471 VA-supply = <®_audio>; 472 VD-supply = <®_audio>; 473 VLC-supply = <®_audio>; 474 VLS-supply = <®_audio>; 475 }; 476}; 477 478&cm40_intmux { 479 status = "okay"; 480}; 481 482&hsio_phy { 483 fsl,hsio-cfg = "pciea-x2-pcieb"; 484 fsl,refclk-pad-mode = "input"; 485 status = "okay"; 486}; 487 488&flexcan1 { 489 pinctrl-0 = <&pinctrl_flexcan1>; 490 pinctrl-names = "default"; 491 xceiver-supply = <®_can_stby>; 492 status = "okay"; 493}; 494 495&flexcan2 { 496 pinctrl-0 = <&pinctrl_flexcan2>; 497 pinctrl-names = "default"; 498 xceiver-supply = <®_can_stby>; 499 status = "okay"; 500}; 501 502&jpegdec { 503 status = "okay"; 504}; 505 506&jpegenc { 507 status = "okay"; 508}; 509 510&lpuart0 { 511 pinctrl-names = "default"; 512 pinctrl-0 = <&pinctrl_lpuart0>; 513 status = "okay"; 514}; 515 516&lpuart2 { 517 pinctrl-names = "default"; 518 pinctrl-0 = <&pinctrl_lpuart2>; 519 status = "okay"; 520}; 521 522&lpuart3 { 523 pinctrl-names = "default"; 524 pinctrl-0 = <&pinctrl_lpuart3>; 525 status = "okay"; 526}; 527 528&lsio_mu5 { 529 status = "okay"; 530}; 531 532&mu_m0 { 533 status = "okay"; 534}; 535 536&mu1_m0 { 537 status = "okay"; 538}; 539 540&pcie0 { 541 phys = <&hsio_phy 0 PHY_TYPE_PCIE 0>; 542 phy-names = "pcie-phy"; 543 pinctrl-0 = <&pinctrl_pcieb>; 544 pinctrl-names = "default"; 545 reset-gpios = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>; 546 vpcie-supply = <®_pcieb>; 547 status = "okay"; 548}; 549 550&pcie0_ep { 551 phys = <&hsio_phy 0 PHY_TYPE_PCIE 0>; 552 phy-names = "pcie-phy"; 553 pinctrl-0 = <&pinctrl_pcieb>; 554 pinctrl-names = "default"; 555 vpcie-supply = <®_pcieb>; 556 status = "disabled"; 557}; 558 559&scu_key { 560 status = "okay"; 561}; 562 563&sai0 { 564 #sound-dai-cells = <0>; 565 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, 566 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, 567 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, 568 <&sai0_lpcg IMX_LPCG_CLK_0>; 569 assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>; 570 pinctrl-names = "default"; 571 pinctrl-0 = <&pinctrl_sai0>; 572 status = "okay"; 573}; 574 575&sai1 { 576 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, 577 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, 578 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, 579 <&sai1_lpcg IMX_LPCG_CLK_0>; 580 assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>; 581 pinctrl-names = "default"; 582 pinctrl-0 = <&pinctrl_sai1>; 583 status = "okay"; 584}; 585 586&sai4 { 587 assigned-clocks = <&acm IMX_ADMA_ACM_SAI4_MCLK_SEL>, 588 <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL>, 589 <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS>, 590 <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS>, 591 <&sai4_lpcg IMX_LPCG_CLK_0>; 592 assigned-clock-parents = <&aud_pll_div1_lpcg IMX_LPCG_CLK_0>; 593 assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>; 594 fsl,sai-asynchronous; 595 status = "okay"; 596}; 597 598&sai5 { 599 assigned-clocks = <&acm IMX_ADMA_ACM_SAI5_MCLK_SEL>, 600 <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL>, 601 <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS>, 602 <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS>, 603 <&sai5_lpcg IMX_LPCG_CLK_0>; 604 assigned-clock-parents = <&aud_pll_div1_lpcg IMX_LPCG_CLK_0>; 605 assigned-clock-rates = <0>, <786432000>, <98304000>, <12288000>, <98304000>; 606 fsl,sai-asynchronous; 607 status = "okay"; 608}; 609 610&thermal_zones { 611 pmic-thermal { 612 polling-delay-passive = <250>; 613 polling-delay = <2000>; 614 thermal-sensors = <&tsens IMX_SC_R_PMIC_0>; 615 616 trips { 617 pmic_alert0: trip0 { 618 temperature = <110000>; 619 hysteresis = <2000>; 620 type = "passive"; 621 }; 622 623 pmic_crit0: trip1 { 624 temperature = <125000>; 625 hysteresis = <2000>; 626 type = "critical"; 627 }; 628 }; 629 630 cooling-maps { 631 map0 { 632 trip = <&pmic_alert0>; 633 cooling-device = 634 <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 635 <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 636 <&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 637 <&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 638 }; 639 }; 640 }; 641}; 642 643&usdhc1 { 644 assigned-clocks = <&clk IMX_SC_R_SDHC_0 IMX_SC_PM_CLK_PER>; 645 assigned-clock-rates = <200000000>; 646 pinctrl-names = "default"; 647 pinctrl-0 = <&pinctrl_usdhc1>; 648 bus-width = <8>; 649 no-sd; 650 no-sdio; 651 non-removable; 652 status = "okay"; 653}; 654 655&usdhc2 { 656 assigned-clocks = <&clk IMX_SC_R_SDHC_1 IMX_SC_PM_CLK_PER>; 657 assigned-clock-rates = <200000000>; 658 pinctrl-names = "default"; 659 pinctrl-0 = <&pinctrl_usdhc2>; 660 bus-width = <4>; 661 vmmc-supply = <®_usdhc2_vmmc>; 662 cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>; 663 wp-gpios = <&lsio_gpio4 21 GPIO_ACTIVE_HIGH>; 664 status = "okay"; 665}; 666 667&usb3_phy { 668 status = "okay"; 669}; 670 671&usbphy1 { 672 status = "okay"; 673}; 674 675&usbotg1 { 676 adp-disable; 677 hnp-disable; 678 srp-disable; 679 disable-over-current; 680 power-active-high; 681 vbus-supply = <®_usb_otg1_vbus>; 682 status = "okay"; 683}; 684 685&usbotg3 { 686 status = "okay"; 687}; 688 689&usbotg3_cdns3 { 690 dr_mode = "otg"; 691 usb-role-switch; 692 status = "okay"; 693 694 port { 695 usb3_drd_sw: endpoint { 696 remote-endpoint = <&typec_dr_sw>; 697 }; 698 }; 699}; 700 701 702&vpu { 703 compatible = "nxp,imx8qxp-vpu"; 704 status = "okay"; 705}; 706 707&vpu_core0 { 708 reg = <0x2d040000 0x10000>; 709 memory-region = <&decoder_boot>, <&decoder_rpc>; 710 status = "okay"; 711}; 712 713&vpu_core1 { 714 reg = <0x2d050000 0x10000>; 715 memory-region = <&encoder_boot>, <&encoder_rpc>; 716 status = "okay"; 717}; 718 719&iomuxc { 720 721 pinctrl_cm40_i2c: cm40i2cgrp { 722 fsl,pins = < 723 IMX8QXP_ADC_IN1_M40_I2C0_SDA 0x0600004c 724 IMX8QXP_ADC_IN0_M40_I2C0_SCL 0x0600004c 725 >; 726 }; 727 728 pinctrl_cm40_i2c_gpio: cm40i2cgpio-grp { 729 fsl,pins = < 730 IMX8QXP_ADC_IN1_LSIO_GPIO1_IO09 0xc600004c 731 IMX8QXP_ADC_IN0_LSIO_GPIO1_IO10 0xc600004c 732 >; 733 }; 734 735 pinctrl_esai0: esai0grp { 736 fsl,pins = < 737 IMX8QXP_ESAI0_FSR_ADMA_ESAI0_FSR 0xc6000040 738 IMX8QXP_ESAI0_FST_ADMA_ESAI0_FST 0xc6000040 739 IMX8QXP_ESAI0_SCKR_ADMA_ESAI0_SCKR 0xc6000040 740 IMX8QXP_ESAI0_SCKT_ADMA_ESAI0_SCKT 0xc6000040 741 IMX8QXP_ESAI0_TX0_ADMA_ESAI0_TX0 0xc6000040 742 IMX8QXP_ESAI0_TX1_ADMA_ESAI0_TX1 0xc6000040 743 IMX8QXP_ESAI0_TX2_RX3_ADMA_ESAI0_TX2_RX3 0xc6000040 744 IMX8QXP_ESAI0_TX3_RX2_ADMA_ESAI0_TX3_RX2 0xc6000040 745 IMX8QXP_ESAI0_TX4_RX1_ADMA_ESAI0_TX4_RX1 0xc6000040 746 IMX8QXP_ESAI0_TX5_RX0_ADMA_ESAI0_TX5_RX0 0xc6000040 747 >; 748 }; 749 750 pinctrl_fec1: fec1grp { 751 fsl,pins = < 752 IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020 753 IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 754 IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020 755 IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020 756 IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020 757 IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020 758 IMX8QXP_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020 759 IMX8QXP_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020 760 IMX8QXP_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020 761 IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020 762 IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020 763 IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020 764 IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020 765 IMX8QXP_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020 766 >; 767 }; 768 769 pinctrl_flexcan1: flexcan0grp { 770 fsl,pins = < 771 IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21 772 IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x21 773 >; 774 }; 775 776 pinctrl_flexcan2: flexcan1grp { 777 fsl,pins = < 778 IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21 779 IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x21 780 >; 781 }; 782 783 pinctrl_ioexp_rst: ioexprstgrp { 784 fsl,pins = < 785 IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01 0x06000021 786 >; 787 }; 788 789 pinctrl_isl29023: isl29023grp { 790 fsl,pins = < 791 IMX8QXP_SPI2_SDI_LSIO_GPIO1_IO02 0x00000021 792 >; 793 }; 794 795 pinctrl_lpi2c1: lpi2c1grp { 796 fsl,pins = < 797 IMX8QXP_USB_SS3_TC1_ADMA_I2C1_SCL 0x06000021 798 IMX8QXP_USB_SS3_TC3_ADMA_I2C1_SDA 0x06000021 799 >; 800 }; 801 802 pinctrl_lpuart0: lpuart0grp { 803 fsl,pins = < 804 IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 805 IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 806 >; 807 }; 808 809 pinctrl_lpuart2: lpuart2grp { 810 fsl,pins = < 811 IMX8QXP_UART2_TX_ADMA_UART2_TX 0x06000020 812 IMX8QXP_UART2_RX_ADMA_UART2_RX 0x06000020 813 >; 814 }; 815 816 pinctrl_lpuart3: lpuart3grp { 817 fsl,pins = < 818 IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020 819 IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020 820 >; 821 }; 822 823 pinctrl_pcieb: pcieagrp { 824 fsl,pins = < 825 IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x06000021 826 IMX8QXP_PCIE_CTRL0_CLKREQ_B_HSIO_PCIE0_CLKREQ_B 0x06000021 827 IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000021 828 >; 829 }; 830 831 pinctrl_typec: typecgrp { 832 fsl,pins = < 833 IMX8QXP_SPI2_SCK_LSIO_GPIO1_IO03 0x06000021 834 >; 835 }; 836 837 pinctrl_typec_mux: typecmuxgrp { 838 fsl,pins = < 839 IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 0x60 840 >; 841 }; 842 843 pinctrl_sai0: sai0grp { 844 fsl,pins = < 845 IMX8QXP_SAI0_TXD_ADMA_SAI0_TXD 0x06000060 846 IMX8QXP_SAI0_RXD_ADMA_SAI0_RXD 0x06000040 847 IMX8QXP_SAI0_TXC_ADMA_SAI0_TXC 0x06000040 848 IMX8QXP_SAI0_TXFS_ADMA_SAI0_TXFS 0x06000040 849 >; 850 }; 851 852 pinctrl_sai1: sai1grp { 853 fsl,pins = < 854 IMX8QXP_SAI1_RXD_ADMA_SAI1_RXD 0x06000040 855 IMX8QXP_SAI1_RXC_ADMA_SAI1_TXC 0x06000040 856 IMX8QXP_SAI1_RXFS_ADMA_SAI1_TXFS 0x06000040 857 IMX8QXP_SPI0_CS1_ADMA_SAI1_TXD 0x06000060 858 IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 0x06000040 859 >; 860 }; 861 862 pinctrl_usdhc1: usdhc1grp { 863 fsl,pins = < 864 IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 865 IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021 866 IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021 867 IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021 868 IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021 869 IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021 870 IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021 871 IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021 872 IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021 873 IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021 874 IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000041 875 >; 876 }; 877 878 pinctrl_usdhc2: usdhc2grp { 879 fsl,pins = < 880 IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 881 IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021 882 IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021 883 IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021 884 IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021 885 IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021 886 IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 887 >; 888 }; 889}; 890