xref: /linux/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts (revision 4eca0ef49af9b2b0c52ef2b58e045ab34629796b) 
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2017~2018 NXP
4 */
5
6/dts-v1/;
7
8#include "imx8qxp.dtsi"
9#include <dt-bindings/usb/pd.h>
10
11/ {
12	model = "Freescale i.MX8QXP MEK";
13	compatible = "fsl,imx8qxp-mek", "fsl,imx8qxp";
14
15	chosen {
16		stdout-path = &lpuart0;
17	};
18
19	memory@80000000 {
20		device_type = "memory";
21		reg = <0x00000000 0x80000000 0 0x40000000>;
22	};
23
24	reg_usdhc2_vmmc: usdhc2-vmmc {
25		compatible = "regulator-fixed";
26		regulator-name = "SD1_SPWR";
27		regulator-min-microvolt = <3000000>;
28		regulator-max-microvolt = <3000000>;
29		gpio = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>;
30		enable-active-high;
31	};
32
33	gpio-sbu-mux {
34		compatible = "gpio-sbu-mux";
35		pinctrl-names = "default";
36		pinctrl-0 = <&pinctrl_typec_mux>;
37		select-gpios = <&lsio_gpio5 9 GPIO_ACTIVE_HIGH>;
38		enable-gpios = <&pca9557_a 7 GPIO_ACTIVE_LOW>;
39		orientation-switch;
40
41		port {
42			usb3_data_ss: endpoint {
43				remote-endpoint = <&typec_con_ss>;
44			};
45		};
46	};
47};
48
49&dsp {
50	status = "okay";
51};
52
53&fec1 {
54	pinctrl-names = "default";
55	pinctrl-0 = <&pinctrl_fec1>;
56	phy-mode = "rgmii-id";
57	phy-handle = <&ethphy0>;
58	fsl,magic-packet;
59	status = "okay";
60
61	mdio {
62		#address-cells = <1>;
63		#size-cells = <0>;
64
65		ethphy0: ethernet-phy@0 {
66			compatible = "ethernet-phy-ieee802.3-c22";
67			reg = <0>;
68		};
69	};
70};
71
72&i2c1 {
73	#address-cells = <1>;
74	#size-cells = <0>;
75	clock-frequency = <100000>;
76	pinctrl-names = "default";
77	pinctrl-0 = <&pinctrl_lpi2c1 &pinctrl_ioexp_rst>;
78	status = "okay";
79
80	i2c-mux@71 {
81		compatible = "nxp,pca9646", "nxp,pca9546";
82		#address-cells = <1>;
83		#size-cells = <0>;
84		reg = <0x71>;
85		reset-gpios = <&lsio_gpio1 1 GPIO_ACTIVE_LOW>;
86
87		i2c@0 {
88			#address-cells = <1>;
89			#size-cells = <0>;
90			reg = <0>;
91
92			max7322: gpio@68 {
93				compatible = "maxim,max7322";
94				reg = <0x68>;
95				gpio-controller;
96				#gpio-cells = <2>;
97			};
98		};
99
100		i2c@1 {
101			#address-cells = <1>;
102			#size-cells = <0>;
103			reg = <1>;
104		};
105
106		i2c@2 {
107			#address-cells = <1>;
108			#size-cells = <0>;
109			reg = <2>;
110
111			pressure-sensor@60 {
112				compatible = "fsl,mpl3115";
113				reg = <0x60>;
114			};
115		};
116
117		i2c@3 {
118			#address-cells = <1>;
119			#size-cells = <0>;
120			reg = <3>;
121
122			pca9557_a: gpio@1a {
123				compatible = "nxp,pca9557";
124				reg = <0x1a>;
125				gpio-controller;
126				#gpio-cells = <2>;
127			};
128
129			pca9557_b: gpio@1d {
130				compatible = "nxp,pca9557";
131				reg = <0x1d>;
132				gpio-controller;
133				#gpio-cells = <2>;
134			};
135
136			light-sensor@44 {
137				pinctrl-names = "default";
138				pinctrl-0 = <&pinctrl_isl29023>;
139				compatible = "isil,isl29023";
140				reg = <0x44>;
141				interrupt-parent = <&lsio_gpio1>;
142				interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
143			};
144		};
145	};
146
147	ptn5110: tcpc@50 {
148		compatible = "nxp,ptn5110";
149		pinctrl-names = "default";
150		pinctrl-0 = <&pinctrl_typec>;
151		reg = <0x50>;
152		interrupt-parent = <&lsio_gpio1>;
153		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
154
155		port {
156			typec_dr_sw: endpoint {
157				remote-endpoint = <&usb3_drd_sw>;
158			};
159		};
160
161		usb_con1: connector {
162			compatible = "usb-c-connector";
163			label = "USB-C";
164			power-role = "source";
165			data-role = "dual";
166			source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
167
168			ports {
169				#address-cells = <1>;
170				#size-cells = <0>;
171
172				port@1 {
173					reg = <1>;
174					typec_con_ss: endpoint {
175						remote-endpoint = <&usb3_data_ss>;
176					};
177				};
178			};
179		};
180	};
181
182};
183
184&lpuart0 {
185	pinctrl-names = "default";
186	pinctrl-0 = <&pinctrl_lpuart0>;
187	status = "okay";
188};
189
190&lpuart2 {
191	pinctrl-names = "default";
192	pinctrl-0 = <&pinctrl_lpuart2>;
193	status = "okay";
194};
195
196&lpuart3 {
197	pinctrl-names = "default";
198	pinctrl-0 = <&pinctrl_lpuart3>;
199	status = "okay";
200};
201
202&mu_m0 {
203	status = "okay";
204};
205
206&mu1_m0 {
207	status = "okay";
208};
209
210&scu_key {
211	status = "okay";
212};
213
214&thermal_zones {
215	pmic-thermal {
216		polling-delay-passive = <250>;
217		polling-delay = <2000>;
218		thermal-sensors = <&tsens IMX_SC_R_PMIC_0>;
219
220		trips {
221			pmic_alert0: trip0 {
222				temperature = <110000>;
223				hysteresis = <2000>;
224				type = "passive";
225			};
226
227			pmic_crit0: trip1 {
228				temperature = <125000>;
229				hysteresis = <2000>;
230				type = "critical";
231			};
232		};
233
234		cooling-maps {
235			map0 {
236				trip = <&pmic_alert0>;
237				cooling-device =
238					<&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
239					<&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
240					<&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
241					<&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
242			};
243		};
244	};
245};
246
247&usdhc1 {
248	assigned-clocks = <&clk IMX_SC_R_SDHC_0 IMX_SC_PM_CLK_PER>;
249	assigned-clock-rates = <200000000>;
250	pinctrl-names = "default";
251	pinctrl-0 = <&pinctrl_usdhc1>;
252	bus-width = <8>;
253	no-sd;
254	no-sdio;
255	non-removable;
256	status = "okay";
257};
258
259&usdhc2 {
260	assigned-clocks = <&clk IMX_SC_R_SDHC_1 IMX_SC_PM_CLK_PER>;
261	assigned-clock-rates = <200000000>;
262	pinctrl-names = "default";
263	pinctrl-0 = <&pinctrl_usdhc2>;
264	bus-width = <4>;
265	vmmc-supply = <&reg_usdhc2_vmmc>;
266	cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>;
267	wp-gpios = <&lsio_gpio4 21 GPIO_ACTIVE_HIGH>;
268	status = "okay";
269};
270
271&usb3_phy {
272	status = "okay";
273};
274
275&usbotg3 {
276	status = "okay";
277};
278
279&usbotg3_cdns3 {
280	dr_mode = "otg";
281	usb-role-switch;
282	status = "okay";
283
284	port {
285		usb3_drd_sw: endpoint {
286			remote-endpoint = <&typec_dr_sw>;
287		};
288	};
289};
290
291
292&vpu {
293	compatible = "nxp,imx8qxp-vpu";
294	status = "okay";
295};
296
297&vpu_core0 {
298	reg = <0x2d040000 0x10000>;
299	memory-region = <&decoder_boot>, <&decoder_rpc>;
300	status = "okay";
301};
302
303&vpu_core1 {
304	reg = <0x2d050000 0x10000>;
305	memory-region = <&encoder_boot>, <&encoder_rpc>;
306	status = "okay";
307};
308
309&iomuxc {
310	pinctrl_fec1: fec1grp {
311		fsl,pins = <
312			IMX8QXP_ENET0_MDC_CONN_ENET0_MDC			0x06000020
313			IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO			0x06000020
314			IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL	0x06000020
315			IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC		0x06000020
316			IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0		0x06000020
317			IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1		0x06000020
318			IMX8QXP_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2		0x06000020
319			IMX8QXP_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3		0x06000020
320			IMX8QXP_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC		0x06000020
321			IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL	0x06000020
322			IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0		0x06000020
323			IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1		0x06000020
324			IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2		0x06000020
325			IMX8QXP_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3		0x06000020
326		>;
327	};
328
329	pinctrl_ioexp_rst: ioexprstgrp {
330		fsl,pins = <
331			IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01			0x06000021
332		>;
333	};
334
335	pinctrl_isl29023: isl29023grp {
336		fsl,pins = <
337			IMX8QXP_SPI2_SDI_LSIO_GPIO1_IO02			0x00000021
338		>;
339	};
340
341	pinctrl_lpi2c1: lpi2c1grp {
342		fsl,pins = <
343			IMX8QXP_USB_SS3_TC1_ADMA_I2C1_SCL			0x06000021
344			IMX8QXP_USB_SS3_TC3_ADMA_I2C1_SDA			0x06000021
345		>;
346	};
347
348	pinctrl_lpuart0: lpuart0grp {
349		fsl,pins = <
350			IMX8QXP_UART0_RX_ADMA_UART0_RX				0x06000020
351			IMX8QXP_UART0_TX_ADMA_UART0_TX				0x06000020
352		>;
353	};
354
355	pinctrl_lpuart2: lpuart2grp {
356		fsl,pins = <
357			IMX8QXP_UART2_TX_ADMA_UART2_TX          0x06000020
358			IMX8QXP_UART2_RX_ADMA_UART2_RX          0x06000020
359		>;
360	};
361
362	pinctrl_lpuart3: lpuart3grp {
363		fsl,pins = <
364			IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX       0x06000020
365			IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX       0x06000020
366		>;
367	};
368
369	pinctrl_typec: typecgrp {
370		fsl,pins = <
371			IMX8QXP_SPI2_SCK_LSIO_GPIO1_IO03                        0x06000021
372		>;
373	};
374
375	pinctrl_typec_mux: typecmuxgrp {
376		fsl,pins = <
377			IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09           0x60
378		>;
379	};
380
381	pinctrl_usdhc1: usdhc1grp {
382		fsl,pins = <
383			IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK			0x06000041
384			IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD			0x00000021
385			IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0			0x00000021
386			IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1			0x00000021
387			IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2			0x00000021
388			IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3			0x00000021
389			IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4			0x00000021
390			IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5			0x00000021
391			IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6			0x00000021
392			IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7			0x00000021
393			IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE			0x00000041
394		>;
395	};
396
397	pinctrl_usdhc2: usdhc2grp {
398		fsl,pins = <
399			IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK			0x06000041
400			IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD			0x00000021
401			IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0			0x00000021
402			IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1			0x00000021
403			IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2			0x00000021
404			IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3			0x00000021
405			IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x00000021
406		>;
407	};
408};
409