1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright 2018-2019 Purism SPC 4 */ 5 6/dts-v1/; 7 8#include "dt-bindings/input/input.h" 9#include <dt-bindings/interrupt-controller/irq.h> 10#include <dt-bindings/leds/common.h> 11#include "dt-bindings/pwm/pwm.h" 12#include "dt-bindings/usb/pd.h" 13#include "imx8mq.dtsi" 14 15/ { 16 model = "Purism Librem 5 devkit"; 17 compatible = "purism,librem5-devkit", "fsl,imx8mq"; 18 19 backlight_dsi: backlight-dsi { 20 compatible = "pwm-backlight"; 21 /* 200 Hz for the PAM2841 */ 22 pwms = <&pwm1 0 5000000 0>; 23 brightness-levels = <0 100>; 24 num-interpolated-steps = <100>; 25 /* Default brightness level (index into the array defined by */ 26 /* the "brightness-levels" property) */ 27 default-brightness-level = <0>; 28 power-supply = <®_22v4_p>; 29 }; 30 31 chosen { 32 stdout-path = &uart1; 33 }; 34 35 gpio-keys { 36 compatible = "gpio-keys"; 37 pinctrl-names = "default"; 38 pinctrl-0 = <&pinctrl_gpio_keys>; 39 40 button-1 { 41 label = "VOL_UP"; 42 gpios = <&gpio4 21 GPIO_ACTIVE_LOW>; 43 wakeup-source; 44 linux,code = <KEY_VOLUMEUP>; 45 }; 46 47 button-2 { 48 label = "VOL_DOWN"; 49 gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; 50 wakeup-source; 51 linux,code = <KEY_VOLUMEDOWN>; 52 }; 53 54 button-3 { 55 label = "WWAN_WAKE"; 56 gpios = <&gpio3 8 GPIO_ACTIVE_LOW>; 57 interrupt-parent = <&gpio3>; 58 interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 59 wakeup-source; 60 linux,code = <KEY_PHONE>; 61 }; 62 }; 63 64 leds { 65 compatible = "pwm-leds"; 66 67 led-1 { 68 function = LED_FUNCTION_STATUS; 69 color = <LED_COLOR_ID_RED>; 70 max-brightness = <248>; 71 pwms = <&pwm2 0 50000 0>; 72 }; 73 }; 74 75 pmic_osc: clock-pmic { 76 compatible = "fixed-clock"; 77 #clock-cells = <0>; 78 clock-frequency = <32768>; 79 clock-output-names = "pmic_osc"; 80 }; 81 82 reg_1v8_p: regulator-1v8-p { 83 compatible = "regulator-fixed"; 84 regulator-name = "1v8_p"; 85 regulator-min-microvolt = <1800000>; 86 regulator-max-microvolt = <1800000>; 87 vin-supply = <®_pwr_en>; 88 }; 89 90 reg_2v8_p: regulator-2v8-p { 91 compatible = "regulator-fixed"; 92 regulator-name = "2v8_p"; 93 regulator-min-microvolt = <2800000>; 94 regulator-max-microvolt = <2800000>; 95 vin-supply = <®_pwr_en>; 96 }; 97 98 reg_3v3_p: regulator-3v3-p { 99 compatible = "regulator-fixed"; 100 regulator-name = "3v3_p"; 101 regulator-min-microvolt = <3300000>; 102 regulator-max-microvolt = <3300000>; 103 vin-supply = <®_pwr_en>; 104 105 regulator-state-mem { 106 regulator-on-in-suspend; 107 }; 108 }; 109 110 reg_5v_p: regulator-5v-p { 111 compatible = "regulator-fixed"; 112 regulator-name = "5v_p"; 113 regulator-min-microvolt = <5000000>; 114 regulator-max-microvolt = <5000000>; 115 vin-supply = <®_pwr_en>; 116 117 regulator-state-mem { 118 regulator-on-in-suspend; 119 }; 120 }; 121 122 reg_22v4_p: regulator-22v4-p { 123 compatible = "regulator-fixed"; 124 regulator-name = "22v4_P"; 125 regulator-min-microvolt = <22400000>; 126 regulator-max-microvolt = <22400000>; 127 vin-supply = <®_pwr_en>; 128 }; 129 130 reg_pwr_en: regulator-pwr-en { 131 compatible = "regulator-fixed"; 132 pinctrl-names = "default"; 133 pinctrl-0 = <&pinctrl_pwr_en>; 134 regulator-name = "PWR_EN"; 135 regulator-min-microvolt = <3300000>; 136 regulator-max-microvolt = <3300000>; 137 gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>; 138 enable-active-high; 139 regulator-always-on; 140 }; 141 142 wwan_codec: sound-wwan-codec { 143 compatible = "option,gtm601"; 144 #sound-dai-cells = <0>; 145 }; 146 147 mic_mux: mic-mux { 148 compatible = "simple-audio-mux"; 149 pinctrl-names = "default"; 150 pinctrl-0 = <&pinctrl_micsel>; 151 mux-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; 152 sound-name-prefix = "Mic Mux"; 153 }; 154 155 sound { 156 compatible = "simple-audio-card"; 157 pinctrl-names = "default"; 158 pinctrl-0 = <&pinctrl_hpdet>; 159 simple-audio-card,aux-devs = <&speaker_amp>, <&mic_mux>; 160 simple-audio-card,name = "Librem 5 Devkit"; 161 simple-audio-card,format = "i2s"; 162 simple-audio-card,widgets = 163 "Microphone", "Builtin Microphone", 164 "Microphone", "Headset Microphone", 165 "Headphone", "Headphones", 166 "Speaker", "Builtin Speaker"; 167 simple-audio-card,routing = 168 "MIC_IN", "Mic Mux OUT", 169 "Mic Mux IN1", "Headset Microphone", 170 "Mic Mux IN2", "Builtin Microphone", 171 "Mic Mux OUT", "Mic Bias", 172 "Headphones", "HP_OUT", 173 "Builtin Speaker", "Speaker Amp OUTR", 174 "Speaker Amp INR", "LINE_OUT"; 175 simple-audio-card,hp-det-gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; 176 177 simple-audio-card,cpu { 178 sound-dai = <&sai2>; 179 }; 180 181 simple-audio-card,codec { 182 sound-dai = <&sgtl5000>; 183 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>; 184 frame-master; 185 bitclock-master; 186 }; 187 }; 188 189 sound-wwan { 190 compatible = "simple-audio-card"; 191 simple-audio-card,name = "SIMCom SIM7100"; 192 simple-audio-card,format = "dsp_a"; 193 194 simple-audio-card,cpu { 195 sound-dai = <&sai6>; 196 }; 197 198 telephony_link_master: simple-audio-card,codec { 199 sound-dai = <&wwan_codec>; 200 frame-master; 201 bitclock-master; 202 }; 203 }; 204 205 speaker_amp: speaker-amp { 206 compatible = "simple-audio-amplifier"; 207 pinctrl-names = "default"; 208 pinctrl-0 = <&pinctrl_spkamp>; 209 VCC-supply = <®_3v3_p>; 210 sound-name-prefix = "Speaker Amp"; 211 enable-gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; 212 }; 213 214 vibrator { 215 compatible = "gpio-vibrator"; 216 pinctrl-names = "default"; 217 pinctrl-0 = <&pinctrl_haptic>; 218 enable-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>; 219 vcc-supply = <®_3v3_p>; 220 }; 221 222 wifi_pwr_en: regulator-wifi-en { 223 compatible = "regulator-fixed"; 224 pinctrl-names = "default"; 225 pinctrl-0 = <&pinctrl_wifi_pwr_en>; 226 regulator-name = "WIFI_EN"; 227 regulator-min-microvolt = <3300000>; 228 regulator-max-microvolt = <3300000>; 229 gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>; 230 enable-active-high; 231 regulator-always-on; 232 }; 233 234 wifi_pwr_seq: pwrseq { 235 pinctrl-names = "default"; 236 pinctrl-0 = <&pinctrl_usdhc2_rst>; 237 compatible = "mmc-pwrseq-simple"; 238 reset-gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; 239 }; 240}; 241 242&A53_0 { 243 cpu-supply = <&buck2_reg>; 244}; 245 246&A53_1 { 247 cpu-supply = <&buck2_reg>; 248}; 249 250&A53_2 { 251 cpu-supply = <&buck2_reg>; 252}; 253 254&A53_3 { 255 cpu-supply = <&buck2_reg>; 256}; 257 258&dphy { 259 status = "okay"; 260}; 261 262&fec1 { 263 pinctrl-names = "default"; 264 pinctrl-0 = <&pinctrl_fec1>; 265 phy-mode = "rgmii-id"; 266 phy-handle = <ðphy0>; 267 fsl,magic-packet; 268 phy-supply = <®_3v3_p>; 269 status = "okay"; 270 271 mdio { 272 #address-cells = <1>; 273 #size-cells = <0>; 274 275 ethphy0: ethernet-phy@1 { 276 compatible = "ethernet-phy-ieee802.3-c22"; 277 reg = <1>; 278 }; 279 }; 280}; 281 282&i2c1 { 283 clock-frequency = <100000>; 284 pinctrl-names = "default"; 285 pinctrl-0 = <&pinctrl_i2c1>; 286 status = "okay"; 287 288 pmic: pmic@4b { 289 compatible = "rohm,bd71837"; 290 reg = <0x4b>; 291 pinctrl-names = "default"; 292 pinctrl-0 = <&pinctrl_pmic>; 293 clocks = <&pmic_osc>; 294 clock-names = "osc"; 295 #clock-cells = <0>; 296 clock-output-names = "pmic_clk"; 297 interrupt-parent = <&gpio1>; 298 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 299 rohm,reset-snvs-powered; 300 301 regulators { 302 buck1_reg: BUCK1 { 303 regulator-name = "buck1"; 304 regulator-min-microvolt = <700000>; 305 regulator-max-microvolt = <1300000>; 306 regulator-boot-on; 307 regulator-always-on; 308 regulator-ramp-delay = <1250>; 309 rohm,dvs-run-voltage = <900000>; 310 rohm,dvs-idle-voltage = <850000>; 311 rohm,dvs-suspend-voltage = <800000>; 312 }; 313 314 buck2_reg: BUCK2 { 315 regulator-name = "buck2"; 316 regulator-min-microvolt = <700000>; 317 regulator-max-microvolt = <1300000>; 318 regulator-boot-on; 319 regulator-ramp-delay = <1250>; 320 rohm,dvs-run-voltage = <1000000>; 321 rohm,dvs-idle-voltage = <900000>; 322 regulator-always-on; 323 }; 324 325 buck3_reg: BUCK3 { 326 regulator-name = "buck3"; 327 regulator-min-microvolt = <700000>; 328 regulator-max-microvolt = <1300000>; 329 regulator-boot-on; 330 rohm,dvs-run-voltage = <900000>; 331 }; 332 333 buck4_reg: BUCK4 { 334 regulator-name = "buck4"; 335 regulator-min-microvolt = <700000>; 336 regulator-max-microvolt = <1300000>; 337 rohm,dvs-run-voltage = <1000000>; 338 }; 339 340 buck5_reg: BUCK5 { 341 regulator-name = "buck5"; 342 regulator-min-microvolt = <700000>; 343 regulator-max-microvolt = <1350000>; 344 regulator-boot-on; 345 regulator-always-on; 346 }; 347 348 buck6_reg: BUCK6 { 349 regulator-name = "buck6"; 350 regulator-min-microvolt = <3000000>; 351 regulator-max-microvolt = <3300000>; 352 regulator-boot-on; 353 regulator-always-on; 354 }; 355 356 buck7_reg: BUCK7 { 357 regulator-name = "buck7"; 358 regulator-min-microvolt = <1605000>; 359 regulator-max-microvolt = <1995000>; 360 regulator-boot-on; 361 regulator-always-on; 362 }; 363 364 buck8_reg: BUCK8 { 365 regulator-name = "buck8"; 366 regulator-min-microvolt = <800000>; 367 regulator-max-microvolt = <1400000>; 368 regulator-boot-on; 369 regulator-always-on; 370 }; 371 372 ldo1_reg: LDO1 { 373 regulator-name = "ldo1"; 374 regulator-min-microvolt = <3000000>; 375 regulator-max-microvolt = <3300000>; 376 regulator-boot-on; 377 /* leave on for snvs power button */ 378 regulator-always-on; 379 }; 380 381 ldo2_reg: LDO2 { 382 regulator-name = "ldo2"; 383 regulator-min-microvolt = <900000>; 384 regulator-max-microvolt = <900000>; 385 regulator-boot-on; 386 /* leave on for snvs power button */ 387 regulator-always-on; 388 }; 389 390 ldo3_reg: LDO3 { 391 regulator-name = "ldo3"; 392 regulator-min-microvolt = <1800000>; 393 regulator-max-microvolt = <3300000>; 394 regulator-boot-on; 395 regulator-always-on; 396 }; 397 398 ldo4_reg: LDO4 { 399 regulator-name = "ldo4"; 400 regulator-min-microvolt = <900000>; 401 regulator-max-microvolt = <1800000>; 402 regulator-boot-on; 403 regulator-always-on; 404 }; 405 406 ldo5_reg: LDO5 { 407 regulator-name = "ldo5"; 408 regulator-min-microvolt = <1800000>; 409 regulator-max-microvolt = <3300000>; 410 regulator-always-on; 411 }; 412 413 ldo6_reg: LDO6 { 414 regulator-name = "ldo6"; 415 regulator-min-microvolt = <900000>; 416 regulator-max-microvolt = <1800000>; 417 regulator-boot-on; 418 regulator-always-on; 419 }; 420 421 ldo7_reg: LDO7 { 422 regulator-name = "ldo7"; 423 regulator-min-microvolt = <1800000>; 424 regulator-max-microvolt = <3300000>; 425 regulator-boot-on; 426 regulator-always-on; 427 }; 428 }; 429 }; 430 431 typec_ptn5100: usb-typec@52 { 432 compatible = "nxp,ptn5110", "tcpci"; 433 reg = <0x52>; 434 pinctrl-names = "default"; 435 pinctrl-0 = <&pinctrl_typec>; 436 interrupt-parent = <&gpio3>; 437 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 438 439 connector { 440 compatible = "usb-c-connector"; 441 label = "USB-C"; 442 data-role = "dual"; 443 power-role = "dual"; 444 try-power-role = "sink"; 445 source-pdos = <PDO_FIXED(5000, 2000, 446 PDO_FIXED_USB_COMM | 447 PDO_FIXED_DUAL_ROLE | 448 PDO_FIXED_DATA_SWAP )>; 449 sink-pdos = <PDO_FIXED(5000, 3500, PDO_FIXED_USB_COMM | 450 PDO_FIXED_DUAL_ROLE | 451 PDO_FIXED_DATA_SWAP ) 452 PDO_VAR(5000, 5000, 3500)>; 453 op-sink-microwatt = <10000000>; 454 455 ports { 456 #address-cells = <1>; 457 #size-cells = <0>; 458 459 port@0 { 460 reg = <0>; 461 462 usb_con_hs: endpoint { 463 remote-endpoint = <&typec_hs>; 464 }; 465 }; 466 467 port@1 { 468 reg = <1>; 469 470 usb_con_ss: endpoint { 471 remote-endpoint = <&typec_ss>; 472 }; 473 }; 474 }; 475 }; 476 }; 477 478 rtc@68 { 479 compatible = "microcrystal,rv4162"; 480 reg = <0x68>; 481 pinctrl-names = "default"; 482 pinctrl-0 = <&pinctrl_rtc>; 483 interrupt-parent = <&gpio4>; 484 interrupts = <29 IRQ_TYPE_LEVEL_LOW>; 485 }; 486 487 charger@6b { /* bq25896 */ 488 compatible = "ti,bq25890"; 489 reg = <0x6b>; 490 pinctrl-names = "default"; 491 pinctrl-0 = <&pinctrl_charger>; 492 interrupt-parent = <&gpio3>; 493 interrupts = <25 IRQ_TYPE_EDGE_FALLING>; 494 ti,battery-regulation-voltage = <4192000>; /* 4.192V */ 495 ti,charge-current = <1600000>; /* 1.6A */ 496 ti,termination-current = <66000>; /* 66mA */ 497 ti,precharge-current = <130000>; /* 130mA */ 498 ti,minimum-sys-voltage = <3000000>; /* 3V */ 499 ti,boost-voltage = <5000000>; /* 5V */ 500 ti,boost-max-current = <50000>; /* 50mA */ 501 }; 502}; 503 504&i2c3 { 505 clock-frequency = <100000>; 506 pinctrl-names = "default"; 507 pinctrl-0 = <&pinctrl_i2c3>; 508 status = "okay"; 509 510 magnetometer@1e { 511 compatible = "st,lsm9ds1-magn"; 512 reg = <0x1e>; 513 pinctrl-names = "default"; 514 pinctrl-0 = <&pinctrl_imu>; 515 interrupt-parent = <&gpio3>; 516 interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; 517 vdd-supply = <®_3v3_p>; 518 vddio-supply = <®_3v3_p>; 519 }; 520 521 sgtl5000: audio-codec@a { 522 compatible = "fsl,sgtl5000"; 523 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>; 524 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>; 525 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; 526 assigned-clock-rates = <24576000>; 527 #sound-dai-cells = <0>; 528 reg = <0x0a>; 529 VDDD-supply = <®_1v8_p>; 530 VDDIO-supply = <®_3v3_p>; 531 VDDA-supply = <®_3v3_p>; 532 }; 533 534 touchscreen@5d { 535 compatible = "goodix,gt5688"; 536 reg = <0x5d>; 537 pinctrl-names = "default"; 538 pinctrl-0 = <&pinctrl_ts>; 539 interrupt-parent = <&gpio3>; 540 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 541 reset-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; 542 irq-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>; 543 touchscreen-size-x = <720>; 544 touchscreen-size-y = <1440>; 545 AVDD28-supply = <®_2v8_p>; 546 VDDIO-supply = <®_1v8_p>; 547 }; 548 549 proximity-sensor@60 { 550 compatible = "vishay,vcnl4040"; 551 reg = <0x60>; 552 pinctrl-0 = <&pinctrl_prox>; 553 }; 554 555 accel-gyro@6a { 556 compatible = "st,lsm9ds1-imu"; 557 reg = <0x6a>; 558 vdd-supply = <®_3v3_p>; 559 vddio-supply = <®_3v3_p>; 560 mount-matrix = "1", "0", "0", 561 "0", "1", "0", 562 "0", "0", "-1"; 563 }; 564}; 565 566&iomuxc { 567 pinctrl_bl: blgrp { 568 fsl,pins = < 569 MX8MQ_IOMUXC_GPIO1_IO01_PWM1_OUT 0x6 /* DSI_BL_PWM */ 570 >; 571 }; 572 573 pinctrl_bt: btgrp { 574 fsl,pins = < 575 MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11 0x16 /* nBT_DISABLE */ 576 MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7 0x10 /* BT_HOST_WAKE */ 577 >; 578 }; 579 580 pinctrl_charger: chargergrp { 581 fsl,pins = < 582 MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x80 /* CHRG_nINT */ 583 >; 584 }; 585 586 pinctrl_fec1: fec1grp { 587 fsl,pins = < 588 MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3 589 MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 590 MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 591 MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 592 MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 593 MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f 594 MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 595 MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 596 MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 597 MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 598 MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f 599 MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 600 MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 601 MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 602 MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 603 MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2 0x1f 604 >; 605 }; 606 607 pinctrl_ts: tsgrp { 608 fsl,pins = < 609 MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0 0x16 /* TOUCH INT */ 610 MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x19 /* TOUCH RST */ 611 >; 612 }; 613 614 pinctrl_pwm_led: pwmledgrp { 615 fsl,pins = < 616 MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT 0x16 617 >; 618 }; 619 620 pinctrl_gpio_keys: gpiokeygrp { 621 fsl,pins = < 622 MX8MQ_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x16 623 MX8MQ_IOMUXC_SAI2_RXC_GPIO4_IO22 0x16 624 MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8 0x80 /* nWoWWAN */ 625 >; 626 }; 627 628 pinctrl_haptic: hapticgrp { 629 fsl,pins = < 630 MX8MQ_IOMUXC_SPDIF_RX_GPIO5_IO4 0xc6 /* nHAPTIC */ 631 >; 632 }; 633 634 pinctrl_hpdet: hpdetgrp { 635 fsl,pins = < 636 MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0xC0 /* HP_DET */ 637 >; 638 }; 639 640 pinctrl_i2c1: i2c1grp { 641 fsl,pins = < 642 MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000001f 643 MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000001f 644 >; 645 }; 646 647 pinctrl_i2c3: i2c3grp { 648 fsl,pins = < 649 MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000001f 650 MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000001f 651 >; 652 }; 653 654 pinctrl_imu: imugrp { 655 fsl,pins = < 656 MX8MQ_IOMUXC_SAI5_RXFS_GPIO3_IO19 0x8 /* IMU_INT */ 657 >; 658 }; 659 660 pinctrl_micsel: micselgrp { 661 fsl,pins = < 662 MX8MQ_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0xc6 /* MIC_SEL */ 663 >; 664 }; 665 666 pinctrl_spkamp: spkampgrp { 667 fsl,pins = < 668 MX8MQ_IOMUXC_SPDIF_TX_GPIO5_IO3 0x81 /* MUTE */ 669 >; 670 }; 671 672 pinctrl_pmic: pmicgrp { 673 fsl,pins = < 674 MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x80 /* PMIC intr */ 675 >; 676 }; 677 678 pinctrl_prox: proxgrp { 679 fsl,pins = < 680 MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x80 /* prox intr */ 681 >; 682 }; 683 684 pinctrl_pwr_en: pwrengrp { 685 fsl,pins = < 686 MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x06 687 >; 688 }; 689 690 pinctrl_rtc: rtcgrp { 691 fsl,pins = < 692 MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x80 /* RTC intr */ 693 >; 694 }; 695 696 pinctrl_sai2: sai2grp { 697 fsl,pins = < 698 MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6 699 MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6 700 MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6 701 MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6 702 MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6 703 >; 704 }; 705 706 pinctrl_sai6: sai6grp { 707 fsl,pins = < 708 MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0 0xd6 709 MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC 0xd6 710 MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK 0xd6 711 MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0 0xd6 712 >; 713 }; 714 715 pinctrl_typec: typecgrp { 716 fsl,pins = < 717 MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12 0x16 718 MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x80 719 >; 720 }; 721 722 pinctrl_uart1: uart1grp { 723 fsl,pins = < 724 MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 725 MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49 726 >; 727 }; 728 729 pinctrl_uart2: uart2grp { 730 fsl,pins = < 731 MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49 732 MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49 733 MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B 0x49 734 MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B 0x49 735 >; 736 }; 737 738 pinctrl_uart3: uart3grp { 739 fsl,pins = < 740 MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49 741 MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49 742 >; 743 }; 744 745 pinctrl_uart4: uart4grp { 746 fsl,pins = < 747 MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49 748 MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49 749 MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49 750 MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49 751 MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x49 752 >; 753 }; 754 755 pinctrl_usdhc1: usdhc1grp { 756 fsl,pins = < 757 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83 758 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3 759 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3 760 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3 761 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3 762 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3 763 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3 764 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3 765 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3 766 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3 767 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83 768 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 769 >; 770 }; 771 772 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 773 fsl,pins = < 774 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d 775 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd 776 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd 777 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd 778 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd 779 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd 780 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd 781 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd 782 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd 783 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd 784 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d 785 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 786 >; 787 }; 788 789 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 790 fsl,pins = < 791 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f 792 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf 793 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf 794 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf 795 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf 796 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf 797 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf 798 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf 799 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf 800 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf 801 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f 802 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 803 >; 804 }; 805 806 pinctrl_usdhc2_rst: usdhc2rstgrp { 807 fsl,pins = < 808 MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 809 >; 810 }; 811 812 pinctrl_usdhc2_gpio: usdhc2gpiogrp { 813 fsl,pins = < 814 MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20 0x80 /* WIFI_WAKE */ 815 >; 816 }; 817 818 pinctrl_usdhc2: usdhc2grp { 819 fsl,pins = < 820 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83 821 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3 822 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3 823 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3 824 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3 825 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3 826 >; 827 }; 828 829 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 830 fsl,pins = < 831 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d 832 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd 833 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd 834 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd 835 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd 836 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd 837 >; 838 }; 839 840 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 841 fsl,pins = < 842 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f 843 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcf 844 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcf 845 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcf 846 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcf 847 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcf 848 >; 849 }; 850 851 pinctrl_wdog: wdoggrp { 852 fsl,pins = < 853 MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 854 >; 855 }; 856 857 pinctrl_wifi_pwr_en: wifipwrengrp { 858 fsl,pins = < 859 MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5 0x06 860 >; 861 }; 862 863 pinctrl_wwan: wwangrp { 864 fsl,pins = < 865 MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x09 /* nWWAN_DISABLE */ 866 MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8 0x80 /* nWoWWAN */ 867 MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x19 /* WWAN_RESET */ 868 >; 869 }; 870}; 871 872&lcdif { 873 status = "okay"; 874}; 875 876&mipi_dsi { 877 status = "okay"; 878 #address-cells = <1>; 879 #size-cells = <0>; 880 881 panel@0 { 882 compatible = "rocktech,jh057n00900"; 883 reg = <0>; 884 backlight = <&backlight_dsi>; 885 reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>; 886 iovcc-supply = <®_1v8_p>; 887 vcc-supply = <®_2v8_p>; 888 port { 889 panel_in: endpoint { 890 remote-endpoint = <&mipi_dsi_out>; 891 }; 892 }; 893 }; 894 895 ports { 896 port@1 { 897 reg = <1>; 898 mipi_dsi_out: endpoint { 899 remote-endpoint = <&panel_in>; 900 }; 901 }; 902 }; 903}; 904 905&pgc_gpu { 906 power-supply = <&buck3_reg>; 907}; 908 909&pgc_vpu { 910 power-supply = <&buck4_reg>; 911}; 912 913&pwm1 { 914 pinctrl-names = "default"; 915 pinctrl-0 = <&pinctrl_bl>; 916 status = "okay"; 917}; 918 919&pwm2 { 920 pinctrl-names = "default"; 921 pinctrl-0 = <&pinctrl_pwm_led>; 922 status = "okay"; 923}; 924 925&snvs_pwrkey { 926 status = "okay"; 927}; 928 929&snvs_rtc { 930 status = "disabled"; 931}; 932 933&sai2 { 934 pinctrl-names = "default"; 935 pinctrl-0 = <&pinctrl_sai2>; 936 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>; 937 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; 938 assigned-clock-rates = <24576000>; 939 status = "okay"; 940}; 941 942&sai6 { 943 pinctrl-names = "default"; 944 pinctrl-0 = <&pinctrl_sai6>; 945 assigned-clocks = <&clk IMX8MQ_CLK_SAI6>; 946 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>; 947 assigned-clock-rates = <24576000>; 948 fsl,sai-synchronous-rx; 949 status = "okay"; 950}; 951 952&uart1 { /* console */ 953 pinctrl-names = "default"; 954 pinctrl-0 = <&pinctrl_uart1>; 955 status = "okay"; 956}; 957 958&uart3 { /* GNSS */ 959 pinctrl-names = "default"; 960 pinctrl-0 = <&pinctrl_uart3>; 961 status = "okay"; 962}; 963 964&uart4 { /* BT */ 965 pinctrl-names = "default"; 966 pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_bt>; 967 uart-has-rtscts; 968 status = "okay"; 969}; 970 971&usb3_phy0 { 972 vbus-supply = <®_5v_p>; 973 status = "okay"; 974}; 975 976&usb3_phy1 { 977 vbus-supply = <®_5v_p>; 978 status = "okay"; 979}; 980 981&usb_dwc3_0 { 982 #address-cells = <1>; 983 #size-cells = <0>; 984 dr_mode = "otg"; 985 status = "okay"; 986 987 port@0 { 988 reg = <0>; 989 990 typec_hs: endpoint { 991 remote-endpoint = <&usb_con_hs>; 992 }; 993 }; 994 995 port@1 { 996 reg = <1>; 997 998 typec_ss: endpoint { 999 remote-endpoint = <&usb_con_ss>; 1000 }; 1001 }; 1002}; 1003 1004&usb_dwc3_1 { 1005 dr_mode = "host"; 1006 status = "okay"; 1007}; 1008 1009&usdhc1 { 1010 assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>; 1011 assigned-clock-rates = <400000000>; 1012 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 1013 pinctrl-0 = <&pinctrl_usdhc1>; 1014 pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 1015 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 1016 bus-width = <8>; 1017 non-removable; 1018 status = "okay"; 1019}; 1020 1021&usdhc2 { 1022 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>; 1023 assigned-clock-rates = <200000000>; 1024 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 1025 pinctrl-0 = <&pinctrl_usdhc2>; 1026 pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 1027 pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 1028 bus-width = <4>; 1029 vmmc-supply = <&wifi_pwr_en>; 1030 mmc-pwrseq = <&wifi_pwr_seq>; 1031 broken-cd; 1032 disable-wp; 1033 cap-sdio-irq; 1034 keep-power-in-suspend; 1035 wakeup-source; 1036 status = "okay"; 1037}; 1038 1039&wdog1 { 1040 pinctrl-names = "default"; 1041 pinctrl-0 = <&pinctrl_wdog>; 1042 fsl,ext-reset-output; 1043 status = "okay"; 1044}; 1045