1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2018 Jon Nettleton <jon@solid-run.com> 4 */ 5 6/dts-v1/; 7 8#include "dt-bindings/usb/pd.h" 9#include "imx8mq-sr-som.dtsi" 10 11/ { 12 model = "SolidRun i.MX8MQ HummingBoard Pulse"; 13 compatible = "solidrun,hummingboard-pulse", "fsl,imx8mq"; 14 15 chosen { 16 stdout-path = &uart1; 17 }; 18 19 reg_usdhc2_vmmc: regulator-usdhc2-vmmc { 20 compatible = "regulator-fixed"; 21 pinctrl-names = "default"; 22 pinctrl-0 = <&pinctrl_usdhc2_vmmc>; 23 regulator-name = "VSD_3V3"; 24 regulator-min-microvolt = <3300000>; 25 regulator-max-microvolt = <3300000>; 26 gpio = <&gpio1 13 GPIO_ACTIVE_LOW>; 27 }; 28 29 reg_v_5v0: regulator-v-5v0 { 30 compatible = "regulator-fixed"; 31 regulator-name = "v_5v0"; 32 regulator-max-microvolt = <5000000>; 33 regulator-min-microvolt = <5000000>; 34 regulator-always-on; 35 }; 36}; 37 38&i2c2 { 39 pinctrl-names = "default"; 40 pinctrl-0 = <&pinctrl_i2c2>; 41 clock-frequency = <100000>; 42 status = "okay"; 43 44 typec_ptn5100: usb-typec@50 { 45 compatible = "nxp,ptn5110"; 46 reg = <0x50>; 47 pinctrl-names = "default"; 48 pinctrl-0 = <&pinctrl_typec>; 49 interrupt-parent = <&gpio1>; 50 interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 51 52 connector { 53 compatible = "usb-c-connector"; 54 label = "USB-C"; 55 data-role = "dual"; 56 power-role = "dual"; 57 try-power-role = "sink"; 58 source-pdos = <PDO_FIXED(5000, 2000, 59 PDO_FIXED_USB_COMM | 60 PDO_FIXED_SUSPEND | 61 PDO_FIXED_EXTPOWER)>; 62 sink-pdos = <PDO_FIXED(5000, 2000, 63 PDO_FIXED_USB_COMM | 64 PDO_FIXED_SUSPEND | 65 PDO_FIXED_EXTPOWER) 66 PDO_FIXED(9000, 2000, 67 PDO_FIXED_USB_COMM | 68 PDO_FIXED_SUSPEND | 69 PDO_FIXED_EXTPOWER)>; 70 op-sink-microwatt = <9000000>; 71 72 port { 73 typec1_dr_sw: endpoint { 74 remote-endpoint = <&usb1_drd_sw>; 75 }; 76 }; 77 }; 78 }; 79}; 80 81&i2c3 { 82 pinctrl-names = "default"; 83 pinctrl-0 = <&pinctrl_i2c3>; 84 clock-frequency = <100000>; 85 status = "okay"; 86 87 rtc@69 { 88 compatible = "abracon,ab1805"; 89 reg = <0x69>; 90 abracon,tc-diode = "schottky"; 91 abracon,tc-resistor = <3>; 92 }; 93}; 94 95&uart2 { /* J35 header */ 96 pinctrl-names = "default"; 97 pinctrl-0 = <&pinctrl_uart2>; 98 assigned-clocks = <&clk IMX8MQ_CLK_UART2>; 99 assigned-clock-parents = <&clk IMX8MQ_CLK_25M>; 100 status = "okay"; 101}; 102 103&uart3 { /* Mikrobus */ 104 pinctrl-names = "default"; 105 pinctrl-0 = <&pinctrl_uart3>; 106 assigned-clocks = <&clk IMX8MQ_CLK_UART3>; 107 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>; 108 uart-has-rtscts; 109 status = "okay"; 110}; 111 112&usdhc2 { 113 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>; 114 assigned-clock-rates = <200000000>; 115 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 116 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 117 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; 118 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; 119 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 120 vmmc-supply = <®_usdhc2_vmmc>; 121 status = "okay"; 122}; 123 124&usb_dwc3_0 { 125 dr_mode = "otg"; 126 status = "okay"; 127 128 port { 129 usb1_drd_sw: endpoint { 130 remote-endpoint = <&typec1_dr_sw>; 131 }; 132 }; 133}; 134 135&usb_dwc3_1 { 136 dr_mode = "host"; 137 status = "okay"; 138}; 139 140&usb3_phy0 { 141 status = "okay"; 142}; 143 144&usb3_phy1 { 145 status = "okay"; 146}; 147 148&iomuxc { 149 pinctrl-names = "default"; 150 pinctrl-0 = <&pinctrl_hog>; 151 152 pinctrl_hog: hoggrp { 153 fsl,pins = < 154 /* MikroBus Analog */ 155 MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11 0x41 156 /* MikroBus Reset */ 157 MX8MQ_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x41 158 /* 159 * The following 2 pins need to be commented out and 160 * reconfigured to enable RTS/CTS on UART3 161 */ 162 /* MikroBus PWM */ 163 MX8MQ_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x41 164 /* MikroBus INT */ 165 MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41 166 >; 167 }; 168 169 pinctrl_i2c2: i2c2grp { 170 fsl,pins = < 171 MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x4000007f 172 MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x4000007f 173 >; 174 }; 175 176 pinctrl_i2c3: i2c3grp { 177 fsl,pins = < 178 MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f 179 MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f 180 >; 181 }; 182 183 pinctrl_typec: typecgrp { 184 fsl,pins = < 185 MX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15 0x16 186 MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x17059 187 >; 188 }; 189 190 pinctrl_uart2: uart2grp { 191 fsl,pins = < 192 MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49 193 MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49 194 >; 195 }; 196 197 pinctrl_uart3: uart3grp { 198 fsl,pins = < 199 MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49 200 MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49 201 /* 202 * These pins are by default GPIO on the Mikro Bus 203 * Header. To use RTS/CTS on UART3 comment them out 204 * of the hoggrp and enable them here 205 */ 206 /* MX8MQ_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x49 */ 207 /* MX8MQ_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x49 */ 208 >; 209 }; 210 211 pinctrl_usdhc2_gpio: usdhc2grpgpio { 212 fsl,pins = < 213 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 214 >; 215 }; 216 217 pinctrl_usdhc2_vmmc: usdhc2vmmcgpio { 218 fsl,pins = < 219 MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x41 220 >; 221 }; 222 223 pinctrl_usdhc2: usdhc2grp { 224 fsl,pins = < 225 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83 226 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3 227 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3 228 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3 229 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3 230 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3 231 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 232 >; 233 }; 234 235 pinctrl_usdhc2_100mhz: usdhc2grp100mhz { 236 fsl,pins = < 237 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d 238 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd 239 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd 240 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd 241 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd 242 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd 243 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 244 >; 245 }; 246 247 pinctrl_usdhc2_200mhz: usdhc2grp200mhz { 248 fsl,pins = < 249 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f 250 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xdf 251 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xdf 252 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xdf 253 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xdf 254 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xdf 255 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 256 >; 257 }; 258}; 259