1*b7416c69STim Harvey// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*b7416c69STim Harvey/* 3*b7416c69STim Harvey * Copyright 2024 Gateworks Corporation 4*b7416c69STim Harvey */ 5*b7416c69STim Harvey 6*b7416c69STim Harvey#include <dt-bindings/gpio/gpio.h> 7*b7416c69STim Harvey#include <dt-bindings/leds/common.h> 8*b7416c69STim Harvey#include <dt-bindings/phy/phy-imx8-pcie.h> 9*b7416c69STim Harvey 10*b7416c69STim Harvey/ { 11*b7416c69STim Harvey aliases { 12*b7416c69STim Harvey ethernet1 = ð1; 13*b7416c69STim Harvey fsa1 = &fsa0; 14*b7416c69STim Harvey fsa2 = &fsa1; 15*b7416c69STim Harvey }; 16*b7416c69STim Harvey 17*b7416c69STim Harvey led-controller { 18*b7416c69STim Harvey compatible = "gpio-leds"; 19*b7416c69STim Harvey pinctrl-names = "default"; 20*b7416c69STim Harvey pinctrl-0 = <&pinctrl_gpio_leds>; 21*b7416c69STim Harvey 22*b7416c69STim Harvey led-0 { 23*b7416c69STim Harvey function = LED_FUNCTION_STATUS; 24*b7416c69STim Harvey color = <LED_COLOR_ID_GREEN>; 25*b7416c69STim Harvey gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>; 26*b7416c69STim Harvey default-state = "on"; 27*b7416c69STim Harvey linux,default-trigger = "heartbeat"; 28*b7416c69STim Harvey }; 29*b7416c69STim Harvey 30*b7416c69STim Harvey led-1 { 31*b7416c69STim Harvey function = LED_FUNCTION_STATUS; 32*b7416c69STim Harvey color = <LED_COLOR_ID_RED>; 33*b7416c69STim Harvey gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; 34*b7416c69STim Harvey default-state = "off"; 35*b7416c69STim Harvey }; 36*b7416c69STim Harvey }; 37*b7416c69STim Harvey 38*b7416c69STim Harvey pcie0_refclk: clock-pcie0 { 39*b7416c69STim Harvey compatible = "fixed-clock"; 40*b7416c69STim Harvey #clock-cells = <0>; 41*b7416c69STim Harvey clock-frequency = <100000000>; 42*b7416c69STim Harvey }; 43*b7416c69STim Harvey 44*b7416c69STim Harvey pps { 45*b7416c69STim Harvey compatible = "pps-gpio"; 46*b7416c69STim Harvey pinctrl-names = "default"; 47*b7416c69STim Harvey pinctrl-0 = <&pinctrl_pps>; 48*b7416c69STim Harvey gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; 49*b7416c69STim Harvey }; 50*b7416c69STim Harvey 51*b7416c69STim Harvey reg_usb2_vbus: regulator-usb2 { 52*b7416c69STim Harvey compatible = "regulator-fixed"; 53*b7416c69STim Harvey pinctrl-names = "default"; 54*b7416c69STim Harvey pinctrl-0 = <&pinctrl_reg_usb2_en>; 55*b7416c69STim Harvey regulator-name = "usb2_vbus"; 56*b7416c69STim Harvey regulator-min-microvolt = <5000000>; 57*b7416c69STim Harvey regulator-max-microvolt = <5000000>; 58*b7416c69STim Harvey gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>; 59*b7416c69STim Harvey enable-active-high; 60*b7416c69STim Harvey }; 61*b7416c69STim Harvey 62*b7416c69STim Harvey reg_usdhc2_vmmc: regulator-usdhc2-vmmc { 63*b7416c69STim Harvey compatible = "regulator-fixed"; 64*b7416c69STim Harvey pinctrl-names = "default"; 65*b7416c69STim Harvey pinctrl-0 = <&pinctrl_usdhc2_vmmc>; 66*b7416c69STim Harvey regulator-name = "VDD_3V3_SD"; 67*b7416c69STim Harvey regulator-max-microvolt = <3300000>; 68*b7416c69STim Harvey regulator-min-microvolt = <3300000>; 69*b7416c69STim Harvey gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 70*b7416c69STim Harvey enable-active-high; 71*b7416c69STim Harvey off-on-delay-us = <12000>; 72*b7416c69STim Harvey startup-delay-us = <100>; 73*b7416c69STim Harvey }; 74*b7416c69STim Harvey}; 75*b7416c69STim Harvey 76*b7416c69STim Harvey&ecspi2 { 77*b7416c69STim Harvey pinctrl-names = "default"; 78*b7416c69STim Harvey pinctrl-0 = <&pinctrl_spi2>; 79*b7416c69STim Harvey cs-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>, /* CS0 onboard TPM */ 80*b7416c69STim Harvey <&gpio5 13 GPIO_ACTIVE_LOW>, /* CS1 off-board J32 SPI */ 81*b7416c69STim Harvey <&gpio1 12 GPIO_ACTIVE_LOW>, /* CS3 off-board J52 FSA1 */ 82*b7416c69STim Harvey <&gpio4 26 GPIO_ACTIVE_LOW>; /* CS2 off-board J51 FSA2 */ 83*b7416c69STim Harvey status = "okay"; 84*b7416c69STim Harvey 85*b7416c69STim Harvey tpm@0 { 86*b7416c69STim Harvey compatible = "atmel,attpm20p", "tcg,tpm_tis-spi"; 87*b7416c69STim Harvey reg = <0x0>; 88*b7416c69STim Harvey spi-max-frequency = <10000000>; 89*b7416c69STim Harvey }; 90*b7416c69STim Harvey}; 91*b7416c69STim Harvey 92*b7416c69STim Harvey&flexcan1 { 93*b7416c69STim Harvey pinctrl-names = "default"; 94*b7416c69STim Harvey pinctrl-0 = <&pinctrl_can1>; 95*b7416c69STim Harvey status = "okay"; 96*b7416c69STim Harvey}; 97*b7416c69STim Harvey 98*b7416c69STim Harvey&flexcan2 { 99*b7416c69STim Harvey pinctrl-names = "default"; 100*b7416c69STim Harvey pinctrl-0 = <&pinctrl_can2>; 101*b7416c69STim Harvey status = "okay"; 102*b7416c69STim Harvey}; 103*b7416c69STim Harvey 104*b7416c69STim Harvey&gpio1 { 105*b7416c69STim Harvey gpio-line-names = 106*b7416c69STim Harvey "", "", "", "", 107*b7416c69STim Harvey "", "", "", "", 108*b7416c69STim Harvey "", "", "", "", 109*b7416c69STim Harvey "", "fsa2_gpio1", "", "", 110*b7416c69STim Harvey "", "", "", "", 111*b7416c69STim Harvey "", "", "", "", 112*b7416c69STim Harvey "", "", "", "", 113*b7416c69STim Harvey "", "", "", ""; 114*b7416c69STim Harvey}; 115*b7416c69STim Harvey 116*b7416c69STim Harvey&gpio4 { 117*b7416c69STim Harvey gpio-line-names = 118*b7416c69STim Harvey "", "", "", "", 119*b7416c69STim Harvey "", "", "", "", 120*b7416c69STim Harvey "dio1", "fsa1_gpio2", "", "dio0", 121*b7416c69STim Harvey "", "", "", "", 122*b7416c69STim Harvey "", "", "", "", 123*b7416c69STim Harvey "", "", "rs485_en", "rs485_term", 124*b7416c69STim Harvey "fsa2_gpio2", "fsa1_gpio1", "", "rs485_half", 125*b7416c69STim Harvey "", "", "", ""; 126*b7416c69STim Harvey}; 127*b7416c69STim Harvey 128*b7416c69STim Harvey&i2c2 { 129*b7416c69STim Harvey accelerometer@19 { 130*b7416c69STim Harvey compatible = "st,lis2de12"; 131*b7416c69STim Harvey reg = <0x19>; 132*b7416c69STim Harvey pinctrl-names = "default"; 133*b7416c69STim Harvey pinctrl-0 = <&pinctrl_accel>; 134*b7416c69STim Harvey interrupt-parent = <&gpio4>; 135*b7416c69STim Harvey interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 136*b7416c69STim Harvey st,drdy-int-pin = <1>; 137*b7416c69STim Harvey }; 138*b7416c69STim Harvey 139*b7416c69STim Harvey magnetometer@1e { 140*b7416c69STim Harvey compatible = "st,lis2mdl"; 141*b7416c69STim Harvey reg = <0x1e>; 142*b7416c69STim Harvey pinctrl-names = "default"; 143*b7416c69STim Harvey pinctrl-0 = <&pinctrl_mag>; 144*b7416c69STim Harvey interrupt-parent = <&gpio4>; 145*b7416c69STim Harvey interrupts = <28 IRQ_TYPE_LEVEL_LOW>; 146*b7416c69STim Harvey }; 147*b7416c69STim Harvey}; 148*b7416c69STim Harvey 149*b7416c69STim Harvey&i2c3 { 150*b7416c69STim Harvey i2c-mux@70 { 151*b7416c69STim Harvey compatible = "nxp,pca9548"; 152*b7416c69STim Harvey reg = <0x70>; 153*b7416c69STim Harvey #address-cells = <1>; 154*b7416c69STim Harvey #size-cells = <0>; 155*b7416c69STim Harvey 156*b7416c69STim Harvey /* J30 */ 157*b7416c69STim Harvey fsa1: i2c@0 { 158*b7416c69STim Harvey reg = <0>; 159*b7416c69STim Harvey pinctrl-names = "default"; 160*b7416c69STim Harvey pinctrl-0 = <&pinctrl_fsa2i2c>; 161*b7416c69STim Harvey #address-cells = <1>; 162*b7416c69STim Harvey #size-cells = <0>; 163*b7416c69STim Harvey 164*b7416c69STim Harvey gpio@20 { 165*b7416c69STim Harvey compatible = "nxp,pca9555"; 166*b7416c69STim Harvey reg = <0x20>; 167*b7416c69STim Harvey interrupt-parent = <&gpio4>; 168*b7416c69STim Harvey interrupts = <4 IRQ_TYPE_EDGE_FALLING>; 169*b7416c69STim Harvey interrupt-controller; 170*b7416c69STim Harvey #interrupt-cells = <2>; 171*b7416c69STim Harvey gpio-controller; 172*b7416c69STim Harvey #gpio-cells = <2>; 173*b7416c69STim Harvey }; 174*b7416c69STim Harvey 175*b7416c69STim Harvey eeprom@54 { 176*b7416c69STim Harvey compatible = "atmel,24c02"; 177*b7416c69STim Harvey reg = <0x54>; 178*b7416c69STim Harvey pagesize = <16>; 179*b7416c69STim Harvey }; 180*b7416c69STim Harvey 181*b7416c69STim Harvey eeprom@55 { 182*b7416c69STim Harvey compatible = "atmel,24c02"; 183*b7416c69STim Harvey reg = <0x55>; 184*b7416c69STim Harvey pagesize = <16>; 185*b7416c69STim Harvey }; 186*b7416c69STim Harvey }; 187*b7416c69STim Harvey 188*b7416c69STim Harvey /* J29 */ 189*b7416c69STim Harvey fsa0: i2c@1 { 190*b7416c69STim Harvey reg = <1>; 191*b7416c69STim Harvey pinctrl-names = "default"; 192*b7416c69STim Harvey pinctrl-0 = <&pinctrl_fsa1i2c>; 193*b7416c69STim Harvey #address-cells = <1>; 194*b7416c69STim Harvey #size-cells = <0>; 195*b7416c69STim Harvey 196*b7416c69STim Harvey gpio@20 { 197*b7416c69STim Harvey compatible = "nxp,pca9555"; 198*b7416c69STim Harvey reg = <0x20>; 199*b7416c69STim Harvey interrupt-parent = <&gpio4>; 200*b7416c69STim Harvey interrupts = <14 IRQ_TYPE_EDGE_FALLING>; 201*b7416c69STim Harvey interrupt-controller; 202*b7416c69STim Harvey #interrupt-cells = <2>; 203*b7416c69STim Harvey gpio-controller; 204*b7416c69STim Harvey #gpio-cells = <2>; 205*b7416c69STim Harvey }; 206*b7416c69STim Harvey 207*b7416c69STim Harvey eeprom@54 { 208*b7416c69STim Harvey compatible = "atmel,24c02"; 209*b7416c69STim Harvey reg = <0x54>; 210*b7416c69STim Harvey pagesize = <16>; 211*b7416c69STim Harvey }; 212*b7416c69STim Harvey 213*b7416c69STim Harvey eeprom@55 { 214*b7416c69STim Harvey compatible = "atmel,24c02"; 215*b7416c69STim Harvey reg = <0x55>; 216*b7416c69STim Harvey pagesize = <16>; 217*b7416c69STim Harvey }; 218*b7416c69STim Harvey }; 219*b7416c69STim Harvey 220*b7416c69STim Harvey /* J33 */ 221*b7416c69STim Harvey i2c@2 { 222*b7416c69STim Harvey reg = <2>; 223*b7416c69STim Harvey #address-cells = <1>; 224*b7416c69STim Harvey #size-cells = <0>; 225*b7416c69STim Harvey }; 226*b7416c69STim Harvey }; 227*b7416c69STim Harvey}; 228*b7416c69STim Harvey 229*b7416c69STim Harvey&pcie_phy { 230*b7416c69STim Harvey clocks = <&pcie0_refclk>; 231*b7416c69STim Harvey clock-names = "ref"; 232*b7416c69STim Harvey fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; 233*b7416c69STim Harvey fsl,clkreq-unsupported; 234*b7416c69STim Harvey status = "okay"; 235*b7416c69STim Harvey}; 236*b7416c69STim Harvey 237*b7416c69STim Harvey&pcie { 238*b7416c69STim Harvey pinctrl-names = "default"; 239*b7416c69STim Harvey pinctrl-0 = <&pinctrl_pcie0>; 240*b7416c69STim Harvey reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; 241*b7416c69STim Harvey status = "okay"; 242*b7416c69STim Harvey 243*b7416c69STim Harvey pcie@0,0 { 244*b7416c69STim Harvey reg = <0x0000 0 0 0 0>; 245*b7416c69STim Harvey device_type = "pci"; 246*b7416c69STim Harvey #address-cells = <3>; 247*b7416c69STim Harvey #size-cells = <2>; 248*b7416c69STim Harvey ranges; 249*b7416c69STim Harvey 250*b7416c69STim Harvey pcie@0,0 { 251*b7416c69STim Harvey reg = <0x0000 0 0 0 0>; 252*b7416c69STim Harvey device_type = "pci"; 253*b7416c69STim Harvey #address-cells = <3>; 254*b7416c69STim Harvey #size-cells = <2>; 255*b7416c69STim Harvey ranges; 256*b7416c69STim Harvey 257*b7416c69STim Harvey pcie@7,0 { 258*b7416c69STim Harvey reg = <0x3800 0 0 0 0>; 259*b7416c69STim Harvey device_type = "pci"; 260*b7416c69STim Harvey #address-cells = <3>; 261*b7416c69STim Harvey #size-cells = <2>; 262*b7416c69STim Harvey ranges; 263*b7416c69STim Harvey 264*b7416c69STim Harvey eth1: ethernet@0,0 { 265*b7416c69STim Harvey reg = <0x0000 0 0 0 0>; 266*b7416c69STim Harvey #address-cells = <3>; 267*b7416c69STim Harvey #size-cells = <2>; 268*b7416c69STim Harvey ranges; 269*b7416c69STim Harvey local-mac-address = [00 00 00 00 00 00]; 270*b7416c69STim Harvey }; 271*b7416c69STim Harvey }; 272*b7416c69STim Harvey }; 273*b7416c69STim Harvey }; 274*b7416c69STim Harvey}; 275*b7416c69STim Harvey 276*b7416c69STim Harvey/* GPS */ 277*b7416c69STim Harvey&uart1 { 278*b7416c69STim Harvey pinctrl-names = "default"; 279*b7416c69STim Harvey pinctrl-0 = <&pinctrl_uart1>; 280*b7416c69STim Harvey status = "okay"; 281*b7416c69STim Harvey}; 282*b7416c69STim Harvey 283*b7416c69STim Harvey/* RS232 */ 284*b7416c69STim Harvey&uart4 { 285*b7416c69STim Harvey pinctrl-names = "default"; 286*b7416c69STim Harvey pinctrl-0 = <&pinctrl_uart4>; 287*b7416c69STim Harvey status = "okay"; 288*b7416c69STim Harvey}; 289*b7416c69STim Harvey 290*b7416c69STim Harvey/* USB1 - FSA1 */ 291*b7416c69STim Harvey&usb3_0 { 292*b7416c69STim Harvey fsl,permanently-attached; 293*b7416c69STim Harvey fsl,disable-port-power-control; 294*b7416c69STim Harvey status = "okay"; 295*b7416c69STim Harvey}; 296*b7416c69STim Harvey 297*b7416c69STim Harvey&usb3_phy0 { 298*b7416c69STim Harvey status = "okay"; 299*b7416c69STim Harvey}; 300*b7416c69STim Harvey 301*b7416c69STim Harvey&usb_dwc3_0 { 302*b7416c69STim Harvey dr_mode = "host"; 303*b7416c69STim Harvey status = "okay"; 304*b7416c69STim Harvey}; 305*b7416c69STim Harvey 306*b7416c69STim Harvey/* USB2 - USB3.0 Hub */ 307*b7416c69STim Harvey&usb3_1 { 308*b7416c69STim Harvey fsl,permanently-attached; 309*b7416c69STim Harvey fsl,disable-port-power-control; 310*b7416c69STim Harvey status = "okay"; 311*b7416c69STim Harvey}; 312*b7416c69STim Harvey 313*b7416c69STim Harvey&usb3_phy1 { 314*b7416c69STim Harvey vbus-supply = <®_usb2_vbus>; 315*b7416c69STim Harvey status = "okay"; 316*b7416c69STim Harvey}; 317*b7416c69STim Harvey 318*b7416c69STim Harvey&usb_dwc3_1 { 319*b7416c69STim Harvey dr_mode = "host"; 320*b7416c69STim Harvey status = "okay"; 321*b7416c69STim Harvey}; 322*b7416c69STim Harvey 323*b7416c69STim Harvey/* SDIO 1.8V */ 324*b7416c69STim Harvey&usdhc1 { 325*b7416c69STim Harvey pinctrl-names = "default", "state_100mhz", "state_200mhz"; 326*b7416c69STim Harvey pinctrl-0 = <&pinctrl_usdhc1>; 327*b7416c69STim Harvey pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 328*b7416c69STim Harvey pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 329*b7416c69STim Harvey bus-width = <4>; 330*b7416c69STim Harvey non-removable; 331*b7416c69STim Harvey status = "okay"; 332*b7416c69STim Harvey}; 333*b7416c69STim Harvey 334*b7416c69STim Harvey/* microSD */ 335*b7416c69STim Harvey&usdhc2 { 336*b7416c69STim Harvey pinctrl-names = "default", "state_100mhz", "state_200mhz"; 337*b7416c69STim Harvey pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 338*b7416c69STim Harvey pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; 339*b7416c69STim Harvey pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; 340*b7416c69STim Harvey cd-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; /* CD is active high */ 341*b7416c69STim Harvey bus-width = <4>; 342*b7416c69STim Harvey vmmc-supply = <®_usdhc2_vmmc>; 343*b7416c69STim Harvey status = "okay"; 344*b7416c69STim Harvey}; 345*b7416c69STim Harvey 346*b7416c69STim Harvey&iomuxc { 347*b7416c69STim Harvey pinctrl-names = "default"; 348*b7416c69STim Harvey pinctrl-0 = <&pinctrl_hog>; 349*b7416c69STim Harvey 350*b7416c69STim Harvey pinctrl_hog: hoggrp { 351*b7416c69STim Harvey fsl,pins = < 352*b7416c69STim Harvey MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */ 353*b7416c69STim Harvey MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */ 354*b7416c69STim Harvey MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x40000106 /* RS485_HALF */ 355*b7416c69STim Harvey MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x40000106 /* RS485_EN */ 356*b7416c69STim Harvey MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23 0x40000106 /* RS485_TERM */ 357*b7416c69STim Harvey >; 358*b7416c69STim Harvey }; 359*b7416c69STim Harvey 360*b7416c69STim Harvey pinctrl_accel: accelgrp { 361*b7416c69STim Harvey fsl,pins = < 362*b7416c69STim Harvey MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ# */ 363*b7416c69STim Harvey >; 364*b7416c69STim Harvey }; 365*b7416c69STim Harvey 366*b7416c69STim Harvey pinctrl_can1: can1grp { 367*b7416c69STim Harvey fsl,pins = < 368*b7416c69STim Harvey MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154 369*b7416c69STim Harvey MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154 370*b7416c69STim Harvey >; 371*b7416c69STim Harvey }; 372*b7416c69STim Harvey 373*b7416c69STim Harvey pinctrl_can2: can2grp { 374*b7416c69STim Harvey fsl,pins = < 375*b7416c69STim Harvey MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX 0x154 376*b7416c69STim Harvey MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX 0x154 377*b7416c69STim Harvey >; 378*b7416c69STim Harvey }; 379*b7416c69STim Harvey 380*b7416c69STim Harvey pinctrl_gpio_leds: gpioledgrp { 381*b7416c69STim Harvey fsl,pins = < 382*b7416c69STim Harvey MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */ 383*b7416c69STim Harvey MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */ 384*b7416c69STim Harvey >; 385*b7416c69STim Harvey }; 386*b7416c69STim Harvey 387*b7416c69STim Harvey pinctrl_fsa1i2c: fsa1i2cgrp { 388*b7416c69STim Harvey fsl,pins = < 389*b7416c69STim Harvey MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x1d0 /* FSA1_ALERT# */ 390*b7416c69STim Harvey MX8MP_IOMUXC_SAI2_TXC__GPIO4_IO25 0x400001d0 /* FSA1_GPIO1 */ 391*b7416c69STim Harvey MX8MP_IOMUXC_SAI1_RXD7__GPIO4_IO09 0x400001d0 /* FSA1_GPIO2 */ 392*b7416c69STim Harvey >; 393*b7416c69STim Harvey }; 394*b7416c69STim Harvey 395*b7416c69STim Harvey pinctrl_fsa2i2c: fsa2i2cgrp { 396*b7416c69STim Harvey fsl,pins = < 397*b7416c69STim Harvey MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04 0x1d0 /* FSA2_ALERT# */ 398*b7416c69STim Harvey MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x400001d0 /* FSA2_GPIO1 */ 399*b7416c69STim Harvey MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x400001d0 /* FSA2_GPIO2 */ 400*b7416c69STim Harvey >; 401*b7416c69STim Harvey }; 402*b7416c69STim Harvey 403*b7416c69STim Harvey pinctrl_mag: maggrp { 404*b7416c69STim Harvey fsl,pins = < 405*b7416c69STim Harvey MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x140 /* IRQ# */ 406*b7416c69STim Harvey >; 407*b7416c69STim Harvey }; 408*b7416c69STim Harvey 409*b7416c69STim Harvey pinctrl_pcie0: pcie0grp { 410*b7416c69STim Harvey fsl,pins = < 411*b7416c69STim Harvey MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106 /* PERST# */ 412*b7416c69STim Harvey >; 413*b7416c69STim Harvey }; 414*b7416c69STim Harvey 415*b7416c69STim Harvey pinctrl_pps: ppsgrp { 416*b7416c69STim Harvey fsl,pins = < 417*b7416c69STim Harvey MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146 418*b7416c69STim Harvey >; 419*b7416c69STim Harvey }; 420*b7416c69STim Harvey 421*b7416c69STim Harvey pinctrl_reg_usb2_en: regusb2grp { 422*b7416c69STim Harvey fsl,pins = < 423*b7416c69STim Harvey MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x146 /* USBHUB_RST# */ 424*b7416c69STim Harvey >; 425*b7416c69STim Harvey }; 426*b7416c69STim Harvey 427*b7416c69STim Harvey pinctrl_spi2: spi2grp { 428*b7416c69STim Harvey fsl,pins = < 429*b7416c69STim Harvey MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0xd0 430*b7416c69STim Harvey MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0xd0 431*b7416c69STim Harvey MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0xd0 432*b7416c69STim Harvey MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140 /* J32_CS */ 433*b7416c69STim Harvey MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x140 /* TPM_CS */ 434*b7416c69STim Harvey MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x140 /* FSA1_CS */ 435*b7416c69STim Harvey MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x140 /* FSA2_CS */ 436*b7416c69STim Harvey >; 437*b7416c69STim Harvey }; 438*b7416c69STim Harvey 439*b7416c69STim Harvey pinctrl_uart1: uart1grp { 440*b7416c69STim Harvey fsl,pins = < 441*b7416c69STim Harvey MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140 442*b7416c69STim Harvey MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140 443*b7416c69STim Harvey >; 444*b7416c69STim Harvey }; 445*b7416c69STim Harvey 446*b7416c69STim Harvey pinctrl_uart4: uart4grp { 447*b7416c69STim Harvey fsl,pins = < 448*b7416c69STim Harvey MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140 449*b7416c69STim Harvey MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140 450*b7416c69STim Harvey >; 451*b7416c69STim Harvey }; 452*b7416c69STim Harvey 453*b7416c69STim Harvey pinctrl_usdhc1: usdhc1grp { 454*b7416c69STim Harvey fsl,pins = < 455*b7416c69STim Harvey MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190 456*b7416c69STim Harvey MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0 457*b7416c69STim Harvey MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0 458*b7416c69STim Harvey MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0 459*b7416c69STim Harvey MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0 460*b7416c69STim Harvey MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0 461*b7416c69STim Harvey >; 462*b7416c69STim Harvey }; 463*b7416c69STim Harvey 464*b7416c69STim Harvey pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 465*b7416c69STim Harvey fsl,pins = < 466*b7416c69STim Harvey MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x194 467*b7416c69STim Harvey MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d4 468*b7416c69STim Harvey MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d4 469*b7416c69STim Harvey MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d4 470*b7416c69STim Harvey MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d4 471*b7416c69STim Harvey MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d4 472*b7416c69STim Harvey >; 473*b7416c69STim Harvey }; 474*b7416c69STim Harvey 475*b7416c69STim Harvey pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 476*b7416c69STim Harvey fsl,pins = < 477*b7416c69STim Harvey MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x196 478*b7416c69STim Harvey MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d6 479*b7416c69STim Harvey MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d6 480*b7416c69STim Harvey MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d6 481*b7416c69STim Harvey MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d6 482*b7416c69STim Harvey MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d6 483*b7416c69STim Harvey >; 484*b7416c69STim Harvey }; 485*b7416c69STim Harvey 486*b7416c69STim Harvey pinctrl_usdhc2: usdhc2grp { 487*b7416c69STim Harvey fsl,pins = < 488*b7416c69STim Harvey MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 489*b7416c69STim Harvey MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 490*b7416c69STim Harvey MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 491*b7416c69STim Harvey MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 492*b7416c69STim Harvey MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 493*b7416c69STim Harvey MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 494*b7416c69STim Harvey MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 495*b7416c69STim Harvey >; 496*b7416c69STim Harvey }; 497*b7416c69STim Harvey 498*b7416c69STim Harvey pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 499*b7416c69STim Harvey fsl,pins = < 500*b7416c69STim Harvey MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 501*b7416c69STim Harvey MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 502*b7416c69STim Harvey MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 503*b7416c69STim Harvey MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 504*b7416c69STim Harvey MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 505*b7416c69STim Harvey MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 506*b7416c69STim Harvey MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 507*b7416c69STim Harvey >; 508*b7416c69STim Harvey }; 509*b7416c69STim Harvey 510*b7416c69STim Harvey pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 511*b7416c69STim Harvey fsl,pins = < 512*b7416c69STim Harvey MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 513*b7416c69STim Harvey MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 514*b7416c69STim Harvey MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 515*b7416c69STim Harvey MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 516*b7416c69STim Harvey MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 517*b7416c69STim Harvey MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 518*b7416c69STim Harvey MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 519*b7416c69STim Harvey >; 520*b7416c69STim Harvey }; 521*b7416c69STim Harvey 522*b7416c69STim Harvey pinctrl_usdhc2_vmmc: usdhc2-vmmc-grp { 523*b7416c69STim Harvey fsl,pins = < 524*b7416c69STim Harvey MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x1d0 525*b7416c69STim Harvey >; 526*b7416c69STim Harvey }; 527*b7416c69STim Harvey 528*b7416c69STim Harvey pinctrl_usdhc2_gpio: usdhc2gpiogrp { 529*b7416c69STim Harvey fsl,pins = < 530*b7416c69STim Harvey MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 531*b7416c69STim Harvey >; 532*b7416c69STim Harvey }; 533*b7416c69STim Harvey}; 534