1f703b602SMartyn Welch// SPDX-License-Identifier: GPL-2.0 2f703b602SMartyn Welch/* 3f703b602SMartyn Welch * Copyright (C) 2022 Avnet Embedded GmbH 4f703b602SMartyn Welch */ 5f703b602SMartyn Welch 6f703b602SMartyn Welch/dts-v1/; 7f703b602SMartyn Welch 8f703b602SMartyn Welch#include "imx8mp-msc-sm2s-14N0600E.dtsi" 9f703b602SMartyn Welch#include <dt-bindings/clock/imx8mp-clock.h> 10f703b602SMartyn Welch#include <dt-bindings/gpio/gpio.h> 11f703b602SMartyn Welch 12f703b602SMartyn Welch/ { 13f703b602SMartyn Welch model = "MSC SM2-MB-EP1 Carrier Board with SM2S-IMX8PLUS-QC6-14N0600E SoM"; 14f703b602SMartyn Welch compatible = "avnet,sm2s-imx8mp-14N0600E-ep1", 15f703b602SMartyn Welch "avnet,sm2s-imx8mp-14N0600E", "avnet,sm2s-imx8mp", 16f703b602SMartyn Welch "fsl,imx8mp"; 17*d874b9f7SLuca Ceresoli 18*d874b9f7SLuca Ceresoli reg_vcc_3v3_audio: 3v3-audio-regulator { 19*d874b9f7SLuca Ceresoli compatible = "regulator-fixed"; 20*d874b9f7SLuca Ceresoli regulator-name = "VCC_3V3_AUD"; 21*d874b9f7SLuca Ceresoli regulator-min-microvolt = <3300000>; 22*d874b9f7SLuca Ceresoli regulator-max-microvolt = <3300000>; 23*d874b9f7SLuca Ceresoli }; 24*d874b9f7SLuca Ceresoli 25*d874b9f7SLuca Ceresoli reg_vcc_1v8_audio: 1v8-audio-regulator { 26*d874b9f7SLuca Ceresoli compatible = "regulator-fixed"; 27*d874b9f7SLuca Ceresoli regulator-name = "VCC_1V8_AUD"; 28*d874b9f7SLuca Ceresoli regulator-min-microvolt = <1800000>; 29*d874b9f7SLuca Ceresoli regulator-max-microvolt = <1800000>; 30*d874b9f7SLuca Ceresoli }; 31*d874b9f7SLuca Ceresoli 32*d874b9f7SLuca Ceresoli sound { 33*d874b9f7SLuca Ceresoli compatible = "simple-audio-card"; 34*d874b9f7SLuca Ceresoli simple-audio-card,name = "sgtl5000-audio"; 35*d874b9f7SLuca Ceresoli simple-audio-card,format = "i2s"; 36*d874b9f7SLuca Ceresoli simple-audio-card,frame-master = <&codec_dai>; 37*d874b9f7SLuca Ceresoli simple-audio-card,bitclock-master = <&codec_dai>; 38*d874b9f7SLuca Ceresoli 39*d874b9f7SLuca Ceresoli simple-audio-card,cpu { 40*d874b9f7SLuca Ceresoli sound-dai = <&sai2>; 41*d874b9f7SLuca Ceresoli }; 42*d874b9f7SLuca Ceresoli 43*d874b9f7SLuca Ceresoli codec_dai: simple-audio-card,codec { 44*d874b9f7SLuca Ceresoli sound-dai = <&sgtl5000>; 45*d874b9f7SLuca Ceresoli }; 46*d874b9f7SLuca Ceresoli }; 47*d874b9f7SLuca Ceresoli}; 48*d874b9f7SLuca Ceresoli 49*d874b9f7SLuca Ceresoli&i2c1 { 50*d874b9f7SLuca Ceresoli sgtl5000: audio-codec@a { 51*d874b9f7SLuca Ceresoli compatible = "fsl,sgtl5000"; 52*d874b9f7SLuca Ceresoli reg = <0x0a>; 53*d874b9f7SLuca Ceresoli 54*d874b9f7SLuca Ceresoli assigned-clocks = <&clk IMX8MP_CLK_CLKOUT1_SEL>; 55*d874b9f7SLuca Ceresoli assigned-clock-parents = <&clk IMX8MP_CLK_24M>; 56*d874b9f7SLuca Ceresoli assigned-clock-rates = <24000000>; 57*d874b9f7SLuca Ceresoli clocks = <&clk IMX8MP_CLK_CLKOUT1>; 58*d874b9f7SLuca Ceresoli clock-names = "mclk"; 59*d874b9f7SLuca Ceresoli #sound-dai-cells = <0>; 60*d874b9f7SLuca Ceresoli 61*d874b9f7SLuca Ceresoli VDDA-supply = <®_vcc_3v3_audio>; 62*d874b9f7SLuca Ceresoli VDDD-supply = <®_vcc_1v8_audio>; 63*d874b9f7SLuca Ceresoli VDDIO-supply = <®_vcc_1v8_audio>; 64*d874b9f7SLuca Ceresoli }; 65*d874b9f7SLuca Ceresoli}; 66*d874b9f7SLuca Ceresoli 67*d874b9f7SLuca Ceresoli/* I2S-0 = sai2 */ 68*d874b9f7SLuca Ceresoli&sai2 { 69*d874b9f7SLuca Ceresoli pinctrl-names = "default"; 70*d874b9f7SLuca Ceresoli pinctrl-0 = <&pinctrl_sai2>; 71*d874b9f7SLuca Ceresoli 72*d874b9f7SLuca Ceresoli assigned-clocks = <&clk IMX8MP_CLK_SAI2>; 73*d874b9f7SLuca Ceresoli assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; 74*d874b9f7SLuca Ceresoli assigned-clock-rates = <12288000>; 75*d874b9f7SLuca Ceresoli 76*d874b9f7SLuca Ceresoli fsl,sai-mclk-direction-output; 77*d874b9f7SLuca Ceresoli status = "okay"; 78f703b602SMartyn Welch}; 79f703b602SMartyn Welch 80f703b602SMartyn Welch&flexcan1 { 81f703b602SMartyn Welch status = "okay"; 82f703b602SMartyn Welch}; 83f703b602SMartyn Welch 84f703b602SMartyn Welch&flexcan2 { 85f703b602SMartyn Welch status = "okay"; 86f703b602SMartyn Welch}; 87f703b602SMartyn Welch 88f703b602SMartyn Welch&usdhc2 { 89f703b602SMartyn Welch no-1-8-v; 90f703b602SMartyn Welch}; 91f703b602SMartyn Welch 92f703b602SMartyn Welch&iomuxc { 93f703b602SMartyn Welch pinctrl-names = "default"; 94f703b602SMartyn Welch pinctrl-0 = <&pinctrl_smarc_gpio>; 95f703b602SMartyn Welch 96*d874b9f7SLuca Ceresoli pinctrl_sai2: sai2grp { 97*d874b9f7SLuca Ceresoli fsl,pins = < 98*d874b9f7SLuca Ceresoli MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC 0xd6 99*d874b9f7SLuca Ceresoli MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK 0xd6 100*d874b9f7SLuca Ceresoli MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00 0xd6 101*d874b9f7SLuca Ceresoli MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6 102*d874b9f7SLuca Ceresoli >; 103*d874b9f7SLuca Ceresoli }; 104*d874b9f7SLuca Ceresoli 105f703b602SMartyn Welch pinctrl_smarc_gpio: smarcgpiosgrp { 106f703b602SMartyn Welch fsl,pins = 107f703b602SMartyn Welch <MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11 0x19>, /* GPIO0 */ 108f703b602SMartyn Welch <MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x19>, /* GPIO1 */ 109f703b602SMartyn Welch <MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x19>, /* GPIO2 */ 110f703b602SMartyn Welch <MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x19>, /* GPIO3 */ 111f703b602SMartyn Welch <MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x19>, /* GPIO4 */ 112f703b602SMartyn Welch <MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02 0x19>, /* GPIO5 */ 113f703b602SMartyn Welch <MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x19>, /* GPIO6 */ 114f703b602SMartyn Welch <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x19>, /* GPIO7 */ 115f703b602SMartyn Welch <MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20 0x19>, /* GPIO8 */ 116f703b602SMartyn Welch <MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x19>, /* GPIO9 */ 117f703b602SMartyn Welch <MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x19>, /* GPIO10 */ 118f703b602SMartyn Welch <MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x19>, /* GPIO11 */ 119f703b602SMartyn Welch <MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x19>, /* GPIO12 */ 120f703b602SMartyn Welch <MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19>; /* GPIO13 */ 121f703b602SMartyn Welch }; 122f703b602SMartyn Welch}; 123