1*95727d05SYannic Moog// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 2*95727d05SYannic Moog/* 3*95727d05SYannic Moog * Copyright (C) 2025 PHYTEC Messtechnik GmbH 4*95727d05SYannic Moog */ 5*95727d05SYannic Moog 6*95727d05SYannic Moog/dts-v1/; 7*95727d05SYannic Moog 8*95727d05SYannic Moog#include <dt-bindings/leds/leds-pca9532.h> 9*95727d05SYannic Moog#include <dt-bindings/phy/phy-imx8-pcie.h> 10*95727d05SYannic Moog#include <dt-bindings/pwm/pwm.h> 11*95727d05SYannic Moog#include "imx8mp-phycore-fpsc.dtsi" 12*95727d05SYannic Moog 13*95727d05SYannic Moog/ { 14*95727d05SYannic Moog compatible = "phytec,imx8mp-libra-rdk-fpsc", 15*95727d05SYannic Moog "phytec,imx8mp-phycore-fpsc", "fsl,imx8mp"; 16*95727d05SYannic Moog model = "PHYTEC i.MX8MP Libra RDK FPSC"; 17*95727d05SYannic Moog 18*95727d05SYannic Moog backlight_lvds0: backlight0 { 19*95727d05SYannic Moog compatible = "pwm-backlight"; 20*95727d05SYannic Moog pinctrl-0 = <&pinctrl_lvds0>; 21*95727d05SYannic Moog pinctrl-names = "default"; 22*95727d05SYannic Moog power-supply = <®_vdd_12v0>; 23*95727d05SYannic Moog status = "disabled"; 24*95727d05SYannic Moog }; 25*95727d05SYannic Moog 26*95727d05SYannic Moog chosen { 27*95727d05SYannic Moog stdout-path = &uart4; 28*95727d05SYannic Moog }; 29*95727d05SYannic Moog 30*95727d05SYannic Moog panel0_lvds: panel-lvds { 31*95727d05SYannic Moog /* compatible panel in overlay */ 32*95727d05SYannic Moog backlight = <&backlight_lvds0>; 33*95727d05SYannic Moog power-supply = <®_vdd_3v3>; 34*95727d05SYannic Moog status = "disabled"; 35*95727d05SYannic Moog 36*95727d05SYannic Moog port { 37*95727d05SYannic Moog panel0_in: endpoint { 38*95727d05SYannic Moog remote-endpoint = <&ldb_lvds_ch0>; 39*95727d05SYannic Moog }; 40*95727d05SYannic Moog }; 41*95727d05SYannic Moog }; 42*95727d05SYannic Moog 43*95727d05SYannic Moog reg_can1_stby: regulator-can1-stby { 44*95727d05SYannic Moog compatible = "regulator-fixed"; 45*95727d05SYannic Moog regulator-max-microvolt = <1800000>; 46*95727d05SYannic Moog regulator-min-microvolt = <1800000>; 47*95727d05SYannic Moog regulator-name = "can1-stby"; 48*95727d05SYannic Moog gpio = <&gpio_expander 10 GPIO_ACTIVE_LOW>; 49*95727d05SYannic Moog }; 50*95727d05SYannic Moog 51*95727d05SYannic Moog reg_can2_stby: regulator-can2-stby { 52*95727d05SYannic Moog compatible = "regulator-fixed"; 53*95727d05SYannic Moog regulator-max-microvolt = <1800000>; 54*95727d05SYannic Moog regulator-min-microvolt = <1800000>; 55*95727d05SYannic Moog regulator-name = "can2-stby"; 56*95727d05SYannic Moog gpio = <&gpio_expander 9 GPIO_ACTIVE_LOW>; 57*95727d05SYannic Moog }; 58*95727d05SYannic Moog 59*95727d05SYannic Moog reg_vdd_12v0: regulator-vdd-12v0 { 60*95727d05SYannic Moog compatible = "regulator-fixed"; 61*95727d05SYannic Moog regulator-always-on; 62*95727d05SYannic Moog regulator-boot-on; 63*95727d05SYannic Moog regulator-max-microvolt = <12000000>; 64*95727d05SYannic Moog regulator-min-microvolt = <12000000>; 65*95727d05SYannic Moog regulator-name = "VDD_12V0"; 66*95727d05SYannic Moog }; 67*95727d05SYannic Moog 68*95727d05SYannic Moog reg_vdd_1v8: regulator-vdd-1v8 { 69*95727d05SYannic Moog compatible = "regulator-fixed"; 70*95727d05SYannic Moog regulator-always-on; 71*95727d05SYannic Moog regulator-boot-on; 72*95727d05SYannic Moog regulator-max-microvolt = <1800000>; 73*95727d05SYannic Moog regulator-min-microvolt = <1800000>; 74*95727d05SYannic Moog regulator-name = "VDD_1V8"; 75*95727d05SYannic Moog }; 76*95727d05SYannic Moog 77*95727d05SYannic Moog reg_vdd_3v3: regulator-vdd-3v3 { 78*95727d05SYannic Moog compatible = "regulator-fixed"; 79*95727d05SYannic Moog regulator-always-on; 80*95727d05SYannic Moog regulator-boot-on; 81*95727d05SYannic Moog regulator-max-microvolt = <3300000>; 82*95727d05SYannic Moog regulator-min-microvolt = <3300000>; 83*95727d05SYannic Moog regulator-name = "VDD_3V3"; 84*95727d05SYannic Moog }; 85*95727d05SYannic Moog 86*95727d05SYannic Moog reg_vdd_5v0: regulator-vdd-5v0 { 87*95727d05SYannic Moog compatible = "regulator-fixed"; 88*95727d05SYannic Moog regulator-always-on; 89*95727d05SYannic Moog regulator-boot-on; 90*95727d05SYannic Moog regulator-max-microvolt = <5000000>; 91*95727d05SYannic Moog regulator-min-microvolt = <5000000>; 92*95727d05SYannic Moog regulator-name = "VDD_5V0"; 93*95727d05SYannic Moog }; 94*95727d05SYannic Moog}; 95*95727d05SYannic Moog 96*95727d05SYannic Moog&eqos { 97*95727d05SYannic Moog phy-handle = <ðphy1>; 98*95727d05SYannic Moog status = "okay"; 99*95727d05SYannic Moog 100*95727d05SYannic Moog mdio { 101*95727d05SYannic Moog compatible = "snps,dwmac-mdio"; 102*95727d05SYannic Moog #address-cells = <1>; 103*95727d05SYannic Moog #size-cells = <0>; 104*95727d05SYannic Moog 105*95727d05SYannic Moog ethphy1: ethernet-phy@1 { 106*95727d05SYannic Moog compatible = "ethernet-phy-ieee802.3-c22"; 107*95727d05SYannic Moog reg = <0x1>; 108*95727d05SYannic Moog enet-phy-lane-no-swap; 109*95727d05SYannic Moog ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; 110*95727d05SYannic Moog ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 111*95727d05SYannic Moog ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>; 112*95727d05SYannic Moog ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>; 113*95727d05SYannic Moog }; 114*95727d05SYannic Moog }; 115*95727d05SYannic Moog}; 116*95727d05SYannic Moog 117*95727d05SYannic Moog/* CAN FD */ 118*95727d05SYannic Moog&flexcan1 { 119*95727d05SYannic Moog xceiver-supply = <®_can1_stby>; 120*95727d05SYannic Moog status = "okay"; 121*95727d05SYannic Moog}; 122*95727d05SYannic Moog 123*95727d05SYannic Moog&flexcan2 { 124*95727d05SYannic Moog xceiver-supply = <®_can2_stby>; 125*95727d05SYannic Moog status = "okay"; 126*95727d05SYannic Moog}; 127*95727d05SYannic Moog 128*95727d05SYannic Moog&flexspi { 129*95727d05SYannic Moog status = "okay"; 130*95727d05SYannic Moog 131*95727d05SYannic Moog spi_nor: flash@0 { 132*95727d05SYannic Moog compatible = "jedec,spi-nor"; 133*95727d05SYannic Moog reg = <0>; 134*95727d05SYannic Moog spi-max-frequency = <80000000>; 135*95727d05SYannic Moog spi-rx-bus-width = <4>; 136*95727d05SYannic Moog spi-tx-bus-width = <1>; 137*95727d05SYannic Moog vcc-supply = <®_vdd_1v8>; 138*95727d05SYannic Moog }; 139*95727d05SYannic Moog}; 140*95727d05SYannic Moog 141*95727d05SYannic Moog&gpio5 { 142*95727d05SYannic Moog gpio-line-names = "", "", "", "", "I2C5_SDA", 143*95727d05SYannic Moog "GPIO1", "", "", "", "SPI1_CS", 144*95727d05SYannic Moog "", "", "", "SPI2_CS", "I2C1_SCL", 145*95727d05SYannic Moog "I2C1_SDA", "I2C2_SCL", "I2C2_SDA", "I2C3_SCL", "I2C3_SDA", 146*95727d05SYannic Moog "", "GPIO2", "", "LVDS1_BL_EN", "SPI3_CS", 147*95727d05SYannic Moog "", "GPIO3"; 148*95727d05SYannic Moog}; 149*95727d05SYannic Moog 150*95727d05SYannic Moog&i2c2 { 151*95727d05SYannic Moog clock-frequency = <400000>; 152*95727d05SYannic Moog status = "okay"; 153*95727d05SYannic Moog 154*95727d05SYannic Moog eeprom@51 { 155*95727d05SYannic Moog compatible = "atmel,24c02"; 156*95727d05SYannic Moog reg = <0x51>; 157*95727d05SYannic Moog pagesize = <16>; 158*95727d05SYannic Moog vcc-supply = <®_vdd_1v8>; 159*95727d05SYannic Moog }; 160*95727d05SYannic Moog}; 161*95727d05SYannic Moog 162*95727d05SYannic Moog&i2c3 { 163*95727d05SYannic Moog clock-frequency = <400000>; 164*95727d05SYannic Moog status = "okay"; 165*95727d05SYannic Moog 166*95727d05SYannic Moog leds@62 { 167*95727d05SYannic Moog compatible = "nxp,pca9533"; 168*95727d05SYannic Moog reg = <0x62>; 169*95727d05SYannic Moog 170*95727d05SYannic Moog led-1 { 171*95727d05SYannic Moog type = <PCA9532_TYPE_LED>; 172*95727d05SYannic Moog }; 173*95727d05SYannic Moog 174*95727d05SYannic Moog led-2 { 175*95727d05SYannic Moog type = <PCA9532_TYPE_LED>; 176*95727d05SYannic Moog }; 177*95727d05SYannic Moog 178*95727d05SYannic Moog led-3 { 179*95727d05SYannic Moog type = <PCA9532_TYPE_LED>; 180*95727d05SYannic Moog }; 181*95727d05SYannic Moog }; 182*95727d05SYannic Moog}; 183*95727d05SYannic Moog 184*95727d05SYannic Moog&i2c5 { 185*95727d05SYannic Moog #address-cells = <1>; 186*95727d05SYannic Moog #size-cells = <0>; 187*95727d05SYannic Moog clock-frequency = <400000>; 188*95727d05SYannic Moog status = "okay"; 189*95727d05SYannic Moog 190*95727d05SYannic Moog gpio_expander: gpio@20 { 191*95727d05SYannic Moog compatible = "ti,tca6416"; 192*95727d05SYannic Moog reg = <0x20>; 193*95727d05SYannic Moog interrupt-parent = <&gpio4>; 194*95727d05SYannic Moog interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 195*95727d05SYannic Moog #gpio-cells = <2>; 196*95727d05SYannic Moog gpio-controller; 197*95727d05SYannic Moog gpio-line-names = "CSI1_CTRL1", "CSI1_CTRL2", "CSI1_CTRL3", 198*95727d05SYannic Moog "CSI1_CTRL4", "CSI2_CTRL1", "CSI2_CTRL2", 199*95727d05SYannic Moog "CSI2_CTRL3", "CSI2_CTRL4", "CLK_EN_AV", 200*95727d05SYannic Moog "nCAN2_EN", "nCAN1_EN", "PCIE1_nWAKE", 201*95727d05SYannic Moog "PCIE2_nWAKE", "PCIE2_nALERT_3V3", 202*95727d05SYannic Moog "UART1_BT_RS_SEL", "UART1_RS232_485_SEL"; 203*95727d05SYannic Moog vcc-supply = <®_vdd_1v8>; 204*95727d05SYannic Moog 205*95727d05SYannic Moog uart1_bt_rs_sel: bt-rs-hog { 206*95727d05SYannic Moog gpios = <14 GPIO_ACTIVE_HIGH>; 207*95727d05SYannic Moog gpio-hog; 208*95727d05SYannic Moog line-name = "UART1_BT_RS_SEL"; 209*95727d05SYannic Moog output-low; /* default RS232/RS485 */ 210*95727d05SYannic Moog }; 211*95727d05SYannic Moog 212*95727d05SYannic Moog uart1_rs232_485_sel: rs232-485-hog { 213*95727d05SYannic Moog gpios = <15 GPIO_ACTIVE_HIGH>; 214*95727d05SYannic Moog gpio-hog; 215*95727d05SYannic Moog line-name = "UART1_RS232_485_SEL"; 216*95727d05SYannic Moog output-high; /* default RS232 */ 217*95727d05SYannic Moog }; 218*95727d05SYannic Moog }; 219*95727d05SYannic Moog}; 220*95727d05SYannic Moog 221*95727d05SYannic Moog&iomuxc { 222*95727d05SYannic Moog pinctrl_lvds0: lvds0grp { 223*95727d05SYannic Moog fsl,pins = < 224*95727d05SYannic Moog MX8MP_IOMUXC_UART1_TXD__GPIO5_IO23 0x12 225*95727d05SYannic Moog >; 226*95727d05SYannic Moog }; 227*95727d05SYannic Moog pinctrl_rtc: rtcgrp { 228*95727d05SYannic Moog fsl,pins = < 229*95727d05SYannic Moog MX8MP_IOMUXC_UART2_TXD__GPIO5_IO25 0x1C0 230*95727d05SYannic Moog >; 231*95727d05SYannic Moog }; 232*95727d05SYannic Moog}; 233*95727d05SYannic Moog 234*95727d05SYannic Moog&lvds_bridge { 235*95727d05SYannic Moog ports { 236*95727d05SYannic Moog port@1 { 237*95727d05SYannic Moog ldb_lvds_ch0: endpoint { 238*95727d05SYannic Moog remote-endpoint = <&panel0_in>; 239*95727d05SYannic Moog }; 240*95727d05SYannic Moog }; 241*95727d05SYannic Moog }; 242*95727d05SYannic Moog}; 243*95727d05SYannic Moog 244*95727d05SYannic Moog/* Mini PCIe */ 245*95727d05SYannic Moog&pcie { 246*95727d05SYannic Moog reset-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>; 247*95727d05SYannic Moog vpcie-supply = <®_vdd_3v3>; 248*95727d05SYannic Moog status = "okay"; 249*95727d05SYannic Moog}; 250*95727d05SYannic Moog 251*95727d05SYannic Moog&pcie_phy { 252*95727d05SYannic Moog clocks = <&hsio_blk_ctrl>; 253*95727d05SYannic Moog clock-names = "ref"; 254*95727d05SYannic Moog fsl,clkreq-unsupported; 255*95727d05SYannic Moog fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>; 256*95727d05SYannic Moog status = "okay"; 257*95727d05SYannic Moog}; 258*95727d05SYannic Moog 259*95727d05SYannic Moog®_vdd_io { 260*95727d05SYannic Moog regulator-max-microvolt = <1800000>; 261*95727d05SYannic Moog regulator-min-microvolt = <1800000>; 262*95727d05SYannic Moog}; 263*95727d05SYannic Moog 264*95727d05SYannic Moog&rv3028 { 265*95727d05SYannic Moog interrupt-parent = <&gpio5>; 266*95727d05SYannic Moog interrupts = <25 IRQ_TYPE_LEVEL_LOW>; 267*95727d05SYannic Moog aux-voltage-chargeable = <1>; 268*95727d05SYannic Moog pinctrl-0 = <&pinctrl_rtc>; 269*95727d05SYannic Moog pinctrl-names = "default"; 270*95727d05SYannic Moog trickle-resistor-ohms = <3000>; 271*95727d05SYannic Moog wakeup-source; 272*95727d05SYannic Moog}; 273*95727d05SYannic Moog 274*95727d05SYannic Moog&snvs_pwrkey { 275*95727d05SYannic Moog status = "okay"; 276*95727d05SYannic Moog}; 277*95727d05SYannic Moog 278*95727d05SYannic Moog/* debug console */ 279*95727d05SYannic Moog&uart4 { 280*95727d05SYannic Moog status = "okay"; 281*95727d05SYannic Moog}; 282*95727d05SYannic Moog 283*95727d05SYannic Moog/* SD-Card */ 284*95727d05SYannic Moog&usdhc2 { 285*95727d05SYannic Moog assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; 286*95727d05SYannic Moog assigned-clock-rates = <200000000>; 287*95727d05SYannic Moog bus-width = <4>; 288*95727d05SYannic Moog disable-wp; 289*95727d05SYannic Moog status = "okay"; 290*95727d05SYannic Moog}; 291