1*95e882c0SRichard Hu// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*95e882c0SRichard Hu/* 3*95e882c0SRichard Hu * Copyright 2024 TechNexion Ltd. 4*95e882c0SRichard Hu * 5*95e882c0SRichard Hu * Author: Ray Chang <ray.chang@technexion.com> 6*95e882c0SRichard Hu */ 7*95e882c0SRichard Hu 8*95e882c0SRichard Hu/dts-v1/; 9*95e882c0SRichard Hu 10*95e882c0SRichard Hu#include <dt-bindings/phy/phy-imx8-pcie.h> 11*95e882c0SRichard Hu#include "imx8mp-edm-g.dtsi" 12*95e882c0SRichard Hu 13*95e882c0SRichard Hu/ { 14*95e882c0SRichard Hu compatible = "technexion,edm-g-imx8mp-wb", "technexion,edm-g-imx8mp", "fsl,imx8mp"; 15*95e882c0SRichard Hu model = "TechNexion EDM-G-IMX8MP SOM on WB-EDM-G"; 16*95e882c0SRichard Hu 17*95e882c0SRichard Hu connector { 18*95e882c0SRichard Hu compatible = "usb-c-connector"; 19*95e882c0SRichard Hu data-role = "dual"; 20*95e882c0SRichard Hu label = "USB-C"; 21*95e882c0SRichard Hu 22*95e882c0SRichard Hu ports { 23*95e882c0SRichard Hu #address-cells = <1>; 24*95e882c0SRichard Hu #size-cells = <0>; 25*95e882c0SRichard Hu 26*95e882c0SRichard Hu port@0 { 27*95e882c0SRichard Hu reg = <0>; 28*95e882c0SRichard Hu 29*95e882c0SRichard Hu hs_ep: endpoint { 30*95e882c0SRichard Hu remote-endpoint = <&usb3_hs_ep>; 31*95e882c0SRichard Hu }; 32*95e882c0SRichard Hu }; 33*95e882c0SRichard Hu 34*95e882c0SRichard Hu port@1 { 35*95e882c0SRichard Hu reg = <1>; 36*95e882c0SRichard Hu 37*95e882c0SRichard Hu ss_ep: endpoint { 38*95e882c0SRichard Hu remote-endpoint = <&hd3ss3220_in_ep>; 39*95e882c0SRichard Hu }; 40*95e882c0SRichard Hu }; 41*95e882c0SRichard Hu }; 42*95e882c0SRichard Hu }; 43*95e882c0SRichard Hu 44*95e882c0SRichard Hu hdmi-connector { 45*95e882c0SRichard Hu compatible = "hdmi-connector"; 46*95e882c0SRichard Hu label = "HDMI OUT"; 47*95e882c0SRichard Hu type = "a"; 48*95e882c0SRichard Hu 49*95e882c0SRichard Hu port { 50*95e882c0SRichard Hu hdmi_in: endpoint { 51*95e882c0SRichard Hu remote-endpoint = <&hdmi_tx_out>; 52*95e882c0SRichard Hu }; 53*95e882c0SRichard Hu }; 54*95e882c0SRichard Hu }; 55*95e882c0SRichard Hu 56*95e882c0SRichard Hu leds { 57*95e882c0SRichard Hu compatible = "gpio-leds"; 58*95e882c0SRichard Hu 59*95e882c0SRichard Hu led { 60*95e882c0SRichard Hu default-state = "on"; 61*95e882c0SRichard Hu gpios = <&expander2 1 GPIO_ACTIVE_HIGH>; 62*95e882c0SRichard Hu label = "gpio-led"; 63*95e882c0SRichard Hu }; 64*95e882c0SRichard Hu }; 65*95e882c0SRichard Hu 66*95e882c0SRichard Hu pcie0_refclk: clock-pcie-ref { 67*95e882c0SRichard Hu compatible = "fixed-clock"; 68*95e882c0SRichard Hu #clock-cells = <0>; 69*95e882c0SRichard Hu clock-frequency = <100000000>; 70*95e882c0SRichard Hu }; 71*95e882c0SRichard Hu 72*95e882c0SRichard Hu reg_pwr_3v3: regulator-pwr-3v3 { 73*95e882c0SRichard Hu compatible = "regulator-fixed"; 74*95e882c0SRichard Hu regulator-always-on; 75*95e882c0SRichard Hu regulator-boot-on; 76*95e882c0SRichard Hu regulator-max-microvolt = <3300000>; 77*95e882c0SRichard Hu regulator-min-microvolt = <3300000>; 78*95e882c0SRichard Hu regulator-name = "pwr-3v3"; 79*95e882c0SRichard Hu }; 80*95e882c0SRichard Hu 81*95e882c0SRichard Hu reg_pwr_5v: regulator-pwr-5v { 82*95e882c0SRichard Hu compatible = "regulator-fixed"; 83*95e882c0SRichard Hu regulator-always-on; 84*95e882c0SRichard Hu regulator-boot-on; 85*95e882c0SRichard Hu regulator-max-microvolt = <5000000>; 86*95e882c0SRichard Hu regulator-min-microvolt = <5000000>; 87*95e882c0SRichard Hu regulator-name = "pwr-5v"; 88*95e882c0SRichard Hu }; 89*95e882c0SRichard Hu 90*95e882c0SRichard Hu sound-hdmi { 91*95e882c0SRichard Hu compatible = "fsl,imx-audio-hdmi"; 92*95e882c0SRichard Hu audio-cpu = <&aud2htx>; 93*95e882c0SRichard Hu hdmi-out; 94*95e882c0SRichard Hu model = "audio-hdmi"; 95*95e882c0SRichard Hu }; 96*95e882c0SRichard Hu 97*95e882c0SRichard Hu sound-wm8960 { 98*95e882c0SRichard Hu compatible = "fsl,imx-audio-wm8960"; 99*95e882c0SRichard Hu audio-asrc = <&easrc>; 100*95e882c0SRichard Hu audio-codec = <&wm8960>; 101*95e882c0SRichard Hu audio-cpu = <&sai3>; 102*95e882c0SRichard Hu audio-routing = "Headphone Jack", "HP_L", 103*95e882c0SRichard Hu "Headphone Jack", "HP_R", 104*95e882c0SRichard Hu "Ext Spk", "SPK_LP", 105*95e882c0SRichard Hu "Ext Spk", "SPK_LN", 106*95e882c0SRichard Hu "Ext Spk", "SPK_RP", 107*95e882c0SRichard Hu "Ext Spk", "SPK_RN", 108*95e882c0SRichard Hu "LINPUT1", "Mic Jack", 109*95e882c0SRichard Hu "LINPUT1", "Mic Jack", 110*95e882c0SRichard Hu "Mic Jack", "MICB"; 111*95e882c0SRichard Hu model = "wm8960-audio"; 112*95e882c0SRichard Hu }; 113*95e882c0SRichard Hu}; 114*95e882c0SRichard Hu 115*95e882c0SRichard Hu&aud2htx { 116*95e882c0SRichard Hu status = "okay"; 117*95e882c0SRichard Hu}; 118*95e882c0SRichard Hu 119*95e882c0SRichard Hu&easrc { 120*95e882c0SRichard Hu fsl,asrc-rate = <48000>; 121*95e882c0SRichard Hu status = "okay"; 122*95e882c0SRichard Hu}; 123*95e882c0SRichard Hu 124*95e882c0SRichard Hu&flexcan1 { 125*95e882c0SRichard Hu status = "okay"; 126*95e882c0SRichard Hu}; 127*95e882c0SRichard Hu 128*95e882c0SRichard Hu&gpio1 { 129*95e882c0SRichard Hu gpio-line-names = 130*95e882c0SRichard Hu "", "", "", "", "", "", "DSI_RST", "", 131*95e882c0SRichard Hu "", "", "", "", "", "PCIE_CLKREQ_N", "", "", 132*95e882c0SRichard Hu "", "", "", "", "", "", "", "", 133*95e882c0SRichard Hu "", "", "", "", "", "", "", ""; 134*95e882c0SRichard Hu pinctrl-0 = <&pinctrl_gpio1>; 135*95e882c0SRichard Hu}; 136*95e882c0SRichard Hu 137*95e882c0SRichard Hu&gpio4 { 138*95e882c0SRichard Hu gpio-line-names = 139*95e882c0SRichard Hu "", "", "", "", "", "", "GPIO_P249", "GPIO_P251", 140*95e882c0SRichard Hu "", "GPIO_P255", "", "", "", "", "", "", 141*95e882c0SRichard Hu "DSI_BL_EN", "DSI_VDDEN", "", "", "", "", "", "", 142*95e882c0SRichard Hu "", "", "", "", "", "", "", ""; 143*95e882c0SRichard Hu pinctrl-0 = <&pinctrl_gpio4>; 144*95e882c0SRichard Hu}; 145*95e882c0SRichard Hu 146*95e882c0SRichard Hu&hdmi_pvi { 147*95e882c0SRichard Hu status = "okay"; 148*95e882c0SRichard Hu}; 149*95e882c0SRichard Hu 150*95e882c0SRichard Hu&hdmi_tx { 151*95e882c0SRichard Hu pinctrl-0 = <&pinctrl_hdmi>; 152*95e882c0SRichard Hu pinctrl-names = "default"; 153*95e882c0SRichard Hu status = "okay"; 154*95e882c0SRichard Hu 155*95e882c0SRichard Hu ports { 156*95e882c0SRichard Hu port@1 { 157*95e882c0SRichard Hu hdmi_tx_out: endpoint { 158*95e882c0SRichard Hu remote-endpoint = <&hdmi_in>; 159*95e882c0SRichard Hu }; 160*95e882c0SRichard Hu }; 161*95e882c0SRichard Hu }; 162*95e882c0SRichard Hu}; 163*95e882c0SRichard Hu 164*95e882c0SRichard Hu&hdmi_tx_phy { 165*95e882c0SRichard Hu status = "okay"; 166*95e882c0SRichard Hu}; 167*95e882c0SRichard Hu 168*95e882c0SRichard Hu&i2c2 { 169*95e882c0SRichard Hu status = "okay"; 170*95e882c0SRichard Hu 171*95e882c0SRichard Hu wm8960: audio-codec@1a { 172*95e882c0SRichard Hu compatible = "wlf,wm8960"; 173*95e882c0SRichard Hu reg = <0x1a>; 174*95e882c0SRichard Hu clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>; 175*95e882c0SRichard Hu clock-names = "mclk"; 176*95e882c0SRichard Hu #sound-dai-cells = <0>; 177*95e882c0SRichard Hu AVDD-supply = <®_pwr_3v3>; 178*95e882c0SRichard Hu DBVDD-supply = <®_pwr_3v3>; 179*95e882c0SRichard Hu DCVDD-supply = <®_pwr_3v3>; 180*95e882c0SRichard Hu SPKVDD1-supply = <®_pwr_5v>; 181*95e882c0SRichard Hu SPKVDD2-supply = <®_pwr_5v>; 182*95e882c0SRichard Hu wlf,gpio-cfg = <1 2>; 183*95e882c0SRichard Hu wlf,hp-cfg = <2 2 3>; 184*95e882c0SRichard Hu wlf,shared-lrclk; 185*95e882c0SRichard Hu }; 186*95e882c0SRichard Hu 187*95e882c0SRichard Hu expander1: gpio@21 { 188*95e882c0SRichard Hu compatible = "nxp,pca9555"; 189*95e882c0SRichard Hu reg = <0x21>; 190*95e882c0SRichard Hu #gpio-cells = <2>; 191*95e882c0SRichard Hu gpio-controller; 192*95e882c0SRichard Hu gpio-line-names = "EXPOSURE_TRIG_IN1", "FLASH_OUT1", 193*95e882c0SRichard Hu "INFO_TRIG_IN1", "CAM_SHUTTER1", "XVS1", 194*95e882c0SRichard Hu "PWR1_TIME0", "PWR1_TIME1", "PWR1_TIME2", 195*95e882c0SRichard Hu "EXPOSURE_TRIG_IN2", "FLASH_OUT2", 196*95e882c0SRichard Hu "INFO_TRIG_IN2", "CAM_SHUTTER2", "XVS2", 197*95e882c0SRichard Hu "PWR2_TIME0", "PWR2_TIME1", "PWR2_TIME2"; 198*95e882c0SRichard Hu }; 199*95e882c0SRichard Hu 200*95e882c0SRichard Hu expander2: gpio@23 { 201*95e882c0SRichard Hu compatible = "nxp,pca9555"; 202*95e882c0SRichard Hu reg = <0x23>; 203*95e882c0SRichard Hu #interrupt-cells = <2>; 204*95e882c0SRichard Hu interrupt-controller; 205*95e882c0SRichard Hu interrupt-parent = <&gpio4>; 206*95e882c0SRichard Hu interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 207*95e882c0SRichard Hu #gpio-cells = <2>; 208*95e882c0SRichard Hu gpio-controller; 209*95e882c0SRichard Hu gpio-line-names = "M2_DISABLE_N", "LED_EN", "", "", 210*95e882c0SRichard Hu "", "", "", "USB_OTG_OC", 211*95e882c0SRichard Hu "EXT_GPIO8", "EXT_GPIO9", "", "", 212*95e882c0SRichard Hu "", "CSI1_PDB", "CSI2_PDB", "PD_FAULT"; 213*95e882c0SRichard Hu pinctrl-0 = <&pinctrl_expander2_irq>; 214*95e882c0SRichard Hu pinctrl-names = "default"; 215*95e882c0SRichard Hu }; 216*95e882c0SRichard Hu 217*95e882c0SRichard Hu usb_typec: usb-typec@67 { 218*95e882c0SRichard Hu compatible = "ti,hd3ss3220"; 219*95e882c0SRichard Hu reg = <0x67>; 220*95e882c0SRichard Hu interrupt-parent = <&gpio4>; 221*95e882c0SRichard Hu interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 222*95e882c0SRichard Hu pinctrl-0 = <&pinctrl_hd3ss3220_irq>; 223*95e882c0SRichard Hu pinctrl-names = "default"; 224*95e882c0SRichard Hu 225*95e882c0SRichard Hu ports { 226*95e882c0SRichard Hu #address-cells = <1>; 227*95e882c0SRichard Hu #size-cells = <0>; 228*95e882c0SRichard Hu 229*95e882c0SRichard Hu port@0 { 230*95e882c0SRichard Hu reg = <0>; 231*95e882c0SRichard Hu 232*95e882c0SRichard Hu hd3ss3220_in_ep: endpoint { 233*95e882c0SRichard Hu remote-endpoint = <&ss_ep>; 234*95e882c0SRichard Hu }; 235*95e882c0SRichard Hu }; 236*95e882c0SRichard Hu 237*95e882c0SRichard Hu port@1 { 238*95e882c0SRichard Hu reg = <1>; 239*95e882c0SRichard Hu 240*95e882c0SRichard Hu hd3ss3220_out_ep: endpoint { 241*95e882c0SRichard Hu remote-endpoint = <&usb3_role_switch>; 242*95e882c0SRichard Hu }; 243*95e882c0SRichard Hu }; 244*95e882c0SRichard Hu }; 245*95e882c0SRichard Hu }; 246*95e882c0SRichard Hu}; 247*95e882c0SRichard Hu 248*95e882c0SRichard Hu&i2c_0 { 249*95e882c0SRichard Hu eeprom2: eeprom@51 { 250*95e882c0SRichard Hu compatible = "atmel,24c02"; 251*95e882c0SRichard Hu reg = <0x51>; 252*95e882c0SRichard Hu pagesize = <16>; 253*95e882c0SRichard Hu }; 254*95e882c0SRichard Hu}; 255*95e882c0SRichard Hu 256*95e882c0SRichard Hu&lcdif3 { 257*95e882c0SRichard Hu status = "okay"; 258*95e882c0SRichard Hu}; 259*95e882c0SRichard Hu 260*95e882c0SRichard Hu&pcie { 261*95e882c0SRichard Hu status = "okay"; 262*95e882c0SRichard Hu}; 263*95e882c0SRichard Hu 264*95e882c0SRichard Hu&pcie_phy { 265*95e882c0SRichard Hu clocks = <&pcie0_refclk>; 266*95e882c0SRichard Hu clock-names = "ref"; 267*95e882c0SRichard Hu fsl,clkreq-unsupported; 268*95e882c0SRichard Hu fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; 269*95e882c0SRichard Hu status = "okay"; 270*95e882c0SRichard Hu}; 271*95e882c0SRichard Hu 272*95e882c0SRichard Hu&usb3_0 { 273*95e882c0SRichard Hu status = "okay"; 274*95e882c0SRichard Hu}; 275*95e882c0SRichard Hu 276*95e882c0SRichard Hu&usb3_1 { 277*95e882c0SRichard Hu status = "okay"; 278*95e882c0SRichard Hu}; 279*95e882c0SRichard Hu 280*95e882c0SRichard Hu&usb3_phy0 { 281*95e882c0SRichard Hu status = "okay"; 282*95e882c0SRichard Hu}; 283*95e882c0SRichard Hu 284*95e882c0SRichard Hu&usb3_phy1 { 285*95e882c0SRichard Hu status = "okay"; 286*95e882c0SRichard Hu}; 287*95e882c0SRichard Hu 288*95e882c0SRichard Hu&usb_dwc3_0 { 289*95e882c0SRichard Hu /* dual role is implemented but not a full featured OTG */ 290*95e882c0SRichard Hu adp-disable; 291*95e882c0SRichard Hu dr_mode = "otg"; 292*95e882c0SRichard Hu hnp-disable; 293*95e882c0SRichard Hu role-switch-default-mode = "peripheral"; 294*95e882c0SRichard Hu srp-disable; 295*95e882c0SRichard Hu usb-role-switch; 296*95e882c0SRichard Hu 297*95e882c0SRichard Hu ports { 298*95e882c0SRichard Hu #address-cells = <1>; 299*95e882c0SRichard Hu #size-cells = <0>; 300*95e882c0SRichard Hu 301*95e882c0SRichard Hu port@0 { 302*95e882c0SRichard Hu reg = <0>; 303*95e882c0SRichard Hu 304*95e882c0SRichard Hu usb3_hs_ep: endpoint { 305*95e882c0SRichard Hu remote-endpoint = <&hs_ep>; 306*95e882c0SRichard Hu }; 307*95e882c0SRichard Hu }; 308*95e882c0SRichard Hu 309*95e882c0SRichard Hu port@1 { 310*95e882c0SRichard Hu reg = <1>; 311*95e882c0SRichard Hu 312*95e882c0SRichard Hu usb3_role_switch: endpoint { 313*95e882c0SRichard Hu remote-endpoint = <&hd3ss3220_out_ep>; 314*95e882c0SRichard Hu }; 315*95e882c0SRichard Hu }; 316*95e882c0SRichard Hu }; 317*95e882c0SRichard Hu}; 318*95e882c0SRichard Hu 319*95e882c0SRichard Hu&usb_dwc3_1 { 320*95e882c0SRichard Hu dr_mode = "host"; 321*95e882c0SRichard Hu}; 322*95e882c0SRichard Hu 323*95e882c0SRichard Hu&iomuxc { 324*95e882c0SRichard Hu pinctrl_expander2_irq: expander2-irqgrp { 325*95e882c0SRichard Hu fsl,pins = < 326*95e882c0SRichard Hu MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x140 /* GPIO_P247 */ 327*95e882c0SRichard Hu >; 328*95e882c0SRichard Hu }; 329*95e882c0SRichard Hu 330*95e882c0SRichard Hu pinctrl_gpio1: gpio1grp { 331*95e882c0SRichard Hu fsl,pins = < 332*95e882c0SRichard Hu MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x16 /* DSI_RST */ 333*95e882c0SRichard Hu >; 334*95e882c0SRichard Hu }; 335*95e882c0SRichard Hu 336*95e882c0SRichard Hu pinctrl_gpio4: gpio4grp { 337*95e882c0SRichard Hu fsl,pins = < 338*95e882c0SRichard Hu MX8MP_IOMUXC_SAI1_RXD4__GPIO4_IO06 0x16 /* GPIO_P249 */ 339*95e882c0SRichard Hu MX8MP_IOMUXC_SAI1_RXD5__GPIO4_IO07 0x16 /* GPIO_P251 */ 340*95e882c0SRichard Hu MX8MP_IOMUXC_SAI1_RXD7__GPIO4_IO09 0x16 /* GPIO_P255 */ 341*95e882c0SRichard Hu MX8MP_IOMUXC_SAI1_TXD4__GPIO4_IO16 0x16 /* DSI_BL_EN */ 342*95e882c0SRichard Hu MX8MP_IOMUXC_SAI1_TXD5__GPIO4_IO17 0x16 /* DSI_VDDEN */ 343*95e882c0SRichard Hu >; 344*95e882c0SRichard Hu }; 345*95e882c0SRichard Hu 346*95e882c0SRichard Hu pinctrl_hd3ss3220_irq: hd3ss3220-irqgrp { 347*95e882c0SRichard Hu fsl,pins = < 348*95e882c0SRichard Hu MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x41 /* GPIO_P253 */ 349*95e882c0SRichard Hu >; 350*95e882c0SRichard Hu }; 351*95e882c0SRichard Hu 352*95e882c0SRichard Hu pinctrl_hdmi: hdmigrp { 353*95e882c0SRichard Hu fsl,pins = < 354*95e882c0SRichard Hu MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c2 355*95e882c0SRichard Hu MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c2 356*95e882c0SRichard Hu MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x10 357*95e882c0SRichard Hu >; 358*95e882c0SRichard Hu }; 359*95e882c0SRichard Hu}; 360