1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright 2019 NXP 4 * Copyright 2022 Ideas on Board Oy 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/leds/common.h> 11#include <dt-bindings/usb/pd.h> 12 13#include "imx8mp.dtsi" 14 15/ { 16 model = "Polyhex Debix Model A i.MX8MPlus board"; 17 compatible = "polyhex,imx8mp-debix-model-a", "polyhex,imx8mp-debix", "fsl,imx8mp"; 18 19 chosen { 20 stdout-path = &uart2; 21 }; 22 23 leds { 24 compatible = "gpio-leds"; 25 pinctrl-names = "default"; 26 pinctrl-0 = <&pinctrl_gpio_led>; 27 28 led-0 { 29 function = LED_FUNCTION_POWER; 30 color = <LED_COLOR_ID_RED>; 31 gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; 32 default-state = "on"; 33 }; 34 }; 35 36 reg_usdhc2_vmmc: regulator-usdhc2 { 37 compatible = "regulator-fixed"; 38 pinctrl-names = "default"; 39 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 40 regulator-name = "VSD_3V3"; 41 regulator-min-microvolt = <3300000>; 42 regulator-max-microvolt = <3300000>; 43 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 44 enable-active-high; 45 }; 46 47 reg_usb_hub: regulator-usb-hub { 48 compatible = "regulator-fixed"; 49 pinctrl-names = "default"; 50 pinctrl-0 = <&pinctrl_reg_usb_hub>; 51 regulator-name = "USB_HUB"; 52 regulator-min-microvolt = <5000000>; 53 regulator-max-microvolt = <5000000>; 54 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>; 55 enable-active-high; 56 }; 57}; 58 59&A53_0 { 60 cpu-supply = <&buck2>; 61}; 62 63&A53_1 { 64 cpu-supply = <&buck2>; 65}; 66 67&A53_2 { 68 cpu-supply = <&buck2>; 69}; 70 71&A53_3 { 72 cpu-supply = <&buck2>; 73}; 74 75&eqos { 76 pinctrl-names = "default"; 77 pinctrl-0 = <&pinctrl_eqos>; 78 phy-mode = "rgmii-id"; 79 phy-handle = <ðphy0>; 80 status = "okay"; 81 82 mdio { 83 compatible = "snps,dwmac-mdio"; 84 #address-cells = <1>; 85 #size-cells = <0>; 86 87 ethphy0: ethernet-phy@0 { /* RTL8211E */ 88 compatible = "ethernet-phy-ieee802.3-c22"; 89 reg = <0>; 90 reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>; 91 reset-assert-us = <20>; 92 reset-deassert-us = <200000>; 93 }; 94 }; 95}; 96 97&i2c1 { 98 clock-frequency = <400000>; 99 pinctrl-names = "default"; 100 pinctrl-0 = <&pinctrl_i2c1>; 101 status = "okay"; 102 103 pmic@25 { 104 compatible = "nxp,pca9450c"; 105 reg = <0x25>; 106 pinctrl-names = "default"; 107 pinctrl-0 = <&pinctrl_pmic>; 108 interrupt-parent = <&gpio1>; 109 interrupts = <3 IRQ_TYPE_EDGE_RISING>; 110 111 regulators { 112 buck1: BUCK1 { 113 regulator-name = "BUCK1"; 114 regulator-min-microvolt = <600000>; 115 regulator-max-microvolt = <2187500>; 116 regulator-boot-on; 117 regulator-always-on; 118 regulator-ramp-delay = <3125>; 119 }; 120 121 buck2: BUCK2 { 122 regulator-name = "BUCK2"; 123 regulator-min-microvolt = <600000>; 124 regulator-max-microvolt = <2187500>; 125 regulator-boot-on; 126 regulator-always-on; 127 regulator-ramp-delay = <3125>; 128 nxp,dvs-run-voltage = <950000>; 129 nxp,dvs-standby-voltage = <850000>; 130 }; 131 132 buck4: BUCK4 { 133 regulator-name = "BUCK4"; 134 regulator-min-microvolt = <600000>; 135 regulator-max-microvolt = <3400000>; 136 regulator-boot-on; 137 regulator-always-on; 138 }; 139 140 buck5: BUCK5 { 141 regulator-name = "BUCK5"; 142 regulator-min-microvolt = <600000>; 143 regulator-max-microvolt = <3400000>; 144 regulator-boot-on; 145 regulator-always-on; 146 }; 147 148 buck6: BUCK6 { 149 regulator-name = "BUCK6"; 150 regulator-min-microvolt = <600000>; 151 regulator-max-microvolt = <3400000>; 152 regulator-boot-on; 153 regulator-always-on; 154 }; 155 156 ldo1: LDO1 { 157 regulator-name = "LDO1"; 158 regulator-min-microvolt = <1600000>; 159 regulator-max-microvolt = <3300000>; 160 regulator-boot-on; 161 regulator-always-on; 162 }; 163 164 ldo2: LDO2 { 165 regulator-name = "LDO2"; 166 regulator-min-microvolt = <800000>; 167 regulator-max-microvolt = <1150000>; 168 regulator-boot-on; 169 regulator-always-on; 170 }; 171 172 ldo3: LDO3 { 173 regulator-name = "LDO3"; 174 regulator-min-microvolt = <800000>; 175 regulator-max-microvolt = <3300000>; 176 regulator-boot-on; 177 regulator-always-on; 178 }; 179 180 ldo4: LDO4 { 181 regulator-name = "LDO4"; 182 regulator-min-microvolt = <800000>; 183 regulator-max-microvolt = <3300000>; 184 regulator-boot-on; 185 regulator-always-on; 186 }; 187 188 ldo5: LDO5 { 189 regulator-name = "LDO5"; 190 regulator-min-microvolt = <1800000>; 191 regulator-max-microvolt = <3300000>; 192 regulator-boot-on; 193 regulator-always-on; 194 }; 195 }; 196 }; 197}; 198 199&i2c2 { 200 pinctrl-names = "default"; 201 pinctrl-0 = <&pinctrl_i2c2>; 202}; 203 204&i2c3 { 205 clock-frequency = <400000>; 206 pinctrl-names = "default"; 207 pinctrl-0 = <&pinctrl_i2c3>; 208 status = "okay"; 209}; 210 211&i2c4 { 212 clock-frequency = <100000>; 213 pinctrl-names = "default"; 214 pinctrl-0 = <&pinctrl_i2c4>; 215 status = "okay"; 216 217 eeprom@50 { 218 compatible = "atmel,24c02"; 219 reg = <0x50>; 220 pagesize = <16>; 221 }; 222 223 rtc@51 { 224 compatible = "haoyu,hym8563"; 225 reg = <0x51>; 226 #clock-cells = <0>; 227 clock-output-names = "xin32k"; 228 interrupt-parent = <&gpio2>; 229 interrupts = <11 IRQ_TYPE_EDGE_FALLING>; 230 pinctrl-names = "default"; 231 pinctrl-0 = <&pinctrl_rtc_int>; 232 }; 233}; 234 235&i2c6 { 236 clock-frequency = <400000>; 237 pinctrl-names = "default"; 238 pinctrl-0 = <&pinctrl_i2c6>; 239 status = "okay"; 240}; 241 242&snvs_pwrkey { 243 status = "okay"; 244}; 245 246&uart2 { 247 /* console */ 248 pinctrl-names = "default"; 249 pinctrl-0 = <&pinctrl_uart2>; 250 status = "okay"; 251}; 252 253&uart3 { 254 pinctrl-names = "default"; 255 pinctrl-0 = <&pinctrl_uart3>; 256 status = "okay"; 257}; 258 259&uart4 { 260 pinctrl-names = "default"; 261 pinctrl-0 = <&pinctrl_uart4>; 262 status = "okay"; 263}; 264 265&usb3_phy1 { 266 status = "okay"; 267}; 268 269&usb3_1 { 270 status = "okay"; 271}; 272 273&usb_dwc3_1 { 274 #address-cells = <1>; 275 #size-cells = <0>; 276 pinctrl-names = "default"; 277 pinctrl-0 = <&pinctrl_usb1>; 278 dr_mode = "host"; 279 status = "okay"; 280 281 /* 2.x hub on port 1 */ 282 usb_hub_2_x: hub@1 { 283 compatible = "usbbda,5411"; 284 reg = <1>; 285 vdd-supply = <®_usb_hub>; 286 peer-hub = <&usb_hub_3_x>; 287 }; 288 289 /* 3.x hub on port 2 */ 290 usb_hub_3_x: hub@2 { 291 compatible = "usbbda,411"; 292 reg = <2>; 293 vdd-supply = <®_usb_hub>; 294 peer-hub = <&usb_hub_2_x>; 295 }; 296}; 297 298/* SD Card */ 299&usdhc2 { 300 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 301 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 302 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; 303 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; 304 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 305 vmmc-supply = <®_usdhc2_vmmc>; 306 bus-width = <4>; 307 status = "okay"; 308}; 309 310/* eMMC */ 311&usdhc3 { 312 assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; 313 assigned-clock-rates = <400000000>; 314 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 315 pinctrl-0 = <&pinctrl_usdhc3>; 316 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 317 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 318 bus-width = <8>; 319 non-removable; 320 status = "okay"; 321}; 322 323&wdog1 { 324 pinctrl-names = "default"; 325 pinctrl-0 = <&pinctrl_wdog>; 326 fsl,ext-reset-output; 327 status = "okay"; 328}; 329 330&iomuxc { 331 pinctrl_eqos: eqosgrp { 332 fsl,pins = < 333 MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3 334 MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3 335 MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91 336 MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91 337 MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91 338 MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91 339 MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91 340 MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91 341 MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x1f 342 MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x1f 343 MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x1f 344 MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x1f 345 MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f 346 MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f 347 MX8MP_IOMUXC_SAI1_RXFS__ENET1_1588_EVENT0_IN 0x1f 348 MX8MP_IOMUXC_SAI1_RXC__ENET1_1588_EVENT0_OUT 0x1f 349 MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x19 350 >; 351 }; 352 353 pinctrl_gpio_led: gpioledgrp { 354 fsl,pins = < 355 MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x19 356 >; 357 }; 358 359 pinctrl_i2c1: i2c1grp { 360 fsl,pins = < 361 MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2 362 MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2 363 >; 364 }; 365 366 pinctrl_i2c2: i2c2grp { 367 fsl,pins = < 368 MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 369 MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2 370 >; 371 }; 372 373 pinctrl_i2c3: i2c3grp { 374 fsl,pins = < 375 MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2 376 MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2 377 >; 378 }; 379 380 pinctrl_i2c4: i2c4grp { 381 fsl,pins = < 382 MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c3 383 MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c3 384 >; 385 }; 386 387 pinctrl_i2c6: i2c6grp { 388 fsl,pins = < 389 MX8MP_IOMUXC_SAI5_RXFS__I2C6_SCL 0x400001c3 390 MX8MP_IOMUXC_SAI5_RXC__I2C6_SDA 0x400001c3 391 >; 392 }; 393 394 pinctrl_pmic: pmicirqgrp { 395 fsl,pins = < 396 MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x41 397 >; 398 }; 399 400 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { 401 fsl,pins = < 402 MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x41 403 >; 404 }; 405 406 pinctrl_reg_usb_hub: regusbhubgrp { 407 fsl,pins = < 408 MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x19 409 >; 410 }; 411 412 pinctrl_rtc_int: rtcintgrp { 413 fsl,pins = < 414 MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11 0x140 415 >; 416 }; 417 418 pinctrl_uart2: uart2grp { 419 fsl,pins = < 420 MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x14f 421 MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x14f 422 >; 423 }; 424 425 pinctrl_uart3: uart3grp { 426 fsl,pins = < 427 MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x49 428 MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x49 429 >; 430 }; 431 432 pinctrl_uart4: uart4grp { 433 fsl,pins = < 434 MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x49 435 MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x49 436 >; 437 }; 438 439 pinctrl_usb1: usb1grp { 440 fsl,pins = < 441 MX8MP_IOMUXC_GPIO1_IO14__USB2_OTG_PWR 0x10 442 >; 443 }; 444 445 pinctrl_usdhc2: usdhc2grp { 446 fsl,pins = < 447 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 448 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 449 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 450 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 451 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 452 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 453 >; 454 }; 455 456 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 457 fsl,pins = < 458 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 459 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 460 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 461 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 462 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 463 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 464 >; 465 }; 466 467 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 468 fsl,pins = < 469 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 470 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 471 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 472 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 473 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 474 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 475 >; 476 }; 477 478 pinctrl_usdhc2_gpio: usdhc2gpiogrp { 479 fsl,pins = < 480 MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 481 >; 482 }; 483 484 pinctrl_usdhc3: usdhc3grp { 485 fsl,pins = < 486 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 487 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 488 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0 489 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0 490 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0 491 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0 492 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0 493 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0 494 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 495 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 496 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 497 >; 498 }; 499 500 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 501 fsl,pins = < 502 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 503 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 504 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4 505 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4 506 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4 507 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4 508 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4 509 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4 510 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 511 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 512 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 513 >; 514 }; 515 516 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 517 fsl,pins = < 518 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196 519 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6 520 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6 521 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6 522 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6 523 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6 524 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6 525 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6 526 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6 527 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6 528 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196 529 >; 530 }; 531 532 pinctrl_wdog: wdoggrp { 533 fsl,pins = < 534 MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6 535 >; 536 }; 537}; 538