xref: /linux/arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi (revision 9f06926ef1b22a52e3c8ceea394cf7408c4e66b2)
16a57f224SMarcel Ziswiler// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
26a57f224SMarcel Ziswiler/*
36a57f224SMarcel Ziswiler * Copyright 2022 Toradex
46a57f224SMarcel Ziswiler */
56a57f224SMarcel Ziswiler
66a57f224SMarcel Ziswiler/ {
76a57f224SMarcel Ziswiler	sound_card: sound-card {
86a57f224SMarcel Ziswiler		compatible = "simple-audio-card";
96a57f224SMarcel Ziswiler		simple-audio-card,bitclock-master = <&dailink_master>;
106a57f224SMarcel Ziswiler		simple-audio-card,format = "i2s";
116a57f224SMarcel Ziswiler		simple-audio-card,frame-master = <&dailink_master>;
120d1d030fSEmanuele Ghidoli		simple-audio-card,mclk-fs = <256>;
136a57f224SMarcel Ziswiler		simple-audio-card,name = "imx8mm-wm8904";
146a57f224SMarcel Ziswiler		simple-audio-card,routing =
156a57f224SMarcel Ziswiler			"Headphone Jack", "HPOUTL",
166a57f224SMarcel Ziswiler			"Headphone Jack", "HPOUTR",
176a57f224SMarcel Ziswiler			"IN2L", "Line In Jack",
186a57f224SMarcel Ziswiler			"IN2R", "Line In Jack",
196a57f224SMarcel Ziswiler			"Headphone Jack", "MICBIAS",
206a57f224SMarcel Ziswiler			"IN1L", "Headphone Jack";
216a57f224SMarcel Ziswiler		simple-audio-card,widgets =
226a57f224SMarcel Ziswiler			"Microphone", "Headphone Jack",
236a57f224SMarcel Ziswiler			"Headphone", "Headphone Jack",
246a57f224SMarcel Ziswiler			"Line", "Line In Jack";
256a57f224SMarcel Ziswiler
266a57f224SMarcel Ziswiler		dailink_master: simple-audio-card,codec {
276a57f224SMarcel Ziswiler			clocks = <&clk IMX8MM_CLK_SAI2_ROOT>;
286a57f224SMarcel Ziswiler			sound-dai = <&wm8904_1a>;
296a57f224SMarcel Ziswiler		};
306a57f224SMarcel Ziswiler
316a57f224SMarcel Ziswiler		simple-audio-card,cpu {
326a57f224SMarcel Ziswiler			sound-dai = <&sai2>;
336a57f224SMarcel Ziswiler		};
346a57f224SMarcel Ziswiler	};
356a57f224SMarcel Ziswiler};
366a57f224SMarcel Ziswiler
376a57f224SMarcel Ziswiler/* Verdin SPI_1 */
386a57f224SMarcel Ziswiler&ecspi2 {
396a57f224SMarcel Ziswiler	status = "okay";
406a57f224SMarcel Ziswiler};
416a57f224SMarcel Ziswiler
426a57f224SMarcel Ziswiler/* EEPROM on display adapter boards */
436a57f224SMarcel Ziswiler&eeprom_display_adapter {
446a57f224SMarcel Ziswiler	status = "okay";
456a57f224SMarcel Ziswiler};
466a57f224SMarcel Ziswiler
476a57f224SMarcel Ziswiler/* EEPROM on Verdin Development board */
486a57f224SMarcel Ziswiler&eeprom_carrier_board {
496a57f224SMarcel Ziswiler	status = "okay";
506a57f224SMarcel Ziswiler};
516a57f224SMarcel Ziswiler
526a57f224SMarcel Ziswiler&fec1 {
536a57f224SMarcel Ziswiler	status = "okay";
546a57f224SMarcel Ziswiler};
556a57f224SMarcel Ziswiler
566a57f224SMarcel Ziswiler/* Verdin QSPI_1 */
576a57f224SMarcel Ziswiler&flexspi {
586a57f224SMarcel Ziswiler	status = "okay";
596a57f224SMarcel Ziswiler};
606a57f224SMarcel Ziswiler
61*9f06926eSStefan Eichenberger&gpio5 {
62*9f06926eSStefan Eichenberger	pinctrl-names = "default";
63*9f06926eSStefan Eichenberger	pinctrl-0 = <&pinctrl_ctrl_sleep_moci>;
64*9f06926eSStefan Eichenberger};
65*9f06926eSStefan Eichenberger
666a57f224SMarcel Ziswiler/* Current measurement into module VCC */
676a57f224SMarcel Ziswiler&hwmon {
686a57f224SMarcel Ziswiler	status = "okay";
696a57f224SMarcel Ziswiler};
706a57f224SMarcel Ziswiler
716a57f224SMarcel Ziswiler&hwmon_temp {
726a57f224SMarcel Ziswiler	vs-supply = <&reg_1p8v>;
736a57f224SMarcel Ziswiler	status = "okay";
746a57f224SMarcel Ziswiler};
756a57f224SMarcel Ziswiler
766a57f224SMarcel Ziswiler&i2c3 {
776a57f224SMarcel Ziswiler	status = "okay";
786a57f224SMarcel Ziswiler};
796a57f224SMarcel Ziswiler
806a57f224SMarcel Ziswiler/* Verdin I2C_1 */
816a57f224SMarcel Ziswiler&i2c4 {
826a57f224SMarcel Ziswiler	status = "okay";
836a57f224SMarcel Ziswiler
846a57f224SMarcel Ziswiler	/* Audio Codec */
856a57f224SMarcel Ziswiler	wm8904_1a: audio-codec@1a {
866a57f224SMarcel Ziswiler		compatible = "wlf,wm8904";
876a57f224SMarcel Ziswiler		AVDD-supply = <&reg_3p3v>;
886a57f224SMarcel Ziswiler		clocks = <&clk IMX8MM_CLK_SAI2_ROOT>;
896a57f224SMarcel Ziswiler		clock-names = "mclk";
906a57f224SMarcel Ziswiler		CPVDD-supply = <&reg_3p3v>;
916a57f224SMarcel Ziswiler		DBVDD-supply = <&reg_3p3v>;
926a57f224SMarcel Ziswiler		DCVDD-supply = <&reg_3p3v>;
936a57f224SMarcel Ziswiler		MICVDD-supply = <&reg_3p3v>;
946a57f224SMarcel Ziswiler		reg = <0x1a>;
956a57f224SMarcel Ziswiler		#sound-dai-cells = <0>;
966a57f224SMarcel Ziswiler	};
976a57f224SMarcel Ziswiler};
986a57f224SMarcel Ziswiler
996a57f224SMarcel Ziswiler/* Verdin PCIE_1 */
1006a57f224SMarcel Ziswiler&pcie0 {
1016a57f224SMarcel Ziswiler	status = "okay";
1026a57f224SMarcel Ziswiler};
1036a57f224SMarcel Ziswiler
1046a57f224SMarcel Ziswiler&pcie_phy {
1056a57f224SMarcel Ziswiler	status = "okay";
1066a57f224SMarcel Ziswiler};
1076a57f224SMarcel Ziswiler
1086a57f224SMarcel Ziswiler/* Verdin PWM_3_DSI */
1096a57f224SMarcel Ziswiler&pwm1 {
1106a57f224SMarcel Ziswiler	status = "okay";
1116a57f224SMarcel Ziswiler};
1126a57f224SMarcel Ziswiler
1136a57f224SMarcel Ziswiler/* Verdin PWM_1 */
1146a57f224SMarcel Ziswiler&pwm2 {
1156a57f224SMarcel Ziswiler	status = "okay";
1166a57f224SMarcel Ziswiler};
1176a57f224SMarcel Ziswiler
1186a57f224SMarcel Ziswiler/* Verdin PWM_2 */
1196a57f224SMarcel Ziswiler&pwm3 {
1206a57f224SMarcel Ziswiler	status = "okay";
1216a57f224SMarcel Ziswiler};
1226a57f224SMarcel Ziswiler
123473b34b8SMarcel Ziswiler/* Verdin I2S_1 */
1246a57f224SMarcel Ziswiler&sai2 {
1256a57f224SMarcel Ziswiler	status = "okay";
1266a57f224SMarcel Ziswiler};
1276a57f224SMarcel Ziswiler
1286a57f224SMarcel Ziswiler/* Verdin UART_3 */
1296a57f224SMarcel Ziswiler&uart1 {
1306a57f224SMarcel Ziswiler	status = "okay";
1316a57f224SMarcel Ziswiler};
1326a57f224SMarcel Ziswiler
1336a57f224SMarcel Ziswiler/* Verdin UART_1 */
1346a57f224SMarcel Ziswiler&uart2 {
1356a57f224SMarcel Ziswiler	status = "okay";
1366a57f224SMarcel Ziswiler};
1376a57f224SMarcel Ziswiler
1386a57f224SMarcel Ziswiler/* Verdin UART_2 */
1396a57f224SMarcel Ziswiler&uart3 {
1406a57f224SMarcel Ziswiler	status = "okay";
1416a57f224SMarcel Ziswiler};
1426a57f224SMarcel Ziswiler
1436a57f224SMarcel Ziswiler/* Verdin USB_1 */
1446a57f224SMarcel Ziswiler&usbotg1 {
1454763009eSPhilippe Schenker	disable-over-current;
1466a57f224SMarcel Ziswiler	status = "okay";
1476a57f224SMarcel Ziswiler};
1486a57f224SMarcel Ziswiler
1496a57f224SMarcel Ziswiler/* Verdin USB_2 */
1506a57f224SMarcel Ziswiler&usbotg2 {
1514763009eSPhilippe Schenker	disable-over-current;
1526a57f224SMarcel Ziswiler	status = "okay";
1536a57f224SMarcel Ziswiler};
1546a57f224SMarcel Ziswiler
1556a57f224SMarcel Ziswiler/* Verdin SD_1 */
1566a57f224SMarcel Ziswiler&usdhc2 {
1576a57f224SMarcel Ziswiler	status = "okay";
1586a57f224SMarcel Ziswiler};
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