xref: /linux/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l-rs232-rts-cts.dtso (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2023 PHYTEC Messtechnik GmbH
4 * Author: Jens Lang <j.lang@phytec.de>
5 *
6 * Tauri-L RS232 with RTS/CTS hardware flow control:
7 *  - UART4_TX becomes RTS
8 *  - UART4_RX becomes CTS
9 */
10
11#include <dt-bindings/clock/imx8mm-clock.h>
12#include "imx8mm-pinfunc.h"
13
14/dts-v1/;
15/plugin/;
16
17&uart2 {
18	pinctrl-names = "default";
19	pinctrl-0 = <&pinctrl_uart2>;
20	assigned-clocks = <&clk IMX8MM_CLK_UART2>;
21	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
22	uart-has-rtscts;
23	status = "okay";
24};
25
26&iomuxc {
27	pinctrl_uart2: uart2grp {
28		fsl,pins = <
29			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX	0x00
30			MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX	0x00
31			MX8MM_IOMUXC_UART4_RXD_UART2_DCE_CTS_B	0x00
32			MX8MM_IOMUXC_UART4_TXD_UART2_DCE_RTS_B	0x00
33		>;
34	};
35};
36