1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2/* 3 * Copyright 2022 Toradex 4 */ 5 6#include <dt-bindings/pwm/pwm.h> 7 8/ { 9 chosen { 10 stdout-path = &lpuart1; 11 }; 12 13 /* Apalis BKL1 */ 14 backlight: backlight { 15 compatible = "pwm-backlight"; 16 pinctrl-names = "default"; 17 pinctrl-0 = <&pinctrl_gpio_bkl_on>; 18 brightness-levels = <0 45 63 88 119 158 203 255>; 19 default-brightness-level = <4>; 20 enable-gpios = <&lsio_gpio1 4 GPIO_ACTIVE_HIGH>; /* Apalis BKL1_ON */ 21 /* TODO: hook-up to Apalis BKL1_PWM */ 22 status = "disabled"; 23 }; 24 25 gpio_fan: gpio-fan { 26 compatible = "gpio-fan"; 27 pinctrl-names = "default"; 28 pinctrl-0 = <&pinctrl_gpio8>; 29 gpios = <&lsio_gpio3 28 GPIO_ACTIVE_HIGH>; 30 gpio-fan,speed-map = < 0 0 31 3000 1>; 32 }; 33 34 /* TODO: LVDS Panel */ 35 36 /* TODO: Shared PCIe/SATA Reference Clock */ 37 38 /* TODO: PCIe Wi-Fi Reference Clock */ 39 40 /* 41 * Power management bus used to control LDO1OUT of the 42 * second PMIC PF8100. This is used for controlling voltage levels of 43 * typespecific RGMII signals and Apalis UART2_RTS UART2_CTS. 44 * 45 * IMX_SC_R_BOARD_R1 for 3.3V 46 * IMX_SC_R_BOARD_R2 for 1.8V 47 * IMX_SC_R_BOARD_R3 for 2.5V 48 * Note that for 2.5V operation the pad muxing needs to be changed, 49 * compare with PSW_OVR field of IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD. 50 * 51 * those power domains are mutually exclusive. 52 */ 53 reg_ext_rgmii: regulator-ext-rgmii { 54 compatible = "regulator-fixed"; 55 power-domains = <&pd IMX_SC_R_BOARD_R1>; 56 regulator-max-microvolt = <3300000>; 57 regulator-min-microvolt = <3300000>; 58 regulator-name = "VDD_EXT_RGMII (LDO1)"; 59 60 regulator-state-mem { 61 regulator-off-in-suspend; 62 }; 63 }; 64 65 reg_module_3v3: regulator-module-3v3 { 66 compatible = "regulator-fixed"; 67 regulator-max-microvolt = <3300000>; 68 regulator-min-microvolt = <3300000>; 69 regulator-name = "+V3.3"; 70 }; 71 72 reg_module_3v3_avdd: regulator-module-3v3-avdd { 73 compatible = "regulator-fixed"; 74 regulator-max-microvolt = <3300000>; 75 regulator-min-microvolt = <3300000>; 76 regulator-name = "+V3.3_AUDIO"; 77 }; 78 79 reg_module_wifi: regulator-module-wifi { 80 compatible = "regulator-fixed"; 81 pinctrl-names = "default"; 82 pinctrl-0 = <&pinctrl_wifi_pdn>; 83 gpio = <&lsio_gpio1 28 GPIO_ACTIVE_HIGH>; 84 enable-active-high; 85 regulator-always-on; 86 regulator-name = "wifi_pwrdn_fake_regulator"; 87 regulator-settling-time-us = <100>; 88 }; 89 90 reg_pcie_switch: regulator-pcie-switch { 91 compatible = "regulator-fixed"; 92 pinctrl-names = "default"; 93 pinctrl-0 = <&pinctrl_gpio7>; 94 gpio = <&lsio_gpio3 26 GPIO_ACTIVE_HIGH>; 95 enable-active-high; 96 regulator-max-microvolt = <1800000>; 97 regulator-min-microvolt = <1800000>; 98 regulator-name = "pcie_switch"; 99 startup-delay-us = <100000>; 100 }; 101 102 reg_usb_host_vbus: regulator-usb-host-vbus { 103 compatible = "regulator-fixed"; 104 pinctrl-names = "default"; 105 pinctrl-0 = <&pinctrl_usbh_en>; 106 /* Apalis USBH_EN */ 107 gpio = <&lsio_gpio4 4 GPIO_ACTIVE_HIGH>; 108 enable-active-high; 109 regulator-always-on; 110 regulator-max-microvolt = <5000000>; 111 regulator-min-microvolt = <5000000>; 112 regulator-name = "usb-host-vbus"; 113 }; 114 115 reg_usb_hsic: regulator-usb-hsic { 116 compatible = "regulator-fixed"; 117 regulator-max-microvolt = <3000000>; 118 regulator-min-microvolt = <3000000>; 119 regulator-name = "usb-hsic-dummy"; 120 }; 121 122 reg_usb_phy: regulator-usb-hsic1 { 123 compatible = "regulator-fixed"; 124 regulator-max-microvolt = <3000000>; 125 regulator-min-microvolt = <3000000>; 126 regulator-name = "usb-phy-dummy"; 127 }; 128 129 reg_vref_1v8: regulator-vref-1v8 { 130 compatible = "regulator-fixed"; 131 regulator-name = "+V1.8"; 132 regulator-min-microvolt = <1800000>; 133 regulator-max-microvolt = <1800000>; 134 }; 135 136 reserved-memory { 137 #address-cells = <2>; 138 #size-cells = <2>; 139 ranges; 140 141 decoder_boot: decoder-boot@84000000 { 142 reg = <0 0x84000000 0 0x2000000>; 143 no-map; 144 }; 145 146 encoder1_boot: encoder1-boot@86000000 { 147 reg = <0 0x86000000 0 0x200000>; 148 no-map; 149 }; 150 151 encoder2_boot: encoder2-boot@86200000 { 152 reg = <0 0x86200000 0 0x200000>; 153 no-map; 154 }; 155 156 /* 157 * reserved-memory layout 158 * 0x8800_0000 ~ 0x8FFF_FFFF is reserved for M4 159 * Shouldn't be used at A core and Linux side. 160 * 161 */ 162 m4_reserved: m4@88000000 { 163 reg = <0 0x88000000 0 0x8000000>; 164 no-map; 165 }; 166 167 rpmsg_reserved: rpmsg@90200000 { 168 reg = <0 0x90200000 0 0x200000>; 169 no-map; 170 }; 171 172 vdevbuffer: vdevbuffer@90400000 { 173 compatible = "shared-dma-pool"; 174 reg = <0 0x90400000 0 0x100000>; 175 no-map; 176 }; 177 178 decoder_rpc: decoder-rpc@92000000 { 179 reg = <0 0x92000000 0 0x200000>; 180 no-map; 181 }; 182 183 dsp_reserved: dsp@92400000 { 184 reg = <0 0x92400000 0 0x2000000>; 185 no-map; 186 }; 187 188 encoder1_rpc: encoder1-rpc@94400000 { 189 reg = <0 0x94400000 0 0x700000>; 190 no-map; 191 }; 192 193 encoder2_rpc: encoder2-rpc@94b00000 { 194 reg = <0 0x94b00000 0 0x700000>; 195 no-map; 196 }; 197 198 /* global autoconfigured region for contiguous allocations */ 199 linux,cma { 200 compatible = "shared-dma-pool"; 201 alloc-ranges = <0 0xc0000000 0 0x3c000000>; 202 linux,cma-default; 203 reusable; 204 size = <0 0x3c000000>; 205 }; 206 }; 207 208 sound { 209 compatible = "simple-audio-card"; 210 simple-audio-card,bitclock-master = <&dailink_master>; 211 simple-audio-card,format = "i2s"; 212 simple-audio-card,frame-master = <&dailink_master>; 213 simple-audio-card,name = "apalis-imx8qm"; 214 215 simple-audio-card,cpu { 216 sound-dai = <&sai1>; 217 }; 218 219 dailink_master: simple-audio-card,codec { 220 sound-dai = <&sgtl5000>; 221 }; 222 }; 223 224 /* TODO: HDMI Audio */ 225 226 /* Apalis SPDIF1 */ 227 sound-spdif { 228 compatible = "fsl,imx-audio-spdif"; 229 model = "imx-spdif"; 230 spdif-controller = <&spdif0>; 231 spdif-in; 232 spdif-out; 233 }; 234 235 touchscreen: touchscreen { 236 compatible = "toradex,vf50-touchscreen"; 237 interrupt-parent = <&lsio_gpio3>; 238 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; 239 pinctrl-names = "idle", "default"; 240 pinctrl-0 = <&pinctrl_touchctrl_idle>, <&pinctrl_touchctrl_gpios>; 241 pinctrl-1 = <&pinctrl_adc1>, <&pinctrl_touchctrl_gpios>; 242 io-channels = <&adc1 2>, <&adc1 1>, 243 <&adc1 0>, <&adc1 3>; 244 vf50-ts-min-pressure = <200>; 245 xp-gpios = <&lsio_gpio2 4 GPIO_ACTIVE_LOW>; 246 xm-gpios = <&lsio_gpio2 5 GPIO_ACTIVE_HIGH>; 247 yp-gpios = <&lsio_gpio2 17 GPIO_ACTIVE_LOW>; 248 ym-gpios = <&lsio_gpio2 21 GPIO_ACTIVE_HIGH>; 249 /* 250 * NOTE: you must remove the pinctrl-adc1 from the adc1 251 * node below to use the touchscreen 252 */ 253 status = "disabled"; 254 }; 255 256}; 257 258&asrc0 { 259 fsl,asrc-rate = <48000>; 260}; 261 262&adc0 { 263 pinctrl-names = "default"; 264 pinctrl-0 = <&pinctrl_adc0>; 265}; 266 267&adc1 { 268 pinctrl-names = "default"; 269 pinctrl-0 = <&pinctrl_adc1>; 270}; 271 272/* TODO: Asynchronous Sample Rate Converter (ASRC) */ 273 274&cpu_alert0 { 275 temperature = <95000>; 276}; 277 278&cpu_alert1 { 279 temperature = <95000>; 280}; 281 282&cpu_crit0 { 283 temperature = <105000>; 284}; 285 286&cpu_crit1 { 287 temperature = <105000>; 288}; 289 290&drc_alert0 { 291 temperature = <95000>; 292}; 293 294&drc_crit0 { 295 temperature = <105000>; 296}; 297 298/* Apalis ETH1 */ 299&fec1 { 300 pinctrl-names = "default", "sleep"; 301 pinctrl-0 = <&pinctrl_fec1>; 302 pinctrl-1 = <&pinctrl_fec1_sleep>; 303 fsl,magic-packet; 304 phy-handle = <ðphy0>; 305 phy-mode = "rgmii-id"; 306 307 mdio { 308 #address-cells = <1>; 309 #size-cells = <0>; 310 311 ethphy0: ethernet-phy@7 { 312 compatible = "ethernet-phy-ieee802.3-c22"; 313 reg = <7>; 314 interrupt-parent = <&lsio_gpio1>; 315 interrupts = <29 IRQ_TYPE_LEVEL_LOW>; 316 micrel,led-mode = <0>; 317 reset-assert-us = <2>; 318 reset-deassert-us = <2>; 319 reset-gpios = <&lsio_gpio1 11 GPIO_ACTIVE_LOW>; 320 }; 321 }; 322}; 323 324/* Apalis CAN1 */ 325&flexcan1 { 326 pinctrl-names = "default"; 327 pinctrl-0 = <&pinctrl_flexcan1>; 328}; 329 330/* Apalis CAN2 */ 331&flexcan2 { 332 pinctrl-names = "default"; 333 pinctrl-0 = <&pinctrl_flexcan2>; 334}; 335 336/* Apalis CAN3 (optional) */ 337&flexcan3 { 338 pinctrl-names = "default"; 339 pinctrl-0 = <&pinctrl_flexcan3>; 340}; 341 342/* TODO: Apalis HDMI1 */ 343 344&gpu_alert0 { 345 temperature = <95000>; 346}; 347 348&gpu_alert1 { 349 temperature = <95000>; 350}; 351 352&gpu_crit0 { 353 temperature = <105000>; 354}; 355 356&gpu_crit1 { 357 temperature = <105000>; 358}; 359 360/* On-module I2C */ 361&i2c1 { 362 pinctrl-names = "default"; 363 pinctrl-0 = <&pinctrl_lpi2c1>; 364 #address-cells = <1>; 365 #size-cells = <0>; 366 clock-frequency = <100000>; 367 status = "okay"; 368 369 /* USB3503A */ 370 usb-hub@8 { 371 compatible = "smsc,usb3503a"; 372 reg = <0x08>; 373 pinctrl-names = "default"; 374 pinctrl-0 = <&pinctrl_usb3503a>; 375 connect-gpios = <&lsio_gpio0 31 GPIO_ACTIVE_LOW>; 376 initial-mode = <1>; 377 intn-gpios = <&lsio_gpio1 1 GPIO_ACTIVE_HIGH>; 378 refclk-frequency = <25000000>; 379 reset-gpios = <&lsio_gpio1 2 GPIO_ACTIVE_LOW>; 380 }; 381 382 /* On Module Audio Codec */ 383 sgtl5000: audio-codec@a { 384 compatible = "fsl,sgtl5000"; 385 reg = <0x0a>; 386 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, 387 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, 388 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, 389 <&mclkout0_lpcg IMX_LPCG_CLK_0>; 390 assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>; 391 clocks = <&mclkout0_lpcg IMX_LPCG_CLK_0>; 392 pinctrl-names = "default"; 393 pinctrl-0 = <&pinctrl_sgtl5000>; 394 #sound-dai-cells = <0>; 395 VDDA-supply = <®_module_3v3_avdd>; 396 VDDD-supply = <®_vref_1v8>; 397 VDDIO-supply = <®_module_3v3>; 398 }; 399}; 400 401/* Apalis I2C1 */ 402&i2c2 { 403 pinctrl-names = "default"; 404 pinctrl-0 = <&pinctrl_lpi2c2>; 405 #address-cells = <1>; 406 #size-cells = <0>; 407 clock-frequency = <100000>; 408 409 atmel_mxt_ts: touch@4a { 410 compatible = "atmel,maxtouch"; 411 reg = <0x4a>; 412 interrupt-parent = <&lsio_gpio4>; 413 interrupts = <1 IRQ_TYPE_EDGE_FALLING>; /* Apalis GPIO5 */ 414 pinctrl-names = "default"; 415 pinctrl-0 = <&pinctrl_gpio5>, <&pinctrl_gpio6>; 416 reset-gpios = <&lsio_gpio4 2 GPIO_ACTIVE_LOW>; /* Apalis GPIO6 */ 417 status = "disabled"; 418 }; 419 420 /* M41T0M6 real time clock on carrier board */ 421 rtc_i2c: rtc@68 { 422 compatible = "st,m41t0"; 423 reg = <0x68>; 424 status = "disabled"; 425 }; 426}; 427 428/* Apalis I2C3 (CAM) */ 429&i2c3 { 430 pinctrl-names = "default"; 431 pinctrl-0 = <&pinctrl_lpi2c3>; 432 #address-cells = <1>; 433 #size-cells = <0>; 434 clock-frequency = <100000>; 435}; 436 437&jpegdec { 438 status = "okay"; 439}; 440 441&jpegenc { 442 status = "okay"; 443}; 444 445/* TODO: Apalis LVDS1 */ 446 447/* Apalis SPI1 */ 448&lpspi0 { 449 pinctrl-names = "default"; 450 pinctrl-0 = <&pinctrl_lpspi0>; 451 #address-cells = <1>; 452 #size-cells = <0>; 453 cs-gpios = <&lsio_gpio3 5 GPIO_ACTIVE_LOW>; 454}; 455 456/* Apalis SPI2 */ 457&lpspi2 { 458 pinctrl-names = "default"; 459 pinctrl-0 = <&pinctrl_lpspi2>; 460 #address-cells = <1>; 461 #size-cells = <0>; 462 cs-gpios = <&lsio_gpio3 10 GPIO_ACTIVE_LOW>; 463}; 464 465/* Apalis UART3 */ 466&lpuart0 { 467 pinctrl-names = "default"; 468 pinctrl-0 = <&pinctrl_lpuart0>; 469}; 470 471/* Apalis UART1 */ 472&lpuart1 { 473 pinctrl-names = "default"; 474 pinctrl-0 = <&pinctrl_lpuart1>; 475}; 476 477/* Apalis UART4 */ 478&lpuart2 { 479 pinctrl-names = "default"; 480 pinctrl-0 = <&pinctrl_lpuart2>; 481}; 482 483/* Apalis UART2 */ 484&lpuart3 { 485 pinctrl-names = "default"; 486 pinctrl-0 = <&pinctrl_lpuart3>; 487}; 488 489&lsio_gpio0 { 490 gpio-line-names = "MXM3_279", 491 "MXM3_277", 492 "MXM3_135", 493 "MXM3_203", 494 "MXM3_201", 495 "MXM3_275", 496 "MXM3_110", 497 "MXM3_120", 498 "MXM3_1/GPIO1", 499 "MXM3_3/GPIO2", 500 "MXM3_124", 501 "MXM3_122", 502 "MXM3_5/GPIO3", 503 "MXM3_7/GPIO4", 504 "", 505 "", 506 "MXM3_4", 507 "MXM3_211", 508 "MXM3_209", 509 "MXM3_2", 510 "MXM3_136", 511 "MXM3_134", 512 "MXM3_6", 513 "MXM3_8", 514 "MXM3_112", 515 "MXM3_118", 516 "MXM3_114", 517 "MXM3_116"; 518}; 519 520&lsio_gpio1 { 521 gpio-line-names = "", 522 "", 523 "", 524 "", 525 "MXM3_286", 526 "", 527 "MXM3_87", 528 "MXM3_99", 529 "MXM3_138", 530 "MXM3_140", 531 "MXM3_239", 532 "", 533 "MXM3_281", 534 "MXM3_283", 535 "MXM3_126", 536 "MXM3_132", 537 "", 538 "", 539 "", 540 "", 541 "MXM3_173", 542 "MXM3_175", 543 "MXM3_123"; 544 545 hdmi-ctrl-hog { 546 pinctrl-names = "default"; 547 pinctrl-0 = <&pinctrl_hdmi_ctrl>; 548 gpio-hog; 549 gpios = <30 GPIO_ACTIVE_HIGH>; 550 line-name = "CONNECTOR_IS_HDMI"; 551 /* Set signals depending on HDP device type, 0 DP, 1 HDMI */ 552 output-high; 553 }; 554}; 555 556&lsio_gpio2 { 557 gpio-line-names = "", 558 "", 559 "", 560 "", 561 "", 562 "", 563 "", 564 "MXM3_198", 565 "MXM3_35", 566 "MXM3_164", 567 "", 568 "", 569 "", 570 "", 571 "MXM3_217", 572 "MXM3_215", 573 "", 574 "", 575 "MXM3_193", 576 "MXM3_194", 577 "MXM3_37", 578 "", 579 "MXM3_271", 580 "MXM3_273", 581 "MXM3_195", 582 "MXM3_197", 583 "MXM3_177", 584 "MXM3_179", 585 "MXM3_181", 586 "MXM3_183", 587 "MXM3_185", 588 "MXM3_187"; 589 590 pcie-wifi-hog { 591 pinctrl-names = "default"; 592 pinctrl-0 = <&pinctrl_pcie_wifi_refclk>; 593 gpio-hog; 594 gpios = <11 GPIO_ACTIVE_HIGH>; 595 line-name = "PCIE_WIFI_CLK"; 596 output-high; 597 }; 598}; 599 600&lsio_gpio3 { 601 gpio-line-names = "MXM3_191", 602 "", 603 "MXM3_221", 604 "MXM3_225", 605 "MXM3_223", 606 "MXM3_227", 607 "MXM3_200", 608 "MXM3_235", 609 "MXM3_231", 610 "MXM3_229", 611 "MXM3_233", 612 "MXM3_204", 613 "MXM3_196", 614 "", 615 "MXM3_202", 616 "", 617 "", 618 "", 619 "MXM3_305", 620 "MXM3_307", 621 "MXM3_309", 622 "MXM3_311", 623 "MXM3_315", 624 "MXM3_317", 625 "MXM3_319", 626 "MXM3_321", 627 "MXM3_15/GPIO7", 628 "MXM3_63", 629 "MXM3_17/GPIO8", 630 "MXM3_12", 631 "MXM3_14", 632 "MXM3_16"; 633}; 634 635&lsio_gpio4 { 636 gpio-line-names = "MXM3_18", 637 "MXM3_11/GPIO5", 638 "MXM3_13/GPIO6", 639 "MXM3_274", 640 "MXM3_84", 641 "MXM3_262", 642 "MXM3_96", 643 "", 644 "", 645 "", 646 "", 647 "", 648 "MXM3_190", 649 "", 650 "", 651 "", 652 "MXM3_269", 653 "MXM3_251", 654 "MXM3_253", 655 "MXM3_295", 656 "MXM3_299", 657 "MXM3_301", 658 "MXM3_297", 659 "MXM3_293", 660 "MXM3_291", 661 "MXM3_289", 662 "MXM3_287"; 663 664 /* Enable pcie root / sata ref clock unconditionally */ 665 pcie-sata-hog { 666 pinctrl-names = "default"; 667 pinctrl-0 = <&pinctrl_pcie_sata_refclk>; 668 gpio-hog; 669 gpios = <11 GPIO_ACTIVE_HIGH>; 670 line-name = "PCIE_SATA_CLK"; 671 output-high; 672 }; 673}; 674 675&lsio_gpio5 { 676 gpio-line-names = "", 677 "", 678 "", 679 "", 680 "", 681 "", 682 "", 683 "", 684 "", 685 "", 686 "", 687 "", 688 "", 689 "", 690 "MXM3_150", 691 "MXM3_160", 692 "MXM3_162", 693 "MXM3_144", 694 "MXM3_146", 695 "MXM3_148", 696 "MXM3_152", 697 "MXM3_156", 698 "MXM3_158", 699 "MXM3_159", 700 "MXM3_184", 701 "MXM3_180", 702 "MXM3_186", 703 "MXM3_188", 704 "MXM3_176", 705 "MXM3_178"; 706}; 707 708&lsio_gpio6 { 709 gpio-line-names = "", 710 "", 711 "", 712 "", 713 "", 714 "", 715 "", 716 "", 717 "", 718 "", 719 "MXM3_261", 720 "MXM3_263", 721 "MXM3_259", 722 "MXM3_257", 723 "MXM3_255", 724 "MXM3_128", 725 "MXM3_130", 726 "MXM3_265", 727 "MXM3_249", 728 "MXM3_247", 729 "MXM3_245", 730 "MXM3_243"; 731}; 732 733/* Apalis PWM3, MXM3 pin 6 */ 734&lsio_pwm0 { 735 pinctrl-names = "default"; 736 pinctrl-0 = <&pinctrl_pwm0>; 737 #pwm-cells = <3>; 738}; 739 740/* Apalis PWM4, MXM3 pin 8 */ 741&lsio_pwm1 { 742 pinctrl-names = "default"; 743 pinctrl-0 = <&pinctrl_pwm1>; 744 #pwm-cells = <3>; 745}; 746 747/* Apalis PWM1, MXM3 pin 2 */ 748&lsio_pwm2 { 749 pinctrl-names = "default"; 750 pinctrl-0 = <&pinctrl_pwm2>; 751 #pwm-cells = <3>; 752}; 753 754/* Apalis PWM2, MXM3 pin 4 */ 755&lsio_pwm3 { 756 pinctrl-names = "default"; 757 pinctrl-0 = <&pinctrl_pwm3>; 758 #pwm-cells = <3>; 759}; 760 761/* Messaging Units */ 762&mu_m0 { 763 status = "okay"; 764}; 765 766&mu1_m0 { 767 status = "okay"; 768}; 769 770&mu2_m0 { 771 status = "okay"; 772}; 773 774/* TODO: Apalis PCIE1 */ 775 776/* TODO: On-module Wi-Fi */ 777 778/* TODO: Apalis BKL1_PWM */ 779 780/* Apalis DAP1 */ 781&sai1 { 782 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, 783 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, 784 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, 785 <&sai1_lpcg IMX_LPCG_CLK_0>; 786 assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>; 787 pinctrl-names = "default"; 788 pinctrl-0 = <&pinctrl_sai1>; 789 #sound-dai-cells = <0>; 790 status = "okay"; 791}; 792 793/* TODO: Apalis SATA1 */ 794 795/* Apalis SPDIF1 */ 796&spdif0 { 797 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, 798 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, 799 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>; 800 assigned-clock-rates = <786432000>, <49152000>, <12288000>; 801 pinctrl-names = "default"; 802 pinctrl-0 = <&pinctrl_spdif0>; 803 status = "okay"; 804}; 805 806/* TODO: Thermal Zones */ 807 808/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ 809 810/* Apalis USBH4 */ 811&usb3_phy { 812 status = "okay"; 813}; 814 815&usbotg3 { 816 status = "okay"; 817}; 818 819&usbotg3_cdns3 { 820 dr_mode = "host"; 821}; 822 823/* Apalis USBO1 */ 824&usbphy1 { 825 phy-3p0-supply = <®_usb_phy>; 826 status = "okay"; 827}; 828 829&usbotg1 { 830 pinctrl-names = "default"; 831 pinctrl-0 = <&pinctrl_usbotg1>; 832 adp-disable; 833 hnp-disable; 834 over-current-active-low; 835 power-active-high; 836 srp-disable; 837}; 838 839/* On-module eMMC */ 840&usdhc1 { 841 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 842 pinctrl-0 = <&pinctrl_usdhc1>; 843 pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 844 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 845 bus-width = <8>; 846 non-removable; 847 status = "okay"; 848}; 849 850/* Apalis MMC1 */ 851&usdhc2 { 852 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 853 pinctrl-0 = <&pinctrl_usdhc2_4bit>, 854 <&pinctrl_usdhc2_8bit>, 855 <&pinctrl_mmc1_cd>; 856 pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, 857 <&pinctrl_usdhc2_8bit_100mhz>, 858 <&pinctrl_mmc1_cd>; 859 pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, 860 <&pinctrl_usdhc2_8bit_200mhz>, 861 <&pinctrl_mmc1_cd>; 862 pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, 863 <&pinctrl_usdhc2_8bit_sleep>, 864 <&pinctrl_mmc1_cd_sleep>; 865 bus-width = <8>; 866 cd-gpios = <&lsio_gpio2 9 GPIO_ACTIVE_LOW>; /* Apalis MMC1_CD# */ 867 no-1-8-v; 868}; 869 870/* Apalis SD1 */ 871&usdhc3 { 872 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 873 pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_sd1_cd>; 874 pinctrl-1 = <&pinctrl_usdhc3_100mhz>, <&pinctrl_sd1_cd>; 875 pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_sd1_cd>; 876 bus-width = <4>; 877 cd-gpios = <&lsio_gpio4 12 GPIO_ACTIVE_LOW>; /* Apalis SD1_CD# */ 878 no-1-8-v; 879}; 880 881/* Video Processing Unit */ 882&vpu { 883 compatible = "nxp,imx8qm-vpu"; 884 status = "okay"; 885}; 886 887&vpu_core0 { 888 reg = <0x2d080000 0x10000>; 889 memory-region = <&decoder_boot>, <&decoder_rpc>; 890 status = "okay"; 891}; 892 893&vpu_core1 { 894 reg = <0x2d090000 0x10000>; 895 memory-region = <&encoder1_boot>, <&encoder1_rpc>; 896 status = "okay"; 897}; 898 899&vpu_core2 { 900 reg = <0x2d0a0000 0x10000>; 901 memory-region = <&encoder2_boot>, <&encoder2_rpc>; 902 status = "okay"; 903}; 904 905&iomuxc { 906 pinctrl-names = "default"; 907 pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, 908 <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, 909 <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_keys>, 910 <&pinctrl_gpio_usbh_oc_n>, <&pinctrl_lpuart1ctrl>, 911 <&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>, 912 <&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>, 913 <&pinctrl_mlb_gpios>, <&pinctrl_qspi1a_gpios>, 914 <&pinctrl_sata1_act>, <&pinctrl_sim0_gpios>, 915 <&pinctrl_usdhc1_gpios>; 916 917 /* Apalis AN1_ADC */ 918 pinctrl_adc0: adc0grp { 919 fsl,pins = /* Apalis AN1_ADC0 */ 920 <IMX8QM_ADC_IN0_DMA_ADC0_IN0 0xc0000060>, 921 /* Apalis AN1_ADC1 */ 922 <IMX8QM_ADC_IN1_DMA_ADC0_IN1 0xc0000060>, 923 /* Apalis AN1_ADC2 */ 924 <IMX8QM_ADC_IN2_DMA_ADC0_IN2 0xc0000060>, 925 /* Apalis AN1_TSWIP_ADC3 */ 926 <IMX8QM_ADC_IN3_DMA_ADC0_IN3 0xc0000060>; 927 }; 928 929 /* Apalis AN1_TS */ 930 pinctrl_adc1: adc1grp { 931 fsl,pins = /* Apalis AN1_TSPX */ 932 <IMX8QM_ADC_IN4_DMA_ADC1_IN0 0xc0000060>, 933 /* Apalis AN1_TSMX */ 934 <IMX8QM_ADC_IN5_DMA_ADC1_IN1 0xc0000060>, 935 /* Apalis AN1_TSPY */ 936 <IMX8QM_ADC_IN6_DMA_ADC1_IN2 0xc0000060>, 937 /* Apalis AN1_TSMY */ 938 <IMX8QM_ADC_IN7_DMA_ADC1_IN3 0xc0000060>; 939 }; 940 941 /* Apalis CAM1 */ 942 pinctrl_cam1_gpios: cam1gpiosgrp { 943 fsl,pins = /* Apalis CAM1_D7 */ 944 <IMX8QM_MIPI_DSI1_I2C0_SCL_LSIO_GPIO1_IO20 0x00000021>, 945 /* Apalis CAM1_D6 */ 946 <IMX8QM_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_IO21 0x00000021>, 947 /* Apalis CAM1_D5 */ 948 <IMX8QM_ESAI0_TX0_LSIO_GPIO2_IO26 0x00000021>, 949 /* Apalis CAM1_D4 */ 950 <IMX8QM_ESAI0_TX1_LSIO_GPIO2_IO27 0x00000021>, 951 /* Apalis CAM1_D3 */ 952 <IMX8QM_ESAI0_TX2_RX3_LSIO_GPIO2_IO28 0x00000021>, 953 /* Apalis CAM1_D2 */ 954 <IMX8QM_ESAI0_TX3_RX2_LSIO_GPIO2_IO29 0x00000021>, 955 /* Apalis CAM1_D1 */ 956 <IMX8QM_ESAI0_TX4_RX1_LSIO_GPIO2_IO30 0x00000021>, 957 /* Apalis CAM1_D0 */ 958 <IMX8QM_ESAI0_TX5_RX0_LSIO_GPIO2_IO31 0x00000021>, 959 /* Apalis CAM1_PCLK */ 960 <IMX8QM_MCLK_IN0_LSIO_GPIO3_IO00 0x00000021>, 961 /* Apalis CAM1_MCLK */ 962 <IMX8QM_SPI3_SDO_LSIO_GPIO2_IO18 0x00000021>, 963 /* Apalis CAM1_VSYNC */ 964 <IMX8QM_ESAI0_SCKR_LSIO_GPIO2_IO24 0x00000021>, 965 /* Apalis CAM1_HSYNC */ 966 <IMX8QM_ESAI0_SCKT_LSIO_GPIO2_IO25 0x00000021>; 967 }; 968 969 /* Apalis DAP1 */ 970 pinctrl_dap1_gpios: dap1gpiosgrp { 971 fsl,pins = /* Apalis DAP1_MCLK */ 972 <IMX8QM_SPI3_SDI_LSIO_GPIO2_IO19 0x00000021>, 973 /* Apalis DAP1_D_OUT */ 974 <IMX8QM_SAI1_RXC_LSIO_GPIO3_IO12 0x00000021>, 975 /* Apalis DAP1_RESET */ 976 <IMX8QM_ESAI1_SCKT_LSIO_GPIO2_IO07 0x00000021>, 977 /* Apalis DAP1_BIT_CLK */ 978 <IMX8QM_SPI0_CS1_LSIO_GPIO3_IO06 0x00000021>, 979 /* Apalis DAP1_D_IN */ 980 <IMX8QM_SAI1_RXFS_LSIO_GPIO3_IO14 0x00000021>, 981 /* Apalis DAP1_SYNC */ 982 <IMX8QM_SPI2_CS1_LSIO_GPIO3_IO11 0x00000021>, 983 /* On-module Wi-Fi_I2S_EN# */ 984 <IMX8QM_ESAI1_TX5_RX0_LSIO_GPIO2_IO13 0x00000021>; 985 }; 986 987 /* Apalis LCD1_G1+2 */ 988 pinctrl_esai0_gpios: esai0gpiosgrp { 989 fsl,pins = /* Apalis LCD1_G1 */ 990 <IMX8QM_ESAI0_FSR_LSIO_GPIO2_IO22 0x00000021>, 991 /* Apalis LCD1_G2 */ 992 <IMX8QM_ESAI0_FST_LSIO_GPIO2_IO23 0x00000021>; 993 }; 994 995 /* On-module Gigabit Ethernet PHY Micrel KSZ9031 for Apalis GLAN */ 996 pinctrl_fec1: fec1grp { 997 fsl,pins = /* Use pads in 3.3V mode */ 998 <IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0>, 999 <IMX8QM_ENET0_MDC_CONN_ENET0_MDC 0x06000020>, 1000 <IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020>, 1001 <IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020>, 1002 <IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020>, 1003 <IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020>, 1004 <IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020>, 1005 <IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020>, 1006 <IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020>, 1007 <IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020>, 1008 <IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020>, 1009 <IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020>, 1010 <IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020>, 1011 <IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020>, 1012 <IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020>, 1013 <IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M 0x06000020>, 1014 /* On-module ETH_RESET# */ 1015 <IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x06000020>, 1016 /* On-module ETH_INT# */ 1017 <IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_IO29 0x04000060>; 1018 }; 1019 1020 pinctrl_fec1_sleep: fec1-sleepgrp { 1021 fsl,pins = <IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0>, 1022 <IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14 0x04000040>, 1023 <IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13 0x04000040>, 1024 <IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_IO31 0x04000040>, 1025 <IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30 0x04000040>, 1026 <IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO00 0x04000040>, 1027 <IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO01 0x04000040>, 1028 <IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO02 0x04000040>, 1029 <IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO03 0x04000040>, 1030 <IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04 0x04000040>, 1031 <IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_IO05 0x04000040>, 1032 <IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO06 0x04000040>, 1033 <IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO07 0x04000040>, 1034 <IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08 0x04000040>, 1035 <IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09 0x04000040>, 1036 <IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15 0x04000040>, 1037 <IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x06000020>, 1038 <IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_IO29 0x04000040>; 1039 }; 1040 1041 /* Apalis LCD1_ */ 1042 pinctrl_fec2_gpios: fec2gpiosgrp { 1043 fsl,pins = <IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD 0x000014a0>, 1044 /* Apalis LCD1_R1 */ 1045 <IMX8QM_ENET1_MDC_LSIO_GPIO4_IO18 0x00000021>, 1046 /* Apalis LCD1_R0 */ 1047 <IMX8QM_ENET1_MDIO_LSIO_GPIO4_IO17 0x00000021>, 1048 /* Apalis LCD1_G0 */ 1049 <IMX8QM_ENET1_REFCLK_125M_25M_LSIO_GPIO4_IO16 0x00000021>, 1050 /* Apalis LCD1_R7 */ 1051 <IMX8QM_ENET1_RGMII_RX_CTL_LSIO_GPIO6_IO17 0x00000021>, 1052 /* Apalis LCD1_DE */ 1053 <IMX8QM_ENET1_RGMII_RXD0_LSIO_GPIO6_IO18 0x00000021>, 1054 /* Apalis LCD1_HSYNC */ 1055 <IMX8QM_ENET1_RGMII_RXD1_LSIO_GPIO6_IO19 0x00000021>, 1056 /* Apalis LCD1_VSYNC */ 1057 <IMX8QM_ENET1_RGMII_RXD2_LSIO_GPIO6_IO20 0x00000021>, 1058 /* Apalis LCD1_PCLK */ 1059 <IMX8QM_ENET1_RGMII_RXD3_LSIO_GPIO6_IO21 0x00000021>, 1060 /* Apalis LCD1_R6 */ 1061 <IMX8QM_ENET1_RGMII_TX_CTL_LSIO_GPIO6_IO11 0x00000021>, 1062 /* Apalis LCD1_R5 */ 1063 <IMX8QM_ENET1_RGMII_TXC_LSIO_GPIO6_IO10 0x00000021>, 1064 /* Apalis LCD1_R4 */ 1065 <IMX8QM_ENET1_RGMII_TXD0_LSIO_GPIO6_IO12 0x00000021>, 1066 /* Apalis LCD1_R3 */ 1067 <IMX8QM_ENET1_RGMII_TXD1_LSIO_GPIO6_IO13 0x00000021>, 1068 /* Apalis LCD1_R2 */ 1069 <IMX8QM_ENET1_RGMII_TXD2_LSIO_GPIO6_IO14 0x00000021>; 1070 }; 1071 1072 /* Apalis CAN1 */ 1073 pinctrl_flexcan1: flexcan0grp { 1074 fsl,pins = <IMX8QM_FLEXCAN0_TX_DMA_FLEXCAN0_TX 0x00000021>, 1075 <IMX8QM_FLEXCAN0_RX_DMA_FLEXCAN0_RX 0x00000021>; 1076 }; 1077 1078 /* Apalis CAN2 */ 1079 pinctrl_flexcan2: flexcan1grp { 1080 fsl,pins = <IMX8QM_FLEXCAN1_TX_DMA_FLEXCAN1_TX 0x00000021>, 1081 <IMX8QM_FLEXCAN1_RX_DMA_FLEXCAN1_RX 0x00000021>; 1082 }; 1083 1084 /* Apalis CAN3 (optional) */ 1085 pinctrl_flexcan3: flexcan2grp { 1086 fsl,pins = <IMX8QM_FLEXCAN2_TX_DMA_FLEXCAN2_TX 0x00000021>, 1087 <IMX8QM_FLEXCAN2_RX_DMA_FLEXCAN2_RX 0x00000021>; 1088 }; 1089 1090 /* Apalis GPIO1 */ 1091 pinctrl_gpio1: gpio1grp { 1092 fsl,pins = <IMX8QM_M40_GPIO0_00_LSIO_GPIO0_IO08 0x06000021>; 1093 }; 1094 1095 /* Apalis GPIO2 */ 1096 pinctrl_gpio2: gpio2grp { 1097 fsl,pins = <IMX8QM_M40_GPIO0_01_LSIO_GPIO0_IO09 0x06000021>; 1098 }; 1099 1100 /* Apalis GPIO3 */ 1101 pinctrl_gpio3: gpio3grp { 1102 fsl,pins = <IMX8QM_M41_GPIO0_00_LSIO_GPIO0_IO12 0x06000021>; 1103 }; 1104 1105 /* Apalis GPIO4 */ 1106 pinctrl_gpio4: gpio4grp { 1107 fsl,pins = <IMX8QM_M41_GPIO0_01_LSIO_GPIO0_IO13 0x06000021>; 1108 }; 1109 1110 /* Apalis GPIO5 */ 1111 pinctrl_gpio5: gpio5grp { 1112 fsl,pins = <IMX8QM_FLEXCAN2_RX_LSIO_GPIO4_IO01 0x06000021>; 1113 }; 1114 1115 /* Apalis GPIO6 */ 1116 pinctrl_gpio6: gpio6grp { 1117 fsl,pins = <IMX8QM_FLEXCAN2_TX_LSIO_GPIO4_IO02 0x00000021>; 1118 }; 1119 1120 /* Apalis GPIO7 */ 1121 pinctrl_gpio7: gpio7grp { 1122 fsl,pins = <IMX8QM_MLB_SIG_LSIO_GPIO3_IO26 0x00000021>; 1123 }; 1124 1125 /* Apalis GPIO8 */ 1126 pinctrl_gpio8: gpio8grp { 1127 fsl,pins = <IMX8QM_MLB_DATA_LSIO_GPIO3_IO28 0x00000021>; 1128 }; 1129 1130 /* Apalis BKL1_ON */ 1131 pinctrl_gpio_bkl_on: gpiobklongrp { 1132 fsl,pins = <IMX8QM_LVDS0_GPIO00_LSIO_GPIO1_IO04 0x00000021>; 1133 }; 1134 1135 /* Apalis WAKE1_MICO */ 1136 pinctrl_gpio_keys: gpiokeysgrp { 1137 fsl,pins = <IMX8QM_SPI3_CS0_LSIO_GPIO2_IO20 0x06700021>; 1138 }; 1139 1140 /* Apalis USBH_OC# */ 1141 pinctrl_gpio_usbh_oc_n: gpiousbhocngrp { 1142 fsl,pins = <IMX8QM_USB_SS3_TC3_LSIO_GPIO4_IO06 0x04000021>; 1143 }; 1144 1145 /* On-module HDMI_CTRL */ 1146 pinctrl_hdmi_ctrl: hdmictrlgrp { 1147 fsl,pins = <IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 0x00000061>; 1148 }; 1149 1150 /* On-module I2C */ 1151 pinctrl_lpi2c1: lpi2c1grp { 1152 fsl,pins = <IMX8QM_GPT0_CLK_DMA_I2C1_SCL 0x04000020>, 1153 <IMX8QM_GPT0_CAPTURE_DMA_I2C1_SDA 0x04000020>; 1154 }; 1155 1156 /* Apalis I2C1 */ 1157 pinctrl_lpi2c2: lpi2c2grp { 1158 fsl,pins = <IMX8QM_GPT1_CLK_DMA_I2C2_SCL 0x04000020>, 1159 <IMX8QM_GPT1_CAPTURE_DMA_I2C2_SDA 0x04000020>; 1160 }; 1161 1162 /* Apalis I2C3 (CAM) */ 1163 pinctrl_lpi2c3: lpi2c3grp { 1164 fsl,pins = <IMX8QM_SIM0_PD_DMA_I2C3_SCL 0x04000020>, 1165 <IMX8QM_SIM0_POWER_EN_DMA_I2C3_SDA 0x04000020>; 1166 }; 1167 1168 /* Apalis SPI1 */ 1169 pinctrl_lpspi0: lpspi0grp { 1170 fsl,pins = <IMX8QM_SPI0_SCK_DMA_SPI0_SCK 0x0600004c>, 1171 <IMX8QM_SPI0_SDO_DMA_SPI0_SDO 0x0600004c>, 1172 <IMX8QM_SPI0_SDI_DMA_SPI0_SDI 0x0600004c>, 1173 <IMX8QM_SPI0_CS0_LSIO_GPIO3_IO05 0x0600004c>; 1174 }; 1175 1176 /* Apalis SPI2 */ 1177 pinctrl_lpspi2: lpspi2grp { 1178 fsl,pins = <IMX8QM_SPI2_SCK_DMA_SPI2_SCK 0x0600004c>, 1179 <IMX8QM_SPI2_SDO_DMA_SPI2_SDO 0x0600004c>, 1180 <IMX8QM_SPI2_SDI_DMA_SPI2_SDI 0x0600004c>, 1181 <IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10 0x0600004c>; 1182 }; 1183 1184 /* Apalis UART3 */ 1185 pinctrl_lpuart0: lpuart0grp { 1186 fsl,pins = <IMX8QM_UART0_RX_DMA_UART0_RX 0x06000020>, 1187 <IMX8QM_UART0_TX_DMA_UART0_TX 0x06000020>; 1188 }; 1189 1190 /* Apalis UART1 */ 1191 pinctrl_lpuart1: lpuart1grp { 1192 fsl,pins = <IMX8QM_UART1_RX_DMA_UART1_RX 0x06000020>, 1193 <IMX8QM_UART1_TX_DMA_UART1_TX 0x06000020>, 1194 <IMX8QM_UART1_CTS_B_DMA_UART1_CTS_B 0x06000020>, 1195 <IMX8QM_UART1_RTS_B_DMA_UART1_RTS_B 0x06000020>; 1196 }; 1197 1198 /* Apalis UART1 */ 1199 pinctrl_lpuart1ctrl: lpuart1ctrlgrp { 1200 fsl,pins = /* Apalis UART1_DTR */ 1201 <IMX8QM_M40_I2C0_SCL_LSIO_GPIO0_IO06 0x00000021>, 1202 /* Apalis UART1_DSR */ 1203 <IMX8QM_M40_I2C0_SDA_LSIO_GPIO0_IO07 0x00000021>, 1204 /* Apalis UART1_DCD */ 1205 <IMX8QM_M41_I2C0_SCL_LSIO_GPIO0_IO10 0x00000021>, 1206 /* Apalis UART1_RI */ 1207 <IMX8QM_M41_I2C0_SDA_LSIO_GPIO0_IO11 0x00000021>; 1208 }; 1209 1210 /* Apalis UART4 */ 1211 pinctrl_lpuart2: lpuart2grp { 1212 fsl,pins = <IMX8QM_LVDS0_I2C1_SCL_DMA_UART2_TX 0x06000020>, 1213 <IMX8QM_LVDS0_I2C1_SDA_DMA_UART2_RX 0x06000020>; 1214 }; 1215 1216 /* Apalis UART2 */ 1217 pinctrl_lpuart3: lpuart3grp { 1218 fsl,pins = <IMX8QM_LVDS1_I2C1_SCL_DMA_UART3_TX 0x06000020>, 1219 <IMX8QM_LVDS1_I2C1_SDA_DMA_UART3_RX 0x06000020>, 1220 <IMX8QM_ENET1_RGMII_TXD3_DMA_UART3_RTS_B 0x06000020>, 1221 <IMX8QM_ENET1_RGMII_RXC_DMA_UART3_CTS_B 0x06000020>; 1222 }; 1223 1224 /* Apalis TS_2 */ 1225 pinctrl_lvds0_i2c0_gpio: lvds0i2c0gpiogrp { 1226 fsl,pins = <IMX8QM_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06 0x00000021>; 1227 }; 1228 1229 /* Apalis LCD1_G6+7 */ 1230 pinctrl_lvds1_i2c0_gpios: lvds1i2c0gpiosgrp { 1231 fsl,pins = /* Apalis LCD1_G6 */ 1232 <IMX8QM_LVDS1_I2C0_SCL_LSIO_GPIO1_IO12 0x00000021>, 1233 /* Apalis LCD1_G7 */ 1234 <IMX8QM_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13 0x00000021>; 1235 }; 1236 1237 /* Apalis TS_3 */ 1238 pinctrl_mipi_dsi_0_1_en: mipidsi0-1engrp { 1239 fsl,pins = <IMX8QM_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07 0x00000021>; 1240 }; 1241 1242 /* Apalis TS_4 */ 1243 pinctrl_mipi_dsi1_gpios: mipidsi1gpiosgrp { 1244 fsl,pins = <IMX8QM_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO22 0x00000021>; 1245 }; 1246 1247 /* Apalis TS_1 */ 1248 pinctrl_mlb_gpios: mlbgpiosgrp { 1249 fsl,pins = <IMX8QM_MLB_CLK_LSIO_GPIO3_IO27 0x00000021>; 1250 }; 1251 1252 /* Apalis MMC1_CD# */ 1253 pinctrl_mmc1_cd: mmc1cdgrp { 1254 fsl,pins = <IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 0x00000021>; 1255 }; 1256 1257 pinctrl_mmc1_cd_sleep: mmc1cdsleepgrp { 1258 fsl,pins = <IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 0x04000021>; 1259 }; 1260 1261 /* On-module PCIe_Wi-Fi */ 1262 pinctrl_pcieb: pciebgrp { 1263 fsl,pins = <IMX8QM_PCIE_CTRL1_CLKREQ_B_LSIO_GPIO4_IO30 0x00000021>, 1264 <IMX8QM_PCIE_CTRL1_WAKE_B_LSIO_GPIO4_IO31 0x00000021>, 1265 <IMX8QM_PCIE_CTRL1_PERST_B_LSIO_GPIO5_IO00 0x00000021>; 1266 }; 1267 1268 /* On-module PCIe_CLK_EN1 */ 1269 pinctrl_pcie_sata_refclk: pciesatarefclkgrp { 1270 fsl,pins = <IMX8QM_USDHC2_WP_LSIO_GPIO4_IO11 0x00000021>; 1271 }; 1272 1273 /* On-module PCIe_CLK_EN2 */ 1274 pinctrl_pcie_wifi_refclk: pciewifirefclkgrp { 1275 fsl,pins = <IMX8QM_ESAI1_TX3_RX2_LSIO_GPIO2_IO11 0x00000021>; 1276 }; 1277 1278 /* Apalis PWM3 */ 1279 pinctrl_pwm0: pwm0grp { 1280 fsl,pins = <IMX8QM_UART0_RTS_B_LSIO_PWM0_OUT 0x00000020>; 1281 }; 1282 1283 /* Apalis PWM4 */ 1284 pinctrl_pwm1: pwm1grp { 1285 fsl,pins = <IMX8QM_UART0_CTS_B_LSIO_PWM1_OUT 0x00000020>; 1286 }; 1287 1288 /* Apalis PWM1 */ 1289 pinctrl_pwm2: pwm2grp { 1290 fsl,pins = <IMX8QM_GPT1_COMPARE_LSIO_PWM2_OUT 0x00000020>; 1291 }; 1292 1293 /* Apalis PWM2 */ 1294 pinctrl_pwm3: pwm3grp { 1295 fsl,pins = <IMX8QM_GPT0_COMPARE_LSIO_PWM3_OUT 0x00000020>; 1296 }; 1297 1298 /* Apalis BKL1_PWM */ 1299 pinctrl_pwm_bkl: pwmbklgrp { 1300 fsl,pins = <IMX8QM_LVDS1_GPIO00_LVDS1_PWM0_OUT 0x00000020>; 1301 }; 1302 1303 /* Apalis LCD1_ */ 1304 pinctrl_qspi1a_gpios: qspi1agpiosgrp { 1305 fsl,pins = /* Apalis LCD1_B0 */ 1306 <IMX8QM_QSPI1A_DATA0_LSIO_GPIO4_IO26 0x00000021>, 1307 /* Apalis LCD1_B1 */ 1308 <IMX8QM_QSPI1A_DATA1_LSIO_GPIO4_IO25 0x00000021>, 1309 /* Apalis LCD1_B2 */ 1310 <IMX8QM_QSPI1A_DATA2_LSIO_GPIO4_IO24 0x00000021>, 1311 /* Apalis LCD1_B3 */ 1312 <IMX8QM_QSPI1A_DATA3_LSIO_GPIO4_IO23 0x00000021>, 1313 /* Apalis LCD1_B5 */ 1314 <IMX8QM_QSPI1A_DQS_LSIO_GPIO4_IO22 0x00000021>, 1315 /* Apalis LCD1_B7 */ 1316 <IMX8QM_QSPI1A_SCLK_LSIO_GPIO4_IO21 0x00000021>, 1317 /* Apalis LCD1_B4 */ 1318 <IMX8QM_QSPI1A_SS0_B_LSIO_GPIO4_IO19 0x00000021>, 1319 /* Apalis LCD1_B6 */ 1320 <IMX8QM_QSPI1A_SS1_B_LSIO_GPIO4_IO20 0x00000021>; 1321 }; 1322 1323 /* On-module RESET_MOCI#_DRV */ 1324 pinctrl_reset_moci: resetmocigrp { 1325 fsl,pins = <IMX8QM_SCU_GPIO0_02_LSIO_GPIO0_IO30 0x00000021>; 1326 }; 1327 1328 /* On-module I2S SGTL5000 for Apalis Analogue Audio */ 1329 pinctrl_sai1: sai1grp { 1330 fsl,pins = <IMX8QM_SAI1_TXD_AUD_SAI1_TXD 0xc600006c>, 1331 <IMX8QM_SAI1_RXD_AUD_SAI1_RXD 0xc600004c>, 1332 <IMX8QM_SAI1_TXC_AUD_SAI1_TXC 0xc600004c>, 1333 <IMX8QM_SAI1_TXFS_AUD_SAI1_TXFS 0xc600004c>; 1334 }; 1335 1336 /* Apalis SATA1_ACT# */ 1337 pinctrl_sata1_act: sata1actgrp { 1338 fsl,pins = <IMX8QM_ESAI1_TX0_LSIO_GPIO2_IO08 0x00000021>; 1339 }; 1340 1341 /* Apalis SD1_CD# */ 1342 pinctrl_sd1_cd: sd1cdgrp { 1343 fsl,pins = <IMX8QM_USDHC2_CD_B_LSIO_GPIO4_IO12 0x00000021>; 1344 }; 1345 1346 /* On-module I2S SGTL5000 SYS_MCLK */ 1347 pinctrl_sgtl5000: sgtl5000grp { 1348 fsl,pins = <IMX8QM_MCLK_OUT0_AUD_ACM_MCLK_OUT0 0xc600004c>; 1349 }; 1350 1351 /* Apalis LCD1_ */ 1352 pinctrl_sim0_gpios: sim0gpiosgrp { 1353 fsl,pins = /* Apalis LCD1_G5 */ 1354 <IMX8QM_SIM0_CLK_LSIO_GPIO0_IO00 0x00000021>, 1355 /* Apalis LCD1_G3 */ 1356 <IMX8QM_SIM0_GPIO0_00_LSIO_GPIO0_IO05 0x00000021>, 1357 /* Apalis TS_5 */ 1358 <IMX8QM_SIM0_IO_LSIO_GPIO0_IO02 0x00000021>, 1359 /* Apalis LCD1_G4 */ 1360 <IMX8QM_SIM0_RST_LSIO_GPIO0_IO01 0x00000021>; 1361 }; 1362 1363 /* Apalis SPDIF */ 1364 pinctrl_spdif0: spdif0grp { 1365 fsl,pins = <IMX8QM_SPDIF0_TX_AUD_SPDIF0_TX 0xc6000040>, 1366 <IMX8QM_SPDIF0_RX_AUD_SPDIF0_RX 0xc6000040>; 1367 }; 1368 1369 pinctrl_touchctrl_gpios: touchctrlgpiosgrp { 1370 fsl,pins = <IMX8QM_ESAI1_FSR_LSIO_GPIO2_IO04 0x00000021>, 1371 <IMX8QM_ESAI1_FST_LSIO_GPIO2_IO05 0x00000041>, 1372 <IMX8QM_SPI3_SCK_LSIO_GPIO2_IO17 0x00000021>, 1373 <IMX8QM_SPI3_CS1_LSIO_GPIO2_IO21 0x00000041>; 1374 }; 1375 1376 pinctrl_touchctrl_idle: touchctrlidlegrp { 1377 fsl,pins = <IMX8QM_ADC_IN4_LSIO_GPIO3_IO22 0x00000021>, 1378 <IMX8QM_ADC_IN5_LSIO_GPIO3_IO23 0x00000021>, 1379 <IMX8QM_ADC_IN6_LSIO_GPIO3_IO24 0x00000021>, 1380 <IMX8QM_ADC_IN7_LSIO_GPIO3_IO25 0x00000021>; 1381 }; 1382 1383 /* On-module USB HSIC HUB (active) */ 1384 pinctrl_usb_hsic_active: usbh1activegrp { 1385 fsl,pins = <IMX8QM_USB_HSIC0_DATA_CONN_USB_HSIC0_DATA 0x000000cf>, 1386 <IMX8QM_USB_HSIC0_STROBE_CONN_USB_HSIC0_STROBE 0x000000ff>; 1387 }; 1388 1389 /* On-module USB HSIC HUB (idle) */ 1390 pinctrl_usb_hsic_idle: usbh1idlegrp { 1391 fsl,pins = <IMX8QM_USB_HSIC0_DATA_CONN_USB_HSIC0_DATA 0x000000cf>, 1392 <IMX8QM_USB_HSIC0_STROBE_CONN_USB_HSIC0_STROBE 0x000000cf>; 1393 }; 1394 1395 /* On-module USB HSIC HUB */ 1396 pinctrl_usb3503a: usb3503agrp { 1397 fsl,pins = /* On-module HSIC_HUB_CONNECT */ 1398 <IMX8QM_SCU_GPIO0_03_LSIO_GPIO0_IO31 0x00000041>, 1399 /* On-module HSIC_INT_N */ 1400 <IMX8QM_SCU_GPIO0_05_LSIO_GPIO1_IO01 0x00000021>, 1401 /* On-module HSIC_RESET_N */ 1402 <IMX8QM_SCU_GPIO0_06_LSIO_GPIO1_IO02 0x00000041>; 1403 }; 1404 1405 /* Apalis USBH_EN */ 1406 pinctrl_usbh_en: usbhengrp { 1407 fsl,pins = <IMX8QM_USB_SS3_TC1_LSIO_GPIO4_IO04 0x00000021>; 1408 }; 1409 1410 /* Apalis USBO1 */ 1411 pinctrl_usbotg1: usbotg1grp { 1412 fsl,pins = /* Apalis USBO1_EN */ 1413 <IMX8QM_USB_SS3_TC0_CONN_USB_OTG1_PWR 0x00000021>, 1414 /* Apalis USBO1_OC# */ 1415 <IMX8QM_USB_SS3_TC2_CONN_USB_OTG1_OC 0x04000021>; 1416 }; 1417 1418 /* On-module eMMC */ 1419 pinctrl_usdhc1: usdhc1grp { 1420 fsl,pins = <IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041>, 1421 <IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021>, 1422 <IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021>, 1423 <IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021>, 1424 <IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021>, 1425 <IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021>, 1426 <IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021>, 1427 <IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021>, 1428 <IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021>, 1429 <IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021>, 1430 <IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000041>, 1431 <IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000021>; 1432 }; 1433 1434 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 1435 fsl,pins = <IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 0x06000040>, 1436 <IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD 0x00000020>, 1437 <IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000020>, 1438 <IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000020>, 1439 <IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000020>, 1440 <IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000020>, 1441 <IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000020>, 1442 <IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020>, 1443 <IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020>, 1444 <IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020>, 1445 <IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000040>, 1446 <IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000020>; 1447 }; 1448 1449 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 1450 fsl,pins = <IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 0x06000040>, 1451 <IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD 0x00000020>, 1452 <IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000020>, 1453 <IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000020>, 1454 <IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000020>, 1455 <IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000020>, 1456 <IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000020>, 1457 <IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020>, 1458 <IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020>, 1459 <IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020>, 1460 <IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000040>, 1461 <IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000020>; 1462 }; 1463 1464 /* Apalis TS_6 */ 1465 pinctrl_usdhc1_gpios: usdhc1gpiosgrp { 1466 fsl,pins = <IMX8QM_USDHC1_STROBE_LSIO_GPIO5_IO23 0x00000021>; 1467 }; 1468 1469 /* Apalis MMC1 */ 1470 pinctrl_usdhc2_4bit: usdhc2grp4bitgrp { 1471 fsl,pins = <IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041>, 1472 <IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021>, 1473 <IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021>, 1474 <IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021>, 1475 <IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021>, 1476 <IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021>, 1477 /* On-module PMIC use */ 1478 <IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021>; 1479 }; 1480 1481 pinctrl_usdhc2_4bit_100mhz: usdhc2-4bit100mhzgrp { 1482 fsl,pins = <IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000040>, 1483 <IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000020>, 1484 <IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000020>, 1485 <IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000020>, 1486 <IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000020>, 1487 <IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000020>, 1488 /* On-module PMIC use */ 1489 <IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021>; 1490 }; 1491 1492 pinctrl_usdhc2_4bit_200mhz: usdhc2-4bit200mhzgrp { 1493 fsl,pins = <IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000040>, 1494 <IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000020>, 1495 <IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000020>, 1496 <IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000020>, 1497 <IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000020>, 1498 <IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000020>, 1499 /* On-module PMIC use */ 1500 <IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021>; 1501 }; 1502 1503 pinctrl_usdhc2_8bit: usdhc2grp8bitgrp { 1504 fsl,pins = <IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 0x00000021>, 1505 <IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 0x00000021>, 1506 <IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 0x00000021>, 1507 <IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 0x00000021>; 1508 }; 1509 1510 pinctrl_usdhc2_8bit_100mhz: usdhc2-8bit100mhzgrp { 1511 fsl,pins = <IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 0x00000020>, 1512 <IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 0x00000020>, 1513 <IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 0x00000020>, 1514 <IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 0x00000020>; 1515 }; 1516 1517 pinctrl_usdhc2_8bit_200mhz: usdhc2-8bit200mhzgrp { 1518 fsl,pins = <IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 0x00000020>, 1519 <IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 0x00000020>, 1520 <IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 0x00000020>, 1521 <IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 0x00000020>; 1522 }; 1523 1524 pinctrl_usdhc2_4bit_sleep: usdhc2-4bitsleepgrp { 1525 fsl,pins = <IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x04000061>, 1526 <IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x04000061>, 1527 <IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x04000061>, 1528 <IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x04000061>, 1529 <IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x04000061>, 1530 <IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x04000061>, 1531 /* On-module PMIC use */ 1532 <IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021>; 1533 }; 1534 1535 pinctrl_usdhc2_8bit_sleep: usdhc2-8bitsleepgrp { 1536 fsl,pins = <IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 0x04000061>, 1537 <IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 0x04000061>, 1538 <IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 0x04000061>, 1539 <IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 0x04000061>; 1540 }; 1541 1542 /* Apalis SD1 */ 1543 pinctrl_usdhc3: usdhc3grp { 1544 fsl,pins = <IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041>, 1545 <IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021>, 1546 <IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021>, 1547 <IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021>, 1548 <IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021>, 1549 <IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021>, 1550 /* On-module PMIC use */ 1551 <IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021>; 1552 }; 1553 1554 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 1555 fsl,pins = <IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041>, 1556 <IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021>, 1557 <IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021>, 1558 <IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021>, 1559 <IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021>, 1560 <IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021>, 1561 /* On-module PMIC use */ 1562 <IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021>; 1563 }; 1564 1565 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 1566 fsl,pins = <IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041>, 1567 <IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021>, 1568 <IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021>, 1569 <IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021>, 1570 <IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021>, 1571 <IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021>, 1572 /* On-module PMIC use */ 1573 <IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021>; 1574 }; 1575 1576 /* On-module Wi-Fi */ 1577 pinctrl_wifi: wifigrp { 1578 fsl,pins = /* On-module Wi-Fi_SUSCLK_32k */ 1579 <IMX8QM_SCU_GPIO0_07_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x06000021>, 1580 /* On-module Wi-Fi_PCIE_W_DISABLE */ 1581 <IMX8QM_MIPI_CSI0_MCLK_OUT_LSIO_GPIO1_IO24 0x06000021>; 1582 }; 1583 1584 pinctrl_wifi_pdn: wifipdngrp { 1585 fsl,pins = /* On-module Wi-Fi_POWER_DOWN */ 1586 <IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28 0x06000021>; 1587 }; 1588}; 1589