1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2/* 3 * Copyright 2022 Toradex 4 */ 5 6#include <dt-bindings/pwm/pwm.h> 7 8/ { 9 chosen { 10 stdout-path = &lpuart1; 11 }; 12 13 /* Apalis BKL1 */ 14 backlight: backlight { 15 compatible = "pwm-backlight"; 16 pinctrl-names = "default"; 17 pinctrl-0 = <&pinctrl_gpio_bkl_on>; 18 brightness-levels = <0 45 63 88 119 158 203 255>; 19 default-brightness-level = <4>; 20 enable-gpios = <&lsio_gpio1 4 GPIO_ACTIVE_HIGH>; /* Apalis BKL1_ON */ 21 /* TODO: hook-up to Apalis BKL1_PWM */ 22 status = "disabled"; 23 }; 24 25 gpio_fan: gpio-fan { 26 compatible = "gpio-fan"; 27 pinctrl-names = "default"; 28 pinctrl-0 = <&pinctrl_gpio8>; 29 gpios = <&lsio_gpio3 28 GPIO_ACTIVE_HIGH>; 30 gpio-fan,speed-map = < 0 0 31 3000 1>; 32 }; 33 34 /* TODO: LVDS Panel */ 35 36 /* TODO: Shared PCIe/SATA Reference Clock */ 37 38 /* TODO: PCIe Wi-Fi Reference Clock */ 39 40 /* 41 * Power management bus used to control LDO1OUT of the 42 * second PMIC PF8100. This is used for controlling voltage levels of 43 * typespecific RGMII signals and Apalis UART2_RTS UART2_CTS. 44 * 45 * IMX_SC_R_BOARD_R1 for 3.3V 46 * IMX_SC_R_BOARD_R2 for 1.8V 47 * IMX_SC_R_BOARD_R3 for 2.5V 48 * Note that for 2.5V operation the pad muxing needs to be changed, 49 * compare with PSW_OVR field of IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD. 50 * 51 * those power domains are mutually exclusive. 52 */ 53 reg_ext_rgmii: regulator-ext-rgmii { 54 compatible = "regulator-fixed"; 55 power-domains = <&pd IMX_SC_R_BOARD_R1>; 56 regulator-max-microvolt = <3300000>; 57 regulator-min-microvolt = <3300000>; 58 regulator-name = "VDD_EXT_RGMII (LDO1)"; 59 60 regulator-state-mem { 61 regulator-off-in-suspend; 62 }; 63 }; 64 65 reg_module_3v3: regulator-module-3v3 { 66 compatible = "regulator-fixed"; 67 regulator-max-microvolt = <3300000>; 68 regulator-min-microvolt = <3300000>; 69 regulator-name = "+V3.3"; 70 }; 71 72 reg_module_3v3_avdd: regulator-module-3v3-avdd { 73 compatible = "regulator-fixed"; 74 regulator-max-microvolt = <3300000>; 75 regulator-min-microvolt = <3300000>; 76 regulator-name = "+V3.3_AUDIO"; 77 }; 78 79 reg_module_wifi: regulator-module-wifi { 80 compatible = "regulator-fixed"; 81 pinctrl-names = "default"; 82 pinctrl-0 = <&pinctrl_wifi_pdn>; 83 gpio = <&lsio_gpio1 28 GPIO_ACTIVE_HIGH>; 84 enable-active-high; 85 regulator-always-on; 86 regulator-name = "wifi_pwrdn_fake_regulator"; 87 regulator-settling-time-us = <100>; 88 }; 89 90 reg_pcie_switch: regulator-pcie-switch { 91 compatible = "regulator-fixed"; 92 pinctrl-names = "default"; 93 pinctrl-0 = <&pinctrl_gpio7>; 94 gpio = <&lsio_gpio3 26 GPIO_ACTIVE_HIGH>; 95 enable-active-high; 96 regulator-max-microvolt = <1800000>; 97 regulator-min-microvolt = <1800000>; 98 regulator-name = "pcie_switch"; 99 startup-delay-us = <100000>; 100 }; 101 102 reg_usb_host_vbus: regulator-usb-host-vbus { 103 compatible = "regulator-fixed"; 104 pinctrl-names = "default"; 105 pinctrl-0 = <&pinctrl_usbh_en>; 106 /* Apalis USBH_EN */ 107 gpio = <&lsio_gpio4 4 GPIO_ACTIVE_HIGH>; 108 enable-active-high; 109 regulator-always-on; 110 regulator-max-microvolt = <5000000>; 111 regulator-min-microvolt = <5000000>; 112 regulator-name = "usb-host-vbus"; 113 }; 114 115 reg_usb_hsic: regulator-usb-hsic { 116 compatible = "regulator-fixed"; 117 regulator-max-microvolt = <3000000>; 118 regulator-min-microvolt = <3000000>; 119 regulator-name = "usb-hsic-dummy"; 120 }; 121 122 reg_usb_phy: regulator-usb-hsic1 { 123 compatible = "regulator-fixed"; 124 regulator-max-microvolt = <3000000>; 125 regulator-min-microvolt = <3000000>; 126 regulator-name = "usb-phy-dummy"; 127 }; 128 129 reg_vref_1v8: regulator-vref-1v8 { 130 compatible = "regulator-fixed"; 131 regulator-name = "+V1.8"; 132 regulator-min-microvolt = <1800000>; 133 regulator-max-microvolt = <1800000>; 134 }; 135 136 reserved-memory { 137 #address-cells = <2>; 138 #size-cells = <2>; 139 ranges; 140 141 decoder_boot: decoder-boot@84000000 { 142 reg = <0 0x84000000 0 0x2000000>; 143 no-map; 144 }; 145 146 encoder1_boot: encoder1-boot@86000000 { 147 reg = <0 0x86000000 0 0x200000>; 148 no-map; 149 }; 150 151 encoder2_boot: encoder2-boot@86200000 { 152 reg = <0 0x86200000 0 0x200000>; 153 no-map; 154 }; 155 156 /* 157 * reserved-memory layout 158 * 0x8800_0000 ~ 0x8FFF_FFFF is reserved for M4 159 * Shouldn't be used at A core and Linux side. 160 * 161 */ 162 m4_reserved: m4@88000000 { 163 reg = <0 0x88000000 0 0x8000000>; 164 no-map; 165 }; 166 167 rpmsg_reserved: rpmsg@90200000 { 168 reg = <0 0x90200000 0 0x200000>; 169 no-map; 170 }; 171 172 vdevbuffer: vdevbuffer@90400000 { 173 compatible = "shared-dma-pool"; 174 reg = <0 0x90400000 0 0x100000>; 175 no-map; 176 }; 177 178 decoder_rpc: decoder-rpc@92000000 { 179 reg = <0 0x92000000 0 0x200000>; 180 no-map; 181 }; 182 183 dsp_reserved: dsp@92400000 { 184 reg = <0 0x92400000 0 0x2000000>; 185 no-map; 186 }; 187 188 encoder1_rpc: encoder1-rpc@94400000 { 189 reg = <0 0x94400000 0 0x700000>; 190 no-map; 191 }; 192 193 encoder2_rpc: encoder2-rpc@94b00000 { 194 reg = <0 0x94b00000 0 0x700000>; 195 no-map; 196 }; 197 198 /* global autoconfigured region for contiguous allocations */ 199 linux,cma { 200 compatible = "shared-dma-pool"; 201 alloc-ranges = <0 0xc0000000 0 0x3c000000>; 202 linux,cma-default; 203 reusable; 204 size = <0 0x3c000000>; 205 }; 206 }; 207 208 sound { 209 compatible = "simple-audio-card"; 210 simple-audio-card,bitclock-master = <&dailink_master>; 211 simple-audio-card,format = "i2s"; 212 simple-audio-card,frame-master = <&dailink_master>; 213 simple-audio-card,name = "apalis-imx8qm"; 214 215 simple-audio-card,cpu { 216 sound-dai = <&sai1>; 217 }; 218 219 dailink_master: simple-audio-card,codec { 220 sound-dai = <&sgtl5000>; 221 }; 222 }; 223 224 /* TODO: HDMI Audio */ 225 226 /* Apalis SPDIF1 */ 227 sound-spdif { 228 compatible = "fsl,imx-audio-spdif"; 229 model = "imx-spdif"; 230 spdif-controller = <&spdif0>; 231 spdif-in; 232 spdif-out; 233 }; 234 235 touchscreen: touchscreen { 236 compatible = "toradex,vf50-touchscreen"; 237 interrupt-parent = <&lsio_gpio3>; 238 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; 239 pinctrl-names = "idle", "default"; 240 pinctrl-0 = <&pinctrl_touchctrl_idle>, <&pinctrl_touchctrl_gpios>; 241 pinctrl-1 = <&pinctrl_adc1>, <&pinctrl_touchctrl_gpios>; 242 io-channels = <&adc1 2>, <&adc1 1>, 243 <&adc1 0>, <&adc1 3>; 244 vf50-ts-min-pressure = <200>; 245 xp-gpios = <&lsio_gpio2 4 GPIO_ACTIVE_LOW>; 246 xm-gpios = <&lsio_gpio2 5 GPIO_ACTIVE_HIGH>; 247 yp-gpios = <&lsio_gpio2 17 GPIO_ACTIVE_LOW>; 248 ym-gpios = <&lsio_gpio2 21 GPIO_ACTIVE_HIGH>; 249 /* 250 * NOTE: you must remove the pinctrl-adc1 from the adc1 251 * node below to use the touchscreen 252 */ 253 status = "disabled"; 254 }; 255 256}; 257 258&asrc0 { 259 fsl,asrc-rate = <48000>; 260}; 261 262&adc0 { 263 pinctrl-names = "default"; 264 pinctrl-0 = <&pinctrl_adc0>; 265}; 266 267&adc1 { 268 pinctrl-names = "default"; 269 pinctrl-0 = <&pinctrl_adc1>; 270}; 271 272/* TODO: Asynchronous Sample Rate Converter (ASRC) */ 273 274&cpu_alert0 { 275 temperature = <95000>; 276}; 277 278&cpu_alert1 { 279 temperature = <95000>; 280}; 281 282&cpu_crit0 { 283 temperature = <105000>; 284}; 285 286&cpu_crit1 { 287 temperature = <105000>; 288}; 289 290&drc_alert0 { 291 temperature = <95000>; 292}; 293 294&drc_crit0 { 295 temperature = <105000>; 296}; 297 298/* Apalis ETH1 */ 299&fec1 { 300 pinctrl-names = "default", "sleep"; 301 pinctrl-0 = <&pinctrl_fec1>; 302 pinctrl-1 = <&pinctrl_fec1_sleep>; 303 fsl,magic-packet; 304 phy-handle = <ðphy0>; 305 phy-mode = "rgmii-id"; 306 307 mdio { 308 #address-cells = <1>; 309 #size-cells = <0>; 310 311 ethphy0: ethernet-phy@7 { 312 compatible = "ethernet-phy-ieee802.3-c22"; 313 reg = <7>; 314 interrupt-parent = <&lsio_gpio1>; 315 interrupts = <29 IRQ_TYPE_LEVEL_LOW>; 316 micrel,led-mode = <0>; 317 reset-assert-us = <2>; 318 reset-deassert-us = <2>; 319 reset-gpios = <&lsio_gpio1 11 GPIO_ACTIVE_LOW>; 320 }; 321 }; 322}; 323 324/* Apalis CAN1 */ 325&flexcan1 { 326 pinctrl-names = "default"; 327 pinctrl-0 = <&pinctrl_flexcan1>; 328}; 329 330/* Apalis CAN2 */ 331&flexcan2 { 332 pinctrl-names = "default"; 333 pinctrl-0 = <&pinctrl_flexcan2>; 334}; 335 336/* Apalis CAN3 (optional) */ 337&flexcan3 { 338 pinctrl-names = "default"; 339 pinctrl-0 = <&pinctrl_flexcan3>; 340}; 341 342&hsio_phy { 343 fsl,hsio-cfg = "pciea-pcieb-sata"; 344 fsl,refclk-pad-mode = "input"; 345 status = "okay"; 346}; 347 348&hsio_refa_clk { 349 pinctrl-names = "default"; 350 pinctrl-0 = <&pinctrl_pcie_sata_refclk>; 351 enable-gpios = <&lsio_gpio4 11 GPIO_ACTIVE_HIGH>; 352}; 353 354&hsio_refb_clk { 355 pinctrl-names = "default"; 356 pinctrl-0 = <&pinctrl_pcie_wifi_refclk>; 357 clocks = <&hsio_refa_clk>; 358 enable-gpios = <&lsio_gpio2 11 GPIO_ACTIVE_HIGH>; 359}; 360 361/* TODO: Apalis HDMI1 */ 362 363&gpu_alert0 { 364 temperature = <95000>; 365}; 366 367&gpu_alert1 { 368 temperature = <95000>; 369}; 370 371&gpu_crit0 { 372 temperature = <105000>; 373}; 374 375&gpu_crit1 { 376 temperature = <105000>; 377}; 378 379/* On-module I2C */ 380&i2c1 { 381 pinctrl-names = "default"; 382 pinctrl-0 = <&pinctrl_lpi2c1>; 383 #address-cells = <1>; 384 #size-cells = <0>; 385 clock-frequency = <100000>; 386 status = "okay"; 387 388 /* USB3503A */ 389 usb-hub@8 { 390 compatible = "smsc,usb3503a"; 391 reg = <0x08>; 392 pinctrl-names = "default"; 393 pinctrl-0 = <&pinctrl_usb3503a>; 394 connect-gpios = <&lsio_gpio0 31 GPIO_ACTIVE_LOW>; 395 initial-mode = <1>; 396 intn-gpios = <&lsio_gpio1 1 GPIO_ACTIVE_HIGH>; 397 refclk-frequency = <25000000>; 398 reset-gpios = <&lsio_gpio1 2 GPIO_ACTIVE_LOW>; 399 }; 400 401 /* On Module Audio Codec */ 402 sgtl5000: audio-codec@a { 403 compatible = "fsl,sgtl5000"; 404 reg = <0x0a>; 405 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, 406 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, 407 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, 408 <&mclkout0_lpcg IMX_LPCG_CLK_0>; 409 assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>; 410 clocks = <&mclkout0_lpcg IMX_LPCG_CLK_0>; 411 pinctrl-names = "default"; 412 pinctrl-0 = <&pinctrl_sgtl5000>; 413 #sound-dai-cells = <0>; 414 VDDA-supply = <®_module_3v3_avdd>; 415 VDDD-supply = <®_vref_1v8>; 416 VDDIO-supply = <®_module_3v3>; 417 }; 418}; 419 420/* Apalis I2C1 */ 421&i2c2 { 422 pinctrl-names = "default"; 423 pinctrl-0 = <&pinctrl_lpi2c2>; 424 #address-cells = <1>; 425 #size-cells = <0>; 426 clock-frequency = <100000>; 427 428 atmel_mxt_ts: touch@4a { 429 compatible = "atmel,maxtouch"; 430 reg = <0x4a>; 431 interrupt-parent = <&lsio_gpio4>; 432 interrupts = <1 IRQ_TYPE_EDGE_FALLING>; /* Apalis GPIO5 */ 433 pinctrl-names = "default"; 434 pinctrl-0 = <&pinctrl_gpio5>, <&pinctrl_gpio6>; 435 reset-gpios = <&lsio_gpio4 2 GPIO_ACTIVE_LOW>; /* Apalis GPIO6 */ 436 status = "disabled"; 437 }; 438 439 /* M41T0M6 real time clock on carrier board */ 440 rtc_i2c: rtc@68 { 441 compatible = "st,m41t0"; 442 reg = <0x68>; 443 status = "disabled"; 444 }; 445}; 446 447/* Apalis I2C3 (CAM) */ 448&i2c3 { 449 pinctrl-names = "default"; 450 pinctrl-0 = <&pinctrl_lpi2c3>; 451 #address-cells = <1>; 452 #size-cells = <0>; 453 clock-frequency = <100000>; 454}; 455 456&jpegdec { 457 status = "okay"; 458}; 459 460&jpegenc { 461 status = "okay"; 462}; 463 464/* TODO: Apalis LVDS1 */ 465 466/* Apalis SPI1 */ 467&lpspi0 { 468 pinctrl-names = "default"; 469 pinctrl-0 = <&pinctrl_lpspi0>; 470 #address-cells = <1>; 471 #size-cells = <0>; 472 cs-gpios = <&lsio_gpio3 5 GPIO_ACTIVE_LOW>; 473}; 474 475/* Apalis SPI2 */ 476&lpspi2 { 477 pinctrl-names = "default"; 478 pinctrl-0 = <&pinctrl_lpspi2>; 479 #address-cells = <1>; 480 #size-cells = <0>; 481 cs-gpios = <&lsio_gpio3 10 GPIO_ACTIVE_LOW>; 482}; 483 484/* Apalis UART3 */ 485&lpuart0 { 486 pinctrl-names = "default"; 487 pinctrl-0 = <&pinctrl_lpuart0>; 488}; 489 490/* Apalis UART1 */ 491&lpuart1 { 492 pinctrl-names = "default"; 493 pinctrl-0 = <&pinctrl_lpuart1>; 494}; 495 496/* Apalis UART4 */ 497&lpuart2 { 498 pinctrl-names = "default"; 499 pinctrl-0 = <&pinctrl_lpuart2>; 500}; 501 502/* Apalis UART2 */ 503&lpuart3 { 504 pinctrl-names = "default"; 505 pinctrl-0 = <&pinctrl_lpuart3>; 506}; 507 508&lsio_gpio0 { 509 gpio-line-names = "MXM3_279", 510 "MXM3_277", 511 "MXM3_135", 512 "MXM3_203", 513 "MXM3_201", 514 "MXM3_275", 515 "MXM3_110", 516 "MXM3_120", 517 "MXM3_1/GPIO1", 518 "MXM3_3/GPIO2", 519 "MXM3_124", 520 "MXM3_122", 521 "MXM3_5/GPIO3", 522 "MXM3_7/GPIO4", 523 "", 524 "", 525 "MXM3_4", 526 "MXM3_211", 527 "MXM3_209", 528 "MXM3_2", 529 "MXM3_136", 530 "MXM3_134", 531 "MXM3_6", 532 "MXM3_8", 533 "MXM3_112", 534 "MXM3_118", 535 "MXM3_114", 536 "MXM3_116", 537 "", 538 "", 539 "MXM3_26"; 540}; 541 542&lsio_gpio1 { 543 gpio-line-names = "", 544 "", 545 "", 546 "", 547 "MXM3_286", 548 "", 549 "MXM3_87", 550 "MXM3_99", 551 "MXM3_138", 552 "MXM3_140", 553 "MXM3_239", 554 "", 555 "MXM3_281", 556 "MXM3_283", 557 "MXM3_126", 558 "MXM3_132", 559 "", 560 "", 561 "", 562 "", 563 "MXM3_173", 564 "MXM3_175", 565 "MXM3_123"; 566 567 hdmi-ctrl-hog { 568 pinctrl-names = "default"; 569 pinctrl-0 = <&pinctrl_hdmi_ctrl>; 570 gpio-hog; 571 gpios = <30 GPIO_ACTIVE_HIGH>; 572 line-name = "CONNECTOR_IS_HDMI"; 573 /* Set signals depending on HDP device type, 0 DP, 1 HDMI */ 574 output-high; 575 }; 576}; 577 578&lsio_gpio2 { 579 gpio-line-names = "", 580 "", 581 "", 582 "", 583 "", 584 "", 585 "", 586 "MXM3_198", 587 "MXM3_35", 588 "MXM3_164", 589 "", 590 "", 591 "", 592 "", 593 "MXM3_217", 594 "MXM3_215", 595 "", 596 "", 597 "MXM3_193", 598 "MXM3_194", 599 "MXM3_37", 600 "", 601 "MXM3_271", 602 "MXM3_273", 603 "MXM3_195", 604 "MXM3_197", 605 "MXM3_177", 606 "MXM3_179", 607 "MXM3_181", 608 "MXM3_183", 609 "MXM3_185", 610 "MXM3_187"; 611}; 612 613&lsio_gpio3 { 614 gpio-line-names = "MXM3_191", 615 "", 616 "MXM3_221", 617 "MXM3_225", 618 "MXM3_223", 619 "MXM3_227", 620 "MXM3_200", 621 "MXM3_235", 622 "MXM3_231", 623 "MXM3_229", 624 "MXM3_233", 625 "MXM3_204", 626 "MXM3_196", 627 "", 628 "MXM3_202", 629 "", 630 "", 631 "", 632 "MXM3_305", 633 "MXM3_307", 634 "MXM3_309", 635 "MXM3_311", 636 "MXM3_315", 637 "MXM3_317", 638 "MXM3_319", 639 "MXM3_321", 640 "MXM3_15/GPIO7", 641 "MXM3_63", 642 "MXM3_17/GPIO8", 643 "MXM3_12", 644 "MXM3_14", 645 "MXM3_16"; 646}; 647 648&lsio_gpio4 { 649 gpio-line-names = "MXM3_18", 650 "MXM3_11/GPIO5", 651 "MXM3_13/GPIO6", 652 "MXM3_274", 653 "MXM3_84", 654 "MXM3_262", 655 "MXM3_96", 656 "", 657 "", 658 "", 659 "", 660 "", 661 "MXM3_190", 662 "", 663 "", 664 "", 665 "MXM3_269", 666 "MXM3_251", 667 "MXM3_253", 668 "MXM3_295", 669 "MXM3_299", 670 "MXM3_301", 671 "MXM3_297", 672 "MXM3_293", 673 "MXM3_291", 674 "MXM3_289", 675 "MXM3_287"; 676}; 677 678&lsio_gpio5 { 679 gpio-line-names = "", 680 "", 681 "", 682 "", 683 "", 684 "", 685 "", 686 "", 687 "", 688 "", 689 "", 690 "", 691 "", 692 "", 693 "MXM3_150", 694 "MXM3_160", 695 "MXM3_162", 696 "MXM3_144", 697 "MXM3_146", 698 "MXM3_148", 699 "MXM3_152", 700 "MXM3_156", 701 "MXM3_158", 702 "MXM3_159", 703 "MXM3_184", 704 "MXM3_180", 705 "MXM3_186", 706 "MXM3_188", 707 "MXM3_176", 708 "MXM3_178"; 709}; 710 711&lsio_gpio6 { 712 gpio-line-names = "", 713 "", 714 "", 715 "", 716 "", 717 "", 718 "", 719 "", 720 "", 721 "", 722 "MXM3_261", 723 "MXM3_263", 724 "MXM3_259", 725 "MXM3_257", 726 "MXM3_255", 727 "MXM3_128", 728 "MXM3_130", 729 "MXM3_265", 730 "MXM3_249", 731 "MXM3_247", 732 "MXM3_245", 733 "MXM3_243"; 734}; 735 736/* Apalis PWM3, MXM3 pin 6 */ 737&lsio_pwm0 { 738 pinctrl-names = "default"; 739 pinctrl-0 = <&pinctrl_pwm0>; 740 #pwm-cells = <3>; 741}; 742 743/* Apalis PWM4, MXM3 pin 8 */ 744&lsio_pwm1 { 745 pinctrl-names = "default"; 746 pinctrl-0 = <&pinctrl_pwm1>; 747 #pwm-cells = <3>; 748}; 749 750/* Apalis PWM1, MXM3 pin 2 */ 751&lsio_pwm2 { 752 pinctrl-names = "default"; 753 pinctrl-0 = <&pinctrl_pwm2>; 754 #pwm-cells = <3>; 755}; 756 757/* Apalis PWM2, MXM3 pin 4 */ 758&lsio_pwm3 { 759 pinctrl-names = "default"; 760 pinctrl-0 = <&pinctrl_pwm3>; 761 #pwm-cells = <3>; 762}; 763 764/* Messaging Units */ 765&mu_m0 { 766 status = "okay"; 767}; 768 769&mu1_m0 { 770 status = "okay"; 771}; 772 773&mu2_m0 { 774 status = "okay"; 775}; 776 777/* Apalis PCIE1 */ 778&pciea { 779 pinctrl-names = "default"; 780 pinctrl-0 = <&pinctrl_reset_moci>; 781 phys = <&hsio_phy 0 PHY_TYPE_PCIE 0>; 782 phy-names = "pcie-phy"; 783 reset-gpio = <&lsio_gpio0 30 GPIO_ACTIVE_LOW>; 784 vpcie-supply = <®_pcie_switch>; 785}; 786 787/* On-module Wi-Fi */ 788&pcieb { 789 pinctrl-names = "default"; 790 pinctrl-0 = <&pinctrl_pcieb>, <&pinctrl_wifi>; 791 phys = <&hsio_phy 1 PHY_TYPE_PCIE 1>; 792 phy-names = "pcie-phy"; 793 reset-gpio = <&lsio_gpio5 0 GPIO_ACTIVE_LOW>; 794 status = "okay"; 795}; 796 797&phyx2_lpcg { 798 clocks = <&hsio_refa_clk>, <&hsio_refb_clk>, 799 <&hsio_refa_clk>, <&hsio_per_clk>; 800}; 801 802/* TODO: Apalis BKL1_PWM */ 803 804/* Apalis DAP1 */ 805&sai1 { 806 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, 807 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, 808 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, 809 <&sai1_lpcg IMX_LPCG_CLK_0>; 810 assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>; 811 pinctrl-names = "default"; 812 pinctrl-0 = <&pinctrl_sai1>; 813 #sound-dai-cells = <0>; 814 status = "okay"; 815}; 816 817/* Apalis HDMI Audio */ 818&sai5 { 819 assigned-clocks = <&acm IMX_ADMA_ACM_SAI5_MCLK_SEL>, 820 <&acm IMX_ADMA_ACM_AUD_CLK1_SEL>, 821 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, 822 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, 823 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, 824 <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL>, 825 <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS>, 826 <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS>, 827 <&sai5_lpcg 0>; 828 assigned-clock-parents = <&aud_pll_div0_lpcg 0>, <&aud_rec1_lpcg 0>; 829 assigned-clock-rates = <0>, <0>, <786432000>, <49152000>, <12288000>, 830 <722534400>, <45158400>, <11289600>, <49152000>; 831}; 832 833/* Apalis SPDIF1 */ 834&spdif0 { 835 assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, 836 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, 837 <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>; 838 assigned-clock-rates = <786432000>, <49152000>, <12288000>; 839 pinctrl-names = "default"; 840 pinctrl-0 = <&pinctrl_spdif0>; 841 status = "okay"; 842}; 843 844/* TODO: Thermal Zones */ 845 846/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */ 847 848/* Apalis USBH4 */ 849&usb3_phy { 850 status = "okay"; 851}; 852 853&usbotg3 { 854 status = "okay"; 855}; 856 857&usbotg3_cdns3 { 858 dr_mode = "host"; 859}; 860 861/* Apalis USBO1 */ 862&usbphy1 { 863 phy-3p0-supply = <®_usb_phy>; 864 status = "okay"; 865}; 866 867&usbotg1 { 868 pinctrl-names = "default"; 869 pinctrl-0 = <&pinctrl_usbotg1>; 870 adp-disable; 871 hnp-disable; 872 over-current-active-low; 873 power-active-high; 874 srp-disable; 875}; 876 877/* On-module eMMC */ 878&usdhc1 { 879 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 880 pinctrl-0 = <&pinctrl_usdhc1>; 881 pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 882 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 883 bus-width = <8>; 884 non-removable; 885 status = "okay"; 886}; 887 888/* Apalis MMC1 */ 889&usdhc2 { 890 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 891 pinctrl-0 = <&pinctrl_usdhc2_4bit>, 892 <&pinctrl_usdhc2_8bit>, 893 <&pinctrl_mmc1_cd>; 894 pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, 895 <&pinctrl_usdhc2_8bit_100mhz>, 896 <&pinctrl_mmc1_cd>; 897 pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, 898 <&pinctrl_usdhc2_8bit_200mhz>, 899 <&pinctrl_mmc1_cd>; 900 pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, 901 <&pinctrl_usdhc2_8bit_sleep>, 902 <&pinctrl_mmc1_cd_sleep>; 903 bus-width = <8>; 904 cd-gpios = <&lsio_gpio2 9 GPIO_ACTIVE_LOW>; /* Apalis MMC1_CD# */ 905 no-1-8-v; 906}; 907 908/* Apalis SD1 */ 909&usdhc3 { 910 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 911 pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_sd1_cd>; 912 pinctrl-1 = <&pinctrl_usdhc3_100mhz>, <&pinctrl_sd1_cd>; 913 pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_sd1_cd>; 914 bus-width = <4>; 915 cd-gpios = <&lsio_gpio4 12 GPIO_ACTIVE_LOW>; /* Apalis SD1_CD# */ 916 no-1-8-v; 917}; 918 919/* Video Processing Unit */ 920&vpu { 921 compatible = "nxp,imx8qm-vpu"; 922 status = "okay"; 923}; 924 925&vpu_core0 { 926 reg = <0x2d080000 0x10000>; 927 memory-region = <&decoder_boot>, <&decoder_rpc>; 928 status = "okay"; 929}; 930 931&vpu_core1 { 932 reg = <0x2d090000 0x10000>; 933 memory-region = <&encoder1_boot>, <&encoder1_rpc>; 934 status = "okay"; 935}; 936 937&vpu_core2 { 938 reg = <0x2d0a0000 0x10000>; 939 memory-region = <&encoder2_boot>, <&encoder2_rpc>; 940 status = "okay"; 941}; 942 943&iomuxc { 944 pinctrl-names = "default"; 945 pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, 946 <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, 947 <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_keys>, 948 <&pinctrl_gpio_usbh_oc_n>, <&pinctrl_lpuart1ctrl>, 949 <&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>, 950 <&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>, 951 <&pinctrl_mlb_gpios>, <&pinctrl_qspi1a_gpios>, 952 <&pinctrl_sata1_act>, <&pinctrl_sim0_gpios>, 953 <&pinctrl_usdhc1_gpios>; 954 955 /* Apalis AN1_ADC */ 956 pinctrl_adc0: adc0grp { 957 fsl,pins = /* Apalis AN1_ADC0 */ 958 <IMX8QM_ADC_IN0_DMA_ADC0_IN0 0xc0000060>, 959 /* Apalis AN1_ADC1 */ 960 <IMX8QM_ADC_IN1_DMA_ADC0_IN1 0xc0000060>, 961 /* Apalis AN1_ADC2 */ 962 <IMX8QM_ADC_IN2_DMA_ADC0_IN2 0xc0000060>, 963 /* Apalis AN1_TSWIP_ADC3 */ 964 <IMX8QM_ADC_IN3_DMA_ADC0_IN3 0xc0000060>; 965 }; 966 967 /* Apalis AN1_TS */ 968 pinctrl_adc1: adc1grp { 969 fsl,pins = /* Apalis AN1_TSPX */ 970 <IMX8QM_ADC_IN4_DMA_ADC1_IN0 0xc0000060>, 971 /* Apalis AN1_TSMX */ 972 <IMX8QM_ADC_IN5_DMA_ADC1_IN1 0xc0000060>, 973 /* Apalis AN1_TSPY */ 974 <IMX8QM_ADC_IN6_DMA_ADC1_IN2 0xc0000060>, 975 /* Apalis AN1_TSMY */ 976 <IMX8QM_ADC_IN7_DMA_ADC1_IN3 0xc0000060>; 977 }; 978 979 /* Apalis CAM1 */ 980 pinctrl_cam1_gpios: cam1gpiosgrp { 981 fsl,pins = /* Apalis CAM1_D7 */ 982 <IMX8QM_MIPI_DSI1_I2C0_SCL_LSIO_GPIO1_IO20 0x00000021>, 983 /* Apalis CAM1_D6 */ 984 <IMX8QM_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_IO21 0x00000021>, 985 /* Apalis CAM1_D5 */ 986 <IMX8QM_ESAI0_TX0_LSIO_GPIO2_IO26 0x00000021>, 987 /* Apalis CAM1_D4 */ 988 <IMX8QM_ESAI0_TX1_LSIO_GPIO2_IO27 0x00000021>, 989 /* Apalis CAM1_D3 */ 990 <IMX8QM_ESAI0_TX2_RX3_LSIO_GPIO2_IO28 0x00000021>, 991 /* Apalis CAM1_D2 */ 992 <IMX8QM_ESAI0_TX3_RX2_LSIO_GPIO2_IO29 0x00000021>, 993 /* Apalis CAM1_D1 */ 994 <IMX8QM_ESAI0_TX4_RX1_LSIO_GPIO2_IO30 0x00000021>, 995 /* Apalis CAM1_D0 */ 996 <IMX8QM_ESAI0_TX5_RX0_LSIO_GPIO2_IO31 0x00000021>, 997 /* Apalis CAM1_PCLK */ 998 <IMX8QM_MCLK_IN0_LSIO_GPIO3_IO00 0x00000021>, 999 /* Apalis CAM1_MCLK */ 1000 <IMX8QM_SPI3_SDO_LSIO_GPIO2_IO18 0x00000021>, 1001 /* Apalis CAM1_VSYNC */ 1002 <IMX8QM_ESAI0_SCKR_LSIO_GPIO2_IO24 0x00000021>, 1003 /* Apalis CAM1_HSYNC */ 1004 <IMX8QM_ESAI0_SCKT_LSIO_GPIO2_IO25 0x00000021>; 1005 }; 1006 1007 /* Apalis DAP1 */ 1008 pinctrl_dap1_gpios: dap1gpiosgrp { 1009 fsl,pins = /* Apalis DAP1_MCLK */ 1010 <IMX8QM_SPI3_SDI_LSIO_GPIO2_IO19 0x00000021>, 1011 /* Apalis DAP1_D_OUT */ 1012 <IMX8QM_SAI1_RXC_LSIO_GPIO3_IO12 0x00000021>, 1013 /* Apalis DAP1_RESET */ 1014 <IMX8QM_ESAI1_SCKT_LSIO_GPIO2_IO07 0x00000021>, 1015 /* Apalis DAP1_BIT_CLK */ 1016 <IMX8QM_SPI0_CS1_LSIO_GPIO3_IO06 0x00000021>, 1017 /* Apalis DAP1_D_IN */ 1018 <IMX8QM_SAI1_RXFS_LSIO_GPIO3_IO14 0x00000021>, 1019 /* Apalis DAP1_SYNC */ 1020 <IMX8QM_SPI2_CS1_LSIO_GPIO3_IO11 0x00000021>, 1021 /* On-module Wi-Fi_I2S_EN# */ 1022 <IMX8QM_ESAI1_TX5_RX0_LSIO_GPIO2_IO13 0x00000021>; 1023 }; 1024 1025 /* Apalis LCD1_G1+2 */ 1026 pinctrl_esai0_gpios: esai0gpiosgrp { 1027 fsl,pins = /* Apalis LCD1_G1 */ 1028 <IMX8QM_ESAI0_FSR_LSIO_GPIO2_IO22 0x00000021>, 1029 /* Apalis LCD1_G2 */ 1030 <IMX8QM_ESAI0_FST_LSIO_GPIO2_IO23 0x00000021>; 1031 }; 1032 1033 /* On-module Gigabit Ethernet PHY Micrel KSZ9031 for Apalis GLAN */ 1034 pinctrl_fec1: fec1grp { 1035 fsl,pins = /* Use pads in 3.3V mode */ 1036 <IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0>, 1037 <IMX8QM_ENET0_MDC_CONN_ENET0_MDC 0x06000020>, 1038 <IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020>, 1039 <IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020>, 1040 <IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020>, 1041 <IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020>, 1042 <IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020>, 1043 <IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020>, 1044 <IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020>, 1045 <IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020>, 1046 <IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020>, 1047 <IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020>, 1048 <IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020>, 1049 <IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020>, 1050 <IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020>, 1051 <IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M 0x06000020>, 1052 /* On-module ETH_RESET# */ 1053 <IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x06000020>, 1054 /* On-module ETH_INT# */ 1055 <IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_IO29 0x04000060>; 1056 }; 1057 1058 pinctrl_fec1_sleep: fec1-sleepgrp { 1059 fsl,pins = <IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0>, 1060 <IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14 0x04000040>, 1061 <IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13 0x04000040>, 1062 <IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_IO31 0x04000040>, 1063 <IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30 0x04000040>, 1064 <IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO00 0x04000040>, 1065 <IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO01 0x04000040>, 1066 <IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO02 0x04000040>, 1067 <IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO03 0x04000040>, 1068 <IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04 0x04000040>, 1069 <IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_IO05 0x04000040>, 1070 <IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO06 0x04000040>, 1071 <IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO07 0x04000040>, 1072 <IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08 0x04000040>, 1073 <IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09 0x04000040>, 1074 <IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15 0x04000040>, 1075 <IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x06000020>, 1076 <IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_IO29 0x04000040>; 1077 }; 1078 1079 /* Apalis LCD1_ */ 1080 pinctrl_fec2_gpios: fec2gpiosgrp { 1081 fsl,pins = <IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD 0x000014a0>, 1082 /* Apalis LCD1_R1 */ 1083 <IMX8QM_ENET1_MDC_LSIO_GPIO4_IO18 0x00000021>, 1084 /* Apalis LCD1_R0 */ 1085 <IMX8QM_ENET1_MDIO_LSIO_GPIO4_IO17 0x00000021>, 1086 /* Apalis LCD1_G0 */ 1087 <IMX8QM_ENET1_REFCLK_125M_25M_LSIO_GPIO4_IO16 0x00000021>, 1088 /* Apalis LCD1_R7 */ 1089 <IMX8QM_ENET1_RGMII_RX_CTL_LSIO_GPIO6_IO17 0x00000021>, 1090 /* Apalis LCD1_DE */ 1091 <IMX8QM_ENET1_RGMII_RXD0_LSIO_GPIO6_IO18 0x00000021>, 1092 /* Apalis LCD1_HSYNC */ 1093 <IMX8QM_ENET1_RGMII_RXD1_LSIO_GPIO6_IO19 0x00000021>, 1094 /* Apalis LCD1_VSYNC */ 1095 <IMX8QM_ENET1_RGMII_RXD2_LSIO_GPIO6_IO20 0x00000021>, 1096 /* Apalis LCD1_PCLK */ 1097 <IMX8QM_ENET1_RGMII_RXD3_LSIO_GPIO6_IO21 0x00000021>, 1098 /* Apalis LCD1_R6 */ 1099 <IMX8QM_ENET1_RGMII_TX_CTL_LSIO_GPIO6_IO11 0x00000021>, 1100 /* Apalis LCD1_R5 */ 1101 <IMX8QM_ENET1_RGMII_TXC_LSIO_GPIO6_IO10 0x00000021>, 1102 /* Apalis LCD1_R4 */ 1103 <IMX8QM_ENET1_RGMII_TXD0_LSIO_GPIO6_IO12 0x00000021>, 1104 /* Apalis LCD1_R3 */ 1105 <IMX8QM_ENET1_RGMII_TXD1_LSIO_GPIO6_IO13 0x00000021>, 1106 /* Apalis LCD1_R2 */ 1107 <IMX8QM_ENET1_RGMII_TXD2_LSIO_GPIO6_IO14 0x00000021>; 1108 }; 1109 1110 /* Apalis CAN1 */ 1111 pinctrl_flexcan1: flexcan0grp { 1112 fsl,pins = <IMX8QM_FLEXCAN0_TX_DMA_FLEXCAN0_TX 0x00000021>, 1113 <IMX8QM_FLEXCAN0_RX_DMA_FLEXCAN0_RX 0x00000021>; 1114 }; 1115 1116 /* Apalis CAN2 */ 1117 pinctrl_flexcan2: flexcan1grp { 1118 fsl,pins = <IMX8QM_FLEXCAN1_TX_DMA_FLEXCAN1_TX 0x00000021>, 1119 <IMX8QM_FLEXCAN1_RX_DMA_FLEXCAN1_RX 0x00000021>; 1120 }; 1121 1122 /* Apalis CAN3 (optional) */ 1123 pinctrl_flexcan3: flexcan2grp { 1124 fsl,pins = <IMX8QM_FLEXCAN2_TX_DMA_FLEXCAN2_TX 0x00000021>, 1125 <IMX8QM_FLEXCAN2_RX_DMA_FLEXCAN2_RX 0x00000021>; 1126 }; 1127 1128 /* Apalis GPIO1 */ 1129 pinctrl_gpio1: gpio1grp { 1130 fsl,pins = <IMX8QM_M40_GPIO0_00_LSIO_GPIO0_IO08 0x06000021>; 1131 }; 1132 1133 /* Apalis GPIO2 */ 1134 pinctrl_gpio2: gpio2grp { 1135 fsl,pins = <IMX8QM_M40_GPIO0_01_LSIO_GPIO0_IO09 0x06000021>; 1136 }; 1137 1138 /* Apalis GPIO3 */ 1139 pinctrl_gpio3: gpio3grp { 1140 fsl,pins = <IMX8QM_M41_GPIO0_00_LSIO_GPIO0_IO12 0x06000021>; 1141 }; 1142 1143 /* Apalis GPIO4 */ 1144 pinctrl_gpio4: gpio4grp { 1145 fsl,pins = <IMX8QM_M41_GPIO0_01_LSIO_GPIO0_IO13 0x06000021>; 1146 }; 1147 1148 /* Apalis GPIO5 */ 1149 pinctrl_gpio5: gpio5grp { 1150 fsl,pins = <IMX8QM_FLEXCAN2_RX_LSIO_GPIO4_IO01 0x06000021>; 1151 }; 1152 1153 /* Apalis GPIO6 */ 1154 pinctrl_gpio6: gpio6grp { 1155 fsl,pins = <IMX8QM_FLEXCAN2_TX_LSIO_GPIO4_IO02 0x00000021>; 1156 }; 1157 1158 /* Apalis GPIO7 */ 1159 pinctrl_gpio7: gpio7grp { 1160 fsl,pins = <IMX8QM_MLB_SIG_LSIO_GPIO3_IO26 0x00000021>; 1161 }; 1162 1163 /* Apalis GPIO8 */ 1164 pinctrl_gpio8: gpio8grp { 1165 fsl,pins = <IMX8QM_MLB_DATA_LSIO_GPIO3_IO28 0x00000021>; 1166 }; 1167 1168 /* Apalis BKL1_ON */ 1169 pinctrl_gpio_bkl_on: gpiobklongrp { 1170 fsl,pins = <IMX8QM_LVDS0_GPIO00_LSIO_GPIO1_IO04 0x00000021>; 1171 }; 1172 1173 /* Apalis WAKE1_MICO */ 1174 pinctrl_gpio_keys: gpiokeysgrp { 1175 fsl,pins = <IMX8QM_SPI3_CS0_LSIO_GPIO2_IO20 0x06700021>; 1176 }; 1177 1178 /* Apalis USBH_OC# */ 1179 pinctrl_gpio_usbh_oc_n: gpiousbhocngrp { 1180 fsl,pins = <IMX8QM_USB_SS3_TC3_LSIO_GPIO4_IO06 0x04000021>; 1181 }; 1182 1183 /* On-module HDMI_CTRL */ 1184 pinctrl_hdmi_ctrl: hdmictrlgrp { 1185 fsl,pins = <IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 0x00000061>; 1186 }; 1187 1188 /* On-module I2C */ 1189 pinctrl_lpi2c1: lpi2c1grp { 1190 fsl,pins = <IMX8QM_GPT0_CLK_DMA_I2C1_SCL 0x04000020>, 1191 <IMX8QM_GPT0_CAPTURE_DMA_I2C1_SDA 0x04000020>; 1192 }; 1193 1194 /* Apalis I2C1 */ 1195 pinctrl_lpi2c2: lpi2c2grp { 1196 fsl,pins = <IMX8QM_GPT1_CLK_DMA_I2C2_SCL 0x04000020>, 1197 <IMX8QM_GPT1_CAPTURE_DMA_I2C2_SDA 0x04000020>; 1198 }; 1199 1200 /* Apalis I2C3 (CAM) */ 1201 pinctrl_lpi2c3: lpi2c3grp { 1202 fsl,pins = <IMX8QM_SIM0_PD_DMA_I2C3_SCL 0x04000020>, 1203 <IMX8QM_SIM0_POWER_EN_DMA_I2C3_SDA 0x04000020>; 1204 }; 1205 1206 /* Apalis SPI1 */ 1207 pinctrl_lpspi0: lpspi0grp { 1208 fsl,pins = <IMX8QM_SPI0_SCK_DMA_SPI0_SCK 0x0600004c>, 1209 <IMX8QM_SPI0_SDO_DMA_SPI0_SDO 0x0600004c>, 1210 <IMX8QM_SPI0_SDI_DMA_SPI0_SDI 0x0600004c>, 1211 <IMX8QM_SPI0_CS0_LSIO_GPIO3_IO05 0x0600004c>; 1212 }; 1213 1214 /* Apalis SPI2 */ 1215 pinctrl_lpspi2: lpspi2grp { 1216 fsl,pins = <IMX8QM_SPI2_SCK_DMA_SPI2_SCK 0x0600004c>, 1217 <IMX8QM_SPI2_SDO_DMA_SPI2_SDO 0x0600004c>, 1218 <IMX8QM_SPI2_SDI_DMA_SPI2_SDI 0x0600004c>, 1219 <IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10 0x0600004c>; 1220 }; 1221 1222 /* Apalis UART3 */ 1223 pinctrl_lpuart0: lpuart0grp { 1224 fsl,pins = <IMX8QM_UART0_RX_DMA_UART0_RX 0x06000020>, 1225 <IMX8QM_UART0_TX_DMA_UART0_TX 0x06000020>; 1226 }; 1227 1228 /* Apalis UART1 */ 1229 pinctrl_lpuart1: lpuart1grp { 1230 fsl,pins = <IMX8QM_UART1_RX_DMA_UART1_RX 0x06000020>, 1231 <IMX8QM_UART1_TX_DMA_UART1_TX 0x06000020>, 1232 <IMX8QM_UART1_CTS_B_DMA_UART1_CTS_B 0x06000020>, 1233 <IMX8QM_UART1_RTS_B_DMA_UART1_RTS_B 0x06000020>; 1234 }; 1235 1236 /* Apalis UART1 */ 1237 pinctrl_lpuart1ctrl: lpuart1ctrlgrp { 1238 fsl,pins = /* Apalis UART1_DTR */ 1239 <IMX8QM_M40_I2C0_SCL_LSIO_GPIO0_IO06 0x00000021>, 1240 /* Apalis UART1_DSR */ 1241 <IMX8QM_M40_I2C0_SDA_LSIO_GPIO0_IO07 0x00000021>, 1242 /* Apalis UART1_DCD */ 1243 <IMX8QM_M41_I2C0_SCL_LSIO_GPIO0_IO10 0x00000021>, 1244 /* Apalis UART1_RI */ 1245 <IMX8QM_M41_I2C0_SDA_LSIO_GPIO0_IO11 0x00000021>; 1246 }; 1247 1248 /* Apalis UART4 */ 1249 pinctrl_lpuart2: lpuart2grp { 1250 fsl,pins = <IMX8QM_LVDS0_I2C1_SCL_DMA_UART2_TX 0x06000020>, 1251 <IMX8QM_LVDS0_I2C1_SDA_DMA_UART2_RX 0x06000020>; 1252 }; 1253 1254 /* Apalis UART2 */ 1255 pinctrl_lpuart3: lpuart3grp { 1256 fsl,pins = <IMX8QM_LVDS1_I2C1_SCL_DMA_UART3_TX 0x06000020>, 1257 <IMX8QM_LVDS1_I2C1_SDA_DMA_UART3_RX 0x06000020>, 1258 <IMX8QM_ENET1_RGMII_TXD3_DMA_UART3_RTS_B 0x06000020>, 1259 <IMX8QM_ENET1_RGMII_RXC_DMA_UART3_CTS_B 0x06000020>; 1260 }; 1261 1262 /* Apalis TS_2 */ 1263 pinctrl_lvds0_i2c0_gpio: lvds0i2c0gpiogrp { 1264 fsl,pins = <IMX8QM_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06 0x00000021>; 1265 }; 1266 1267 /* Apalis LCD1_G6+7 */ 1268 pinctrl_lvds1_i2c0_gpios: lvds1i2c0gpiosgrp { 1269 fsl,pins = /* Apalis LCD1_G6 */ 1270 <IMX8QM_LVDS1_I2C0_SCL_LSIO_GPIO1_IO12 0x00000021>, 1271 /* Apalis LCD1_G7 */ 1272 <IMX8QM_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13 0x00000021>; 1273 }; 1274 1275 /* Apalis TS_3 */ 1276 pinctrl_mipi_dsi_0_1_en: mipidsi0-1engrp { 1277 fsl,pins = <IMX8QM_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07 0x00000021>; 1278 }; 1279 1280 /* Apalis TS_4 */ 1281 pinctrl_mipi_dsi1_gpios: mipidsi1gpiosgrp { 1282 fsl,pins = <IMX8QM_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO22 0x00000021>; 1283 }; 1284 1285 /* Apalis TS_1 */ 1286 pinctrl_mlb_gpios: mlbgpiosgrp { 1287 fsl,pins = <IMX8QM_MLB_CLK_LSIO_GPIO3_IO27 0x00000021>; 1288 }; 1289 1290 /* Apalis MMC1_CD# */ 1291 pinctrl_mmc1_cd: mmc1cdgrp { 1292 fsl,pins = <IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 0x00000021>; 1293 }; 1294 1295 pinctrl_mmc1_cd_sleep: mmc1cdsleepgrp { 1296 fsl,pins = <IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 0x04000021>; 1297 }; 1298 1299 /* On-module PCIe_Wi-Fi */ 1300 pinctrl_pcieb: pciebgrp { 1301 fsl,pins = <IMX8QM_PCIE_CTRL1_CLKREQ_B_LSIO_GPIO4_IO30 0x00000021>, 1302 <IMX8QM_PCIE_CTRL1_WAKE_B_LSIO_GPIO4_IO31 0x00000021>, 1303 <IMX8QM_PCIE_CTRL1_PERST_B_LSIO_GPIO5_IO00 0x00000021>; 1304 }; 1305 1306 /* On-module PCIe_CLK_EN1 */ 1307 pinctrl_pcie_sata_refclk: pciesatarefclkgrp { 1308 fsl,pins = <IMX8QM_USDHC2_WP_LSIO_GPIO4_IO11 0x00000021>; 1309 }; 1310 1311 /* On-module PCIe_CLK_EN2 */ 1312 pinctrl_pcie_wifi_refclk: pciewifirefclkgrp { 1313 fsl,pins = <IMX8QM_ESAI1_TX3_RX2_LSIO_GPIO2_IO11 0x00000021>; 1314 }; 1315 1316 /* Apalis PWM3 */ 1317 pinctrl_pwm0: pwm0grp { 1318 fsl,pins = <IMX8QM_UART0_RTS_B_LSIO_PWM0_OUT 0x00000020>; 1319 }; 1320 1321 /* Apalis PWM4 */ 1322 pinctrl_pwm1: pwm1grp { 1323 fsl,pins = <IMX8QM_UART0_CTS_B_LSIO_PWM1_OUT 0x00000020>; 1324 }; 1325 1326 /* Apalis PWM1 */ 1327 pinctrl_pwm2: pwm2grp { 1328 fsl,pins = <IMX8QM_GPT1_COMPARE_LSIO_PWM2_OUT 0x00000020>; 1329 }; 1330 1331 /* Apalis PWM2 */ 1332 pinctrl_pwm3: pwm3grp { 1333 fsl,pins = <IMX8QM_GPT0_COMPARE_LSIO_PWM3_OUT 0x00000020>; 1334 }; 1335 1336 /* Apalis BKL1_PWM */ 1337 pinctrl_pwm_bkl: pwmbklgrp { 1338 fsl,pins = <IMX8QM_LVDS1_GPIO00_LVDS1_PWM0_OUT 0x00000020>; 1339 }; 1340 1341 /* Apalis LCD1_ */ 1342 pinctrl_qspi1a_gpios: qspi1agpiosgrp { 1343 fsl,pins = /* Apalis LCD1_B0 */ 1344 <IMX8QM_QSPI1A_DATA0_LSIO_GPIO4_IO26 0x00000021>, 1345 /* Apalis LCD1_B1 */ 1346 <IMX8QM_QSPI1A_DATA1_LSIO_GPIO4_IO25 0x00000021>, 1347 /* Apalis LCD1_B2 */ 1348 <IMX8QM_QSPI1A_DATA2_LSIO_GPIO4_IO24 0x00000021>, 1349 /* Apalis LCD1_B3 */ 1350 <IMX8QM_QSPI1A_DATA3_LSIO_GPIO4_IO23 0x00000021>, 1351 /* Apalis LCD1_B5 */ 1352 <IMX8QM_QSPI1A_DQS_LSIO_GPIO4_IO22 0x00000021>, 1353 /* Apalis LCD1_B7 */ 1354 <IMX8QM_QSPI1A_SCLK_LSIO_GPIO4_IO21 0x00000021>, 1355 /* Apalis LCD1_B4 */ 1356 <IMX8QM_QSPI1A_SS0_B_LSIO_GPIO4_IO19 0x00000021>, 1357 /* Apalis LCD1_B6 */ 1358 <IMX8QM_QSPI1A_SS1_B_LSIO_GPIO4_IO20 0x00000021>; 1359 }; 1360 1361 /* On-module RESET_MOCI#_DRV */ 1362 pinctrl_reset_moci: resetmocigrp { 1363 fsl,pins = <IMX8QM_SCU_GPIO0_02_LSIO_GPIO0_IO30 0x00000021>; 1364 }; 1365 1366 /* On-module I2S SGTL5000 for Apalis Analogue Audio */ 1367 pinctrl_sai1: sai1grp { 1368 fsl,pins = <IMX8QM_SAI1_TXD_AUD_SAI1_TXD 0xc600006c>, 1369 <IMX8QM_SAI1_RXD_AUD_SAI1_RXD 0xc600004c>, 1370 <IMX8QM_SAI1_TXC_AUD_SAI1_TXC 0xc600004c>, 1371 <IMX8QM_SAI1_TXFS_AUD_SAI1_TXFS 0xc600004c>; 1372 }; 1373 1374 /* Apalis SATA1_ACT# */ 1375 pinctrl_sata1_act: sata1actgrp { 1376 fsl,pins = <IMX8QM_ESAI1_TX0_LSIO_GPIO2_IO08 0x00000021>; 1377 }; 1378 1379 /* Apalis SD1_CD# */ 1380 pinctrl_sd1_cd: sd1cdgrp { 1381 fsl,pins = <IMX8QM_USDHC2_CD_B_LSIO_GPIO4_IO12 0x00000021>; 1382 }; 1383 1384 /* On-module I2S SGTL5000 SYS_MCLK */ 1385 pinctrl_sgtl5000: sgtl5000grp { 1386 fsl,pins = <IMX8QM_MCLK_OUT0_AUD_ACM_MCLK_OUT0 0xc600004c>; 1387 }; 1388 1389 /* Apalis LCD1_ */ 1390 pinctrl_sim0_gpios: sim0gpiosgrp { 1391 fsl,pins = /* Apalis LCD1_G5 */ 1392 <IMX8QM_SIM0_CLK_LSIO_GPIO0_IO00 0x00000021>, 1393 /* Apalis LCD1_G3 */ 1394 <IMX8QM_SIM0_GPIO0_00_LSIO_GPIO0_IO05 0x00000021>, 1395 /* Apalis TS_5 */ 1396 <IMX8QM_SIM0_IO_LSIO_GPIO0_IO02 0x00000021>, 1397 /* Apalis LCD1_G4 */ 1398 <IMX8QM_SIM0_RST_LSIO_GPIO0_IO01 0x00000021>; 1399 }; 1400 1401 /* Apalis SPDIF */ 1402 pinctrl_spdif0: spdif0grp { 1403 fsl,pins = <IMX8QM_SPDIF0_TX_AUD_SPDIF0_TX 0xc6000040>, 1404 <IMX8QM_SPDIF0_RX_AUD_SPDIF0_RX 0xc6000040>; 1405 }; 1406 1407 pinctrl_touchctrl_gpios: touchctrlgpiosgrp { 1408 fsl,pins = <IMX8QM_ESAI1_FSR_LSIO_GPIO2_IO04 0x00000021>, 1409 <IMX8QM_ESAI1_FST_LSIO_GPIO2_IO05 0x00000041>, 1410 <IMX8QM_SPI3_SCK_LSIO_GPIO2_IO17 0x00000021>, 1411 <IMX8QM_SPI3_CS1_LSIO_GPIO2_IO21 0x00000041>; 1412 }; 1413 1414 pinctrl_touchctrl_idle: touchctrlidlegrp { 1415 fsl,pins = <IMX8QM_ADC_IN4_LSIO_GPIO3_IO22 0x00000021>, 1416 <IMX8QM_ADC_IN5_LSIO_GPIO3_IO23 0x00000021>, 1417 <IMX8QM_ADC_IN6_LSIO_GPIO3_IO24 0x00000021>, 1418 <IMX8QM_ADC_IN7_LSIO_GPIO3_IO25 0x00000021>; 1419 }; 1420 1421 /* On-module USB HSIC HUB (active) */ 1422 pinctrl_usb_hsic_active: usbh1activegrp { 1423 fsl,pins = <IMX8QM_USB_HSIC0_DATA_CONN_USB_HSIC0_DATA 0x000000cf>, 1424 <IMX8QM_USB_HSIC0_STROBE_CONN_USB_HSIC0_STROBE 0x000000ff>; 1425 }; 1426 1427 /* On-module USB HSIC HUB (idle) */ 1428 pinctrl_usb_hsic_idle: usbh1idlegrp { 1429 fsl,pins = <IMX8QM_USB_HSIC0_DATA_CONN_USB_HSIC0_DATA 0x000000cf>, 1430 <IMX8QM_USB_HSIC0_STROBE_CONN_USB_HSIC0_STROBE 0x000000cf>; 1431 }; 1432 1433 /* On-module USB HSIC HUB */ 1434 pinctrl_usb3503a: usb3503agrp { 1435 fsl,pins = /* On-module HSIC_HUB_CONNECT */ 1436 <IMX8QM_SCU_GPIO0_03_LSIO_GPIO0_IO31 0x00000041>, 1437 /* On-module HSIC_INT_N */ 1438 <IMX8QM_SCU_GPIO0_05_LSIO_GPIO1_IO01 0x00000021>, 1439 /* On-module HSIC_RESET_N */ 1440 <IMX8QM_SCU_GPIO0_06_LSIO_GPIO1_IO02 0x00000041>; 1441 }; 1442 1443 /* Apalis USBH_EN */ 1444 pinctrl_usbh_en: usbhengrp { 1445 fsl,pins = <IMX8QM_USB_SS3_TC1_LSIO_GPIO4_IO04 0x00000021>; 1446 }; 1447 1448 /* Apalis USBO1 */ 1449 pinctrl_usbotg1: usbotg1grp { 1450 fsl,pins = /* Apalis USBO1_EN */ 1451 <IMX8QM_USB_SS3_TC0_CONN_USB_OTG1_PWR 0x00000021>, 1452 /* Apalis USBO1_OC# */ 1453 <IMX8QM_USB_SS3_TC2_CONN_USB_OTG1_OC 0x04000021>; 1454 }; 1455 1456 /* On-module eMMC */ 1457 pinctrl_usdhc1: usdhc1grp { 1458 fsl,pins = <IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041>, 1459 <IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021>, 1460 <IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021>, 1461 <IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021>, 1462 <IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021>, 1463 <IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021>, 1464 <IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021>, 1465 <IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021>, 1466 <IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021>, 1467 <IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021>, 1468 <IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000041>, 1469 <IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000021>; 1470 }; 1471 1472 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 1473 fsl,pins = <IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 0x06000040>, 1474 <IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD 0x00000020>, 1475 <IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000020>, 1476 <IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000020>, 1477 <IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000020>, 1478 <IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000020>, 1479 <IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000020>, 1480 <IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020>, 1481 <IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020>, 1482 <IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020>, 1483 <IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000040>, 1484 <IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000020>; 1485 }; 1486 1487 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 1488 fsl,pins = <IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 0x06000040>, 1489 <IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD 0x00000020>, 1490 <IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000020>, 1491 <IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000020>, 1492 <IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000020>, 1493 <IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000020>, 1494 <IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000020>, 1495 <IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020>, 1496 <IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020>, 1497 <IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020>, 1498 <IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000040>, 1499 <IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000020>; 1500 }; 1501 1502 /* Apalis TS_6 */ 1503 pinctrl_usdhc1_gpios: usdhc1gpiosgrp { 1504 fsl,pins = <IMX8QM_USDHC1_STROBE_LSIO_GPIO5_IO23 0x00000021>; 1505 }; 1506 1507 /* Apalis MMC1 */ 1508 pinctrl_usdhc2_4bit: usdhc2grp4bitgrp { 1509 fsl,pins = <IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041>, 1510 <IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021>, 1511 <IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021>, 1512 <IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021>, 1513 <IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021>, 1514 <IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021>, 1515 /* On-module PMIC use */ 1516 <IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021>; 1517 }; 1518 1519 pinctrl_usdhc2_4bit_100mhz: usdhc2-4bit100mhzgrp { 1520 fsl,pins = <IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000040>, 1521 <IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000020>, 1522 <IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000020>, 1523 <IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000020>, 1524 <IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000020>, 1525 <IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000020>, 1526 /* On-module PMIC use */ 1527 <IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021>; 1528 }; 1529 1530 pinctrl_usdhc2_4bit_200mhz: usdhc2-4bit200mhzgrp { 1531 fsl,pins = <IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000040>, 1532 <IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000020>, 1533 <IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000020>, 1534 <IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000020>, 1535 <IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000020>, 1536 <IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000020>, 1537 /* On-module PMIC use */ 1538 <IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021>; 1539 }; 1540 1541 pinctrl_usdhc2_8bit: usdhc2grp8bitgrp { 1542 fsl,pins = <IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 0x00000021>, 1543 <IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 0x00000021>, 1544 <IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 0x00000021>, 1545 <IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 0x00000021>; 1546 }; 1547 1548 pinctrl_usdhc2_8bit_100mhz: usdhc2-8bit100mhzgrp { 1549 fsl,pins = <IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 0x00000020>, 1550 <IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 0x00000020>, 1551 <IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 0x00000020>, 1552 <IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 0x00000020>; 1553 }; 1554 1555 pinctrl_usdhc2_8bit_200mhz: usdhc2-8bit200mhzgrp { 1556 fsl,pins = <IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 0x00000020>, 1557 <IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 0x00000020>, 1558 <IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 0x00000020>, 1559 <IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 0x00000020>; 1560 }; 1561 1562 pinctrl_usdhc2_4bit_sleep: usdhc2-4bitsleepgrp { 1563 fsl,pins = <IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x04000061>, 1564 <IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x04000061>, 1565 <IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x04000061>, 1566 <IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x04000061>, 1567 <IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x04000061>, 1568 <IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x04000061>, 1569 /* On-module PMIC use */ 1570 <IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021>; 1571 }; 1572 1573 pinctrl_usdhc2_8bit_sleep: usdhc2-8bitsleepgrp { 1574 fsl,pins = <IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 0x04000061>, 1575 <IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 0x04000061>, 1576 <IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 0x04000061>, 1577 <IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 0x04000061>; 1578 }; 1579 1580 /* Apalis SD1 */ 1581 pinctrl_usdhc3: usdhc3grp { 1582 fsl,pins = <IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041>, 1583 <IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021>, 1584 <IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021>, 1585 <IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021>, 1586 <IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021>, 1587 <IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021>, 1588 /* On-module PMIC use */ 1589 <IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021>; 1590 }; 1591 1592 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 1593 fsl,pins = <IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041>, 1594 <IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021>, 1595 <IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021>, 1596 <IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021>, 1597 <IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021>, 1598 <IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021>, 1599 /* On-module PMIC use */ 1600 <IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021>; 1601 }; 1602 1603 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 1604 fsl,pins = <IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041>, 1605 <IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021>, 1606 <IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021>, 1607 <IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021>, 1608 <IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021>, 1609 <IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021>, 1610 /* On-module PMIC use */ 1611 <IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021>; 1612 }; 1613 1614 /* On-module Wi-Fi */ 1615 pinctrl_wifi: wifigrp { 1616 fsl,pins = /* On-module Wi-Fi_SUSCLK_32k */ 1617 <IMX8QM_SCU_GPIO0_07_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x06000021>, 1618 /* On-module Wi-Fi_PCIE_W_DISABLE */ 1619 <IMX8QM_MIPI_CSI0_MCLK_OUT_LSIO_GPIO1_IO24 0x06000021>; 1620 }; 1621 1622 pinctrl_wifi_pdn: wifipdngrp { 1623 fsl,pins = /* On-module Wi-Fi_POWER_DOWN */ 1624 <IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28 0x06000021>; 1625 }; 1626}; 1627