xref: /linux/arch/arm64/boot/dts/freescale/imx8-apalis-ixora-v1.1.dtsi (revision 0ea5c948cb64bab5bc7a5516774eb8536f05aa0d)
1*c083131cSMarcel Ziswiler// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2*c083131cSMarcel Ziswiler/*
3*c083131cSMarcel Ziswiler * Copyright 2022 Toradex
4*c083131cSMarcel Ziswiler */
5*c083131cSMarcel Ziswiler
6*c083131cSMarcel Ziswiler#include <dt-bindings/leds/common.h>
7*c083131cSMarcel Ziswiler
8*c083131cSMarcel Ziswiler/ {
9*c083131cSMarcel Ziswiler	aliases {
10*c083131cSMarcel Ziswiler		rtc0 = &rtc_i2c;
11*c083131cSMarcel Ziswiler		rtc1 = &rtc;
12*c083131cSMarcel Ziswiler	};
13*c083131cSMarcel Ziswiler
14*c083131cSMarcel Ziswiler	leds {
15*c083131cSMarcel Ziswiler		compatible = "gpio-leds";
16*c083131cSMarcel Ziswiler		pinctrl-names = "default";
17*c083131cSMarcel Ziswiler		pinctrl-0 = <&pinctrl_leds_ixora>;
18*c083131cSMarcel Ziswiler
19*c083131cSMarcel Ziswiler		/* LED_4_GREEN / MXM3_188 */
20*c083131cSMarcel Ziswiler		led-1 {
21*c083131cSMarcel Ziswiler			color = <LED_COLOR_ID_GREEN>;
22*c083131cSMarcel Ziswiler			default-state = "off";
23*c083131cSMarcel Ziswiler			function = LED_FUNCTION_STATUS;
24*c083131cSMarcel Ziswiler			gpios = <&lsio_gpio5 27 GPIO_ACTIVE_HIGH>;
25*c083131cSMarcel Ziswiler		};
26*c083131cSMarcel Ziswiler
27*c083131cSMarcel Ziswiler		/* LED_4_RED / MXM3_178 */
28*c083131cSMarcel Ziswiler		led-2 {
29*c083131cSMarcel Ziswiler			color = <LED_COLOR_ID_RED>;
30*c083131cSMarcel Ziswiler			default-state = "off";
31*c083131cSMarcel Ziswiler			function = LED_FUNCTION_STATUS;
32*c083131cSMarcel Ziswiler			gpios = <&lsio_gpio5 29 GPIO_ACTIVE_HIGH>;
33*c083131cSMarcel Ziswiler		};
34*c083131cSMarcel Ziswiler
35*c083131cSMarcel Ziswiler		/* LED_5_GREEN / MXM3_152 */
36*c083131cSMarcel Ziswiler		led-3 {
37*c083131cSMarcel Ziswiler			color = <LED_COLOR_ID_GREEN>;
38*c083131cSMarcel Ziswiler			default-state = "off";
39*c083131cSMarcel Ziswiler			function = LED_FUNCTION_STATUS;
40*c083131cSMarcel Ziswiler			gpios = <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>;
41*c083131cSMarcel Ziswiler		};
42*c083131cSMarcel Ziswiler
43*c083131cSMarcel Ziswiler		/* LED_5_RED / MXM3_156 */
44*c083131cSMarcel Ziswiler		led-4 {
45*c083131cSMarcel Ziswiler			color = <LED_COLOR_ID_RED>;
46*c083131cSMarcel Ziswiler			default-state = "off";
47*c083131cSMarcel Ziswiler			function = LED_FUNCTION_STATUS;
48*c083131cSMarcel Ziswiler			gpios = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>;
49*c083131cSMarcel Ziswiler		};
50*c083131cSMarcel Ziswiler	};
51*c083131cSMarcel Ziswiler
52*c083131cSMarcel Ziswiler	reg_usb_host_vbus: regulator-usb-host-vbus {
53*c083131cSMarcel Ziswiler		regulator-name = "VCC_USBH(2|4)";
54*c083131cSMarcel Ziswiler	};
55*c083131cSMarcel Ziswiler};
56*c083131cSMarcel Ziswiler
57*c083131cSMarcel Ziswiler&adc0 {
58*c083131cSMarcel Ziswiler	status = "okay";
59*c083131cSMarcel Ziswiler};
60*c083131cSMarcel Ziswiler
61*c083131cSMarcel Ziswiler&adc1 {
62*c083131cSMarcel Ziswiler	status = "okay";
63*c083131cSMarcel Ziswiler};
64*c083131cSMarcel Ziswiler
65*c083131cSMarcel Ziswiler/* TODO: Audio Mixer */
66*c083131cSMarcel Ziswiler
67*c083131cSMarcel Ziswiler/* TODO: Asynchronous Sample Rate Converter (ASRC) */
68*c083131cSMarcel Ziswiler
69*c083131cSMarcel Ziswiler/* TODO: Display Controller */
70*c083131cSMarcel Ziswiler
71*c083131cSMarcel Ziswiler/* TODO: DPU */
72*c083131cSMarcel Ziswiler
73*c083131cSMarcel Ziswiler/* Apalis ETH1 */
74*c083131cSMarcel Ziswiler&fec1 {
75*c083131cSMarcel Ziswiler	status = "okay";
76*c083131cSMarcel Ziswiler};
77*c083131cSMarcel Ziswiler
78*c083131cSMarcel Ziswiler/* Apalis CAN1 */
79*c083131cSMarcel Ziswiler&flexcan1 {
80*c083131cSMarcel Ziswiler	status = "okay";
81*c083131cSMarcel Ziswiler};
82*c083131cSMarcel Ziswiler
83*c083131cSMarcel Ziswiler/* Apalis CAN2 */
84*c083131cSMarcel Ziswiler&flexcan2 {
85*c083131cSMarcel Ziswiler	status = "okay";
86*c083131cSMarcel Ziswiler};
87*c083131cSMarcel Ziswiler
88*c083131cSMarcel Ziswiler/* TODO: GPU */
89*c083131cSMarcel Ziswiler
90*c083131cSMarcel Ziswiler/* Apalis I2C1 */
91*c083131cSMarcel Ziswiler&i2c2 {
92*c083131cSMarcel Ziswiler	status = "okay";
93*c083131cSMarcel Ziswiler
94*c083131cSMarcel Ziswiler	/* M41T0M6 real time clock on carrier board */
95*c083131cSMarcel Ziswiler	rtc_i2c: rtc@68 {
96*c083131cSMarcel Ziswiler		status = "okay";
97*c083131cSMarcel Ziswiler	};
98*c083131cSMarcel Ziswiler};
99*c083131cSMarcel Ziswiler
100*c083131cSMarcel Ziswiler/* Apalis I2C3 (CAM) */
101*c083131cSMarcel Ziswiler&i2c3 {
102*c083131cSMarcel Ziswiler	status = "okay";
103*c083131cSMarcel Ziswiler};
104*c083131cSMarcel Ziswiler
105*c083131cSMarcel Ziswiler&iomuxc {
106*c083131cSMarcel Ziswiler	pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>,
107*c083131cSMarcel Ziswiler		    <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>,
108*c083131cSMarcel Ziswiler		    <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio_usbh_oc_n>,
109*c083131cSMarcel Ziswiler		    <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>,
110*c083131cSMarcel Ziswiler		    <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>,
111*c083131cSMarcel Ziswiler		    <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>,
112*c083131cSMarcel Ziswiler		    <&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>,
113*c083131cSMarcel Ziswiler		    <&pinctrl_sim0_gpios>, <&pinctrl_uart24_forceoff>,
114*c083131cSMarcel Ziswiler		    <&pinctrl_usdhc1_gpios>;
115*c083131cSMarcel Ziswiler
116*c083131cSMarcel Ziswiler	pinctrl_leds_ixora: ledsixoragrp {
117*c083131cSMarcel Ziswiler		fsl,pins = <IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27	0x06000061>, /* LED_4_GREEN */
118*c083131cSMarcel Ziswiler			   <IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29	0x06000061>, /* LED_4_RED */
119*c083131cSMarcel Ziswiler			   <IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20	0x06000061>, /* LED_5_GREEN */
120*c083131cSMarcel Ziswiler			   <IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21	0x06000061>; /* LED_5_RED */
121*c083131cSMarcel Ziswiler	};
122*c083131cSMarcel Ziswiler
123*c083131cSMarcel Ziswiler	pinctrl_uart24_forceoff: uart24forceoffgrp {
124*c083131cSMarcel Ziswiler		fsl,pins = <IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25		0x00000021>;
125*c083131cSMarcel Ziswiler	};
126*c083131cSMarcel Ziswiler};
127*c083131cSMarcel Ziswiler
128*c083131cSMarcel Ziswiler/* Apalis SPI1 */
129*c083131cSMarcel Ziswiler&lpspi0 {
130*c083131cSMarcel Ziswiler	status = "okay";
131*c083131cSMarcel Ziswiler};
132*c083131cSMarcel Ziswiler
133*c083131cSMarcel Ziswiler/* Apalis SPI2 */
134*c083131cSMarcel Ziswiler&lpspi2 {
135*c083131cSMarcel Ziswiler	status = "okay";
136*c083131cSMarcel Ziswiler};
137*c083131cSMarcel Ziswiler
138*c083131cSMarcel Ziswiler/* Apalis UART3 */
139*c083131cSMarcel Ziswiler&lpuart0 {
140*c083131cSMarcel Ziswiler	status = "okay";
141*c083131cSMarcel Ziswiler};
142*c083131cSMarcel Ziswiler
143*c083131cSMarcel Ziswiler/* Apalis UART1 */
144*c083131cSMarcel Ziswiler&lpuart1 {
145*c083131cSMarcel Ziswiler	status = "okay";
146*c083131cSMarcel Ziswiler};
147*c083131cSMarcel Ziswiler
148*c083131cSMarcel Ziswiler/* Apalis UART4 */
149*c083131cSMarcel Ziswiler&lpuart2 {
150*c083131cSMarcel Ziswiler	status = "okay";
151*c083131cSMarcel Ziswiler};
152*c083131cSMarcel Ziswiler
153*c083131cSMarcel Ziswiler/* Apalis UART2 */
154*c083131cSMarcel Ziswiler&lpuart3 {
155*c083131cSMarcel Ziswiler	status = "okay";
156*c083131cSMarcel Ziswiler};
157*c083131cSMarcel Ziswiler
158*c083131cSMarcel Ziswiler&lsio_gpio5 {
159*c083131cSMarcel Ziswiler	gpio-line-names = "gpio5-00", "gpio5-01", "gpio5-02", "gpio5-03",
160*c083131cSMarcel Ziswiler			  "gpio5-04", "gpio5-05", "gpio5-06", "gpio5-07",
161*c083131cSMarcel Ziswiler			  "gpio5-08", "gpio5-09", "gpio5-10", "gpio5-11",
162*c083131cSMarcel Ziswiler			  "gpio5-12", "gpio5-13", "gpio5-14", "gpio5-15",
163*c083131cSMarcel Ziswiler			  "gpio5-16", "gpio5-17", "gpio5-18", "gpio5-19",
164*c083131cSMarcel Ziswiler			  "LED-5-GREEN", "LED-5-RED", "gpio5-22", "gpio5-23",
165*c083131cSMarcel Ziswiler			  "gpio5-24", "UART24-FORCEOFF", "gpio5-26",
166*c083131cSMarcel Ziswiler			  "LED-4-GREEN", "gpio5-28", "LED-4-RED", "gpio5-30",
167*c083131cSMarcel Ziswiler			  "gpio5-31";
168*c083131cSMarcel Ziswiler};
169*c083131cSMarcel Ziswiler
170*c083131cSMarcel Ziswiler/* Apalis PWM3, MXM3 pin 6 */
171*c083131cSMarcel Ziswiler&lsio_pwm0 {
172*c083131cSMarcel Ziswiler	status = "okay";
173*c083131cSMarcel Ziswiler};
174*c083131cSMarcel Ziswiler
175*c083131cSMarcel Ziswiler/* Apalis PWM4, MXM3 pin 8 */
176*c083131cSMarcel Ziswiler&lsio_pwm1 {
177*c083131cSMarcel Ziswiler	status = "okay";
178*c083131cSMarcel Ziswiler};
179*c083131cSMarcel Ziswiler
180*c083131cSMarcel Ziswiler/* Apalis PWM1, MXM3 pin 2 */
181*c083131cSMarcel Ziswiler&lsio_pwm2 {
182*c083131cSMarcel Ziswiler	status = "okay";
183*c083131cSMarcel Ziswiler};
184*c083131cSMarcel Ziswiler
185*c083131cSMarcel Ziswiler/* Apalis PWM2, MXM3 pin 4 */
186*c083131cSMarcel Ziswiler&lsio_pwm3 {
187*c083131cSMarcel Ziswiler	status = "okay";
188*c083131cSMarcel Ziswiler};
189*c083131cSMarcel Ziswiler
190*c083131cSMarcel Ziswiler/* TODO: Apalis PCIE1 */
191*c083131cSMarcel Ziswiler
192*c083131cSMarcel Ziswiler/* TODO: Apalis BKL1_PWM */
193*c083131cSMarcel Ziswiler
194*c083131cSMarcel Ziswiler/* TODO: Apalis DAP1 */
195*c083131cSMarcel Ziswiler
196*c083131cSMarcel Ziswiler/* TODO: Apalis Analogue Audio */
197*c083131cSMarcel Ziswiler
198*c083131cSMarcel Ziswiler/* TODO: Apalis SATA1 */
199*c083131cSMarcel Ziswiler
200*c083131cSMarcel Ziswiler/* TODO: Apalis SPDIF1 */
201*c083131cSMarcel Ziswiler
202*c083131cSMarcel Ziswiler/* TODO: Apalis USBH2, Apalis USBH3 and on-module Wi-Fi via on-module HSIC Hub */
203*c083131cSMarcel Ziswiler
204*c083131cSMarcel Ziswiler/* Apalis USBO1 */
205*c083131cSMarcel Ziswiler&usbotg1 {
206*c083131cSMarcel Ziswiler	status = "okay";
207*c083131cSMarcel Ziswiler};
208*c083131cSMarcel Ziswiler
209*c083131cSMarcel Ziswiler/* TODO: Apalis USBH4 SuperSpeed */
210*c083131cSMarcel Ziswiler
211*c083131cSMarcel Ziswiler/* Apalis MMC1 */
212*c083131cSMarcel Ziswiler&usdhc2 {
213*c083131cSMarcel Ziswiler	pinctrl-0 = <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd>;
214*c083131cSMarcel Ziswiler	pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, <&pinctrl_mmc1_cd>;
215*c083131cSMarcel Ziswiler	pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, <&pinctrl_mmc1_cd>;
216*c083131cSMarcel Ziswiler	pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, <&pinctrl_mmc1_cd_sleep>;
217*c083131cSMarcel Ziswiler	bus-width = <4>;
218*c083131cSMarcel Ziswiler	status = "okay";
219*c083131cSMarcel Ziswiler};
220