xref: /linux/arch/arm64/boot/dts/freescale/imx8-apalis-eval-v1.2.dtsi (revision f4fee216df7d28b87d1c9cc60bcebfecb51c1a05)
1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2/*
3 * Copyright 2024 Toradex
4 */
5
6#include "imx8-apalis-eval.dtsi"
7
8/ {
9	reg_3v3_mmc: regulator-3v3-mmc {
10		compatible = "regulator-fixed";
11		pinctrl-names = "default";
12		pinctrl-0 = <&pinctrl_enable_3v3_mmc>;
13		enable-active-high;
14		gpio = <&lsio_gpio5 19 GPIO_ACTIVE_HIGH>;
15		off-on-delay-us = <100000>;
16		regulator-max-microvolt = <3300000>;
17		regulator-min-microvolt = <3300000>;
18		regulator-name = "3.3V_MMC";
19		startup-delay-us = <10000>;
20	};
21
22	reg_3v3_sd: regulator-3v3-sd {
23		compatible = "regulator-fixed";
24		pinctrl-names = "default";
25		pinctrl-0 = <&pinctrl_enable_3v3_sd>;
26		enable-active-high;
27		gpio = <&lsio_gpio5 20 GPIO_ACTIVE_HIGH>;
28		off-on-delay-us = <100000>;
29		regulator-max-microvolt = <3300000>;
30		regulator-min-microvolt = <3300000>;
31		regulator-name = "3.3V_SD";
32		startup-delay-us = <10000>;
33	};
34
35	reg_can1: regulator-can1 {
36		compatible = "regulator-fixed";
37		pinctrl-names = "default";
38		pinctrl-0 = <&pinctrl_enable_can1_power>;
39		enable-active-high;
40		gpio = <&lsio_gpio5 22 GPIO_ACTIVE_HIGH>;
41		regulator-name = "5V_SW_CAN1";
42		startup-delay-us = <10000>;
43	};
44
45	reg_can2: regulator-can2 {
46		compatible = "regulator-fixed";
47		pinctrl-names = "default";
48		pinctrl-0 = <&pinctrl_enable_can2_power>;
49		enable-active-high;
50		gpio = <&lsio_gpio5 21 GPIO_ACTIVE_HIGH>;
51		regulator-name = "5V_SW_CAN2";
52		startup-delay-us = <10000>;
53	};
54};
55
56/* Apalis CAN1 */
57&flexcan1 {
58	xceiver-supply = <&reg_can1>;
59	status = "okay";
60};
61
62/* Apalis CAN2 */
63&flexcan2 {
64	xceiver-supply = <&reg_can2>;
65	status = "okay";
66};
67
68/* Apalis I2C1 */
69&i2c2 {
70	status = "okay";
71
72	/* Power/Current Measurement Sensor */
73	hwmon@40 {
74		compatible = "ti,ina219";
75		reg = <0x40>;
76		shunt-resistor = <5000>;
77	};
78
79	temperature-sensor@4f {
80		compatible = "ti,tmp75c";
81		reg = <0x4f>;
82	};
83
84	eeprom@57 {
85		compatible = "st,24c02", "atmel,24c02";
86		reg = <0x57>;
87	};
88};
89
90/* Apalis MMC1 */
91&usdhc2 {
92	pinctrl-0 = <&pinctrl_usdhc2_4bit>, <&pinctrl_mmc1_cd>;
93	pinctrl-1 = <&pinctrl_usdhc2_4bit_100mhz>, <&pinctrl_mmc1_cd>;
94	pinctrl-2 = <&pinctrl_usdhc2_4bit_200mhz>, <&pinctrl_mmc1_cd>;
95	pinctrl-3 = <&pinctrl_usdhc2_4bit_sleep>, <&pinctrl_mmc1_cd_sleep>;
96	bus-width = <4>;
97	vmmc-supply = <&reg_3v3_mmc>;
98	status = "okay";
99};
100
101/* Apalis SD1 */
102&usdhc3 {
103	vmmc-supply = <&reg_3v3_sd>;
104	status = "okay";
105};
106
107&iomuxc {
108
109	pinctrl_enable_3v3_mmc: enable3v3mmcgrp {
110		fsl,pins = <IMX8QM_USDHC1_DATA4_LSIO_GPIO5_IO19	0x00000021>; /* MXM3_148 */
111	};
112
113	pinctrl_enable_3v3_sd: enable3v3sdgrp {
114		fsl,pins = <IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20	0x00000021>; /* MXM3_152 */
115	};
116
117	pinctrl_enable_can1_power: enablecan1powergrp {
118		fsl,pins = <IMX8QM_USDHC1_DATA7_LSIO_GPIO5_IO22	0x00000021>; /* MXM3_158 */
119	};
120
121	pinctrl_enable_can2_power: enablecan2powergrp {
122		fsl,pins = <IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21	0x00000021>; /* MXM3_156 */
123	};
124};
125