1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Device Tree file for Freescale LS2080A RDB Board. 4 * 5 * Copyright 2016 Freescale Semiconductor, Inc. 6 * Copyright 2017 NXP 7 * 8 * Abhimanyu Saini <abhimanyu.saini@nxp.com> 9 * 10 */ 11 12&esdhc { 13 status = "okay"; 14}; 15 16&ifc { 17 status = "okay"; 18 #address-cells = <2>; 19 #size-cells = <1>; 20 ranges = <0x0 0x0 0x5 0x80000000 0x08000000 21 0x2 0x0 0x5 0x30000000 0x00010000 22 0x3 0x0 0x5 0x20000000 0x00010000>; 23 24 nor@0,0 { 25 #address-cells = <1>; 26 #size-cells = <1>; 27 compatible = "cfi-flash"; 28 reg = <0x0 0x0 0x8000000>; 29 bank-width = <2>; 30 device-width = <1>; 31 }; 32 33 nand@2,0 { 34 compatible = "fsl,ifc-nand"; 35 reg = <0x2 0x0 0x10000>; 36 }; 37 38 cpld@3,0 { 39 reg = <0x3 0x0 0x10000>; 40 compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis"; 41 }; 42 43}; 44 45&i2c0 { 46 status = "okay"; 47 pca9547@75 { 48 compatible = "nxp,pca9547"; 49 reg = <0x75>; 50 #address-cells = <1>; 51 #size-cells = <0>; 52 i2c@1 { 53 #address-cells = <1>; 54 #size-cells = <0>; 55 reg = <0x01>; 56 rtc@68 { 57 compatible = "dallas,ds3232"; 58 reg = <0x68>; 59 }; 60 }; 61 62 i2c@2 { 63 #address-cells = <1>; 64 #size-cells = <0>; 65 reg = <0x02>; 66 67 ina220@40 { 68 compatible = "ti,ina220"; 69 reg = <0x40>; 70 shunt-resistor = <500>; 71 }; 72 }; 73 74 i2c@3 { 75 #address-cells = <1>; 76 #size-cells = <0>; 77 reg = <0x3>; 78 79 adt7481@4c { 80 compatible = "adi,adt7461"; 81 reg = <0x4c>; 82 }; 83 }; 84 }; 85}; 86 87&i2c1 { 88 status = "disabled"; 89}; 90 91&i2c2 { 92 status = "disabled"; 93}; 94 95&i2c3 { 96 status = "disabled"; 97}; 98 99&dspi { 100 status = "okay"; 101 dflash0: n25q512a@0 { 102 #address-cells = <1>; 103 #size-cells = <1>; 104 compatible = "st,m25p80"; 105 spi-max-frequency = <3000000>; 106 reg = <0>; 107 }; 108}; 109 110&qspi { 111 status = "disabled"; 112}; 113 114&sata0 { 115 status = "okay"; 116}; 117 118&sata1 { 119 status = "okay"; 120}; 121 122&usb0 { 123 status = "okay"; 124}; 125 126&usb1 { 127 status = "okay"; 128}; 129