xref: /linux/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts (revision ae22a94997b8a03dcb3c922857c203246711f9d4) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Device Tree file for NXP LS2081A RDB Board.
4 *
5 * Copyright 2017 NXP
6 *
7 * Priyanka Jain <priyanka.jain@nxp.com>
8 *
9 */
10
11/dts-v1/;
12
13#include "fsl-ls2088a.dtsi"
14
15/ {
16	model = "NXP Layerscape 2081A RDB Board";
17	compatible = "fsl,ls2081a-rdb", "fsl,ls2081a";
18
19	aliases {
20		serial0 = &serial0;
21		serial1 = &serial1;
22	};
23
24	chosen {
25		stdout-path = "serial1:115200n8";
26	};
27};
28
29&dspi {
30	status = "okay";
31
32	n25q512a: flash@0 {
33		compatible = "jedec,spi-nor";
34		#address-cells = <1>;
35		#size-cells = <1>;
36		spi-max-frequency = <3000000>;
37		reg = <0>;
38	};
39};
40
41&esdhc {
42	status = "okay";
43};
44
45&i2c0 {
46	status = "okay";
47
48	pca9547: mux@75 {
49		compatible = "nxp,pca9547";
50		reg = <0x75>;
51		#address-cells = <1>;
52		#size-cells = <0>;
53
54		i2c@1 {
55			#address-cells = <1>;
56			#size-cells = <0>;
57			reg = <0x1>;
58
59			rtc@51 {
60				compatible = "nxp,pcf2129";
61				reg = <0x51>;
62			};
63		};
64
65		i2c@2 {
66			#address-cells = <1>;
67			#size-cells = <0>;
68			reg = <0x2>;
69
70			ina220@40 {
71				compatible = "ti,ina220";
72				reg = <0x40>;
73				shunt-resistor = <500>;
74			};
75		};
76
77		i2c@3 {
78			#address-cells = <1>;
79			#size-cells = <0>;
80			reg = <0x3>;
81
82			adt7481@4c {
83				compatible = "adi,adt7461";
84				reg = <0x4c>;
85			};
86		};
87	};
88};
89
90&ifc {
91	status = "disabled";
92};
93
94&qspi {
95	status = "okay";
96
97	s25fs512s0: flash@0 {
98		compatible = "jedec,spi-nor";
99		#address-cells = <1>;
100		#size-cells = <1>;
101		spi-rx-bus-width = <4>;
102		spi-tx-bus-width = <4>;
103		spi-max-frequency = <20000000>;
104		reg = <0>;
105	};
106
107	s25fs512s1: flash@1 {
108		compatible = "jedec,spi-nor";
109		#address-cells = <1>;
110		#size-cells = <1>;
111		spi-rx-bus-width = <4>;
112		spi-tx-bus-width = <4>;
113		spi-max-frequency = <20000000>;
114		reg = <1>;
115	};
116};
117
118&sata0 {
119	status = "okay";
120};
121
122&sata1 {
123	status = "okay";
124};
125
126&usb0 {
127	status = "okay";
128};
129
130&usb1 {
131	status = "okay";
132};
133