1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Device Tree file for NXP LS1028A RDB Board. 4 * 5 * Copyright 2018-2021 NXP 6 * 7 * Harninder Rai <harninder.rai@nxp.com> 8 * 9 */ 10 11/dts-v1/; 12#include "fsl-ls1028a.dtsi" 13 14/ { 15 model = "LS1028A RDB Board"; 16 compatible = "fsl,ls1028a-rdb", "fsl,ls1028a"; 17 18 aliases { 19 crypto = &crypto; 20 serial0 = &duart0; 21 serial1 = &duart1; 22 mmc0 = &esdhc; 23 mmc1 = &esdhc1; 24 rtc1 = &ftm_alarm1; 25 spi0 = &fspi; 26 ethernet0 = &enetc_port0; 27 ethernet1 = &enetc_port2; 28 ethernet2 = &mscc_felix_port0; 29 ethernet3 = &mscc_felix_port1; 30 ethernet4 = &mscc_felix_port2; 31 ethernet5 = &mscc_felix_port3; 32 ethernet6 = &mscc_felix_port4; 33 ethernet7 = &mscc_felix_port5; 34 ethernet8 = &enetc_port3; 35 }; 36 37 chosen { 38 stdout-path = "serial0:115200n8"; 39 }; 40 41 memory@80000000 { 42 device_type = "memory"; 43 reg = <0x0 0x80000000 0x1 0x0000000>; 44 }; 45 46 sys_mclk: clock-mclk { 47 compatible = "fixed-clock"; 48 #clock-cells = <0>; 49 clock-frequency = <25000000>; 50 }; 51 52 reg_1p8v: regulator-1p8v { 53 compatible = "regulator-fixed"; 54 regulator-name = "1P8V"; 55 regulator-min-microvolt = <1800000>; 56 regulator-max-microvolt = <1800000>; 57 regulator-always-on; 58 }; 59 60 sb_3v3: regulator-sb3v3 { 61 compatible = "regulator-fixed"; 62 regulator-name = "3v3_vbus"; 63 regulator-min-microvolt = <3300000>; 64 regulator-max-microvolt = <3300000>; 65 regulator-boot-on; 66 regulator-always-on; 67 }; 68 69 sound { 70 compatible = "simple-audio-card"; 71 simple-audio-card,format = "i2s"; 72 simple-audio-card,widgets = 73 "Microphone", "Microphone Jack", 74 "Headphone", "Headphone Jack", 75 "Speaker", "Speaker Ext", 76 "Line", "Line In Jack"; 77 simple-audio-card,routing = 78 "MIC_IN", "Microphone Jack", 79 "Microphone Jack", "Mic Bias", 80 "LINE_IN", "Line In Jack", 81 "Headphone Jack", "HP_OUT", 82 "Speaker Ext", "LINE_OUT"; 83 84 simple-audio-card,cpu { 85 sound-dai = <&sai4>; 86 frame-master; 87 bitclock-master; 88 }; 89 90 simple-audio-card,codec { 91 sound-dai = <&sgtl5000>; 92 frame-master; 93 bitclock-master; 94 system-clock-frequency = <25000000>; 95 }; 96 }; 97}; 98 99&can0 { 100 status = "okay"; 101 102 can-transceiver { 103 max-bitrate = <5000000>; 104 }; 105}; 106 107&can1 { 108 status = "okay"; 109 110 can-transceiver { 111 max-bitrate = <5000000>; 112 }; 113}; 114 115&duart0 { 116 status = "okay"; 117}; 118 119&duart1 { 120 status = "okay"; 121}; 122 123&enetc_mdio_pf3 { 124 sgmii_phy0: ethernet-phy@2 { 125 reg = <0x2>; 126 }; 127 128 /* VSC8514 QSGMII quad PHY */ 129 qsgmii_phy0: ethernet-phy@10 { 130 reg = <0x10>; 131 }; 132 133 qsgmii_phy1: ethernet-phy@11 { 134 reg = <0x11>; 135 }; 136 137 qsgmii_phy2: ethernet-phy@12 { 138 reg = <0x12>; 139 }; 140 141 qsgmii_phy3: ethernet-phy@13 { 142 reg = <0x13>; 143 }; 144}; 145 146&enetc_port0 { 147 phy-handle = <&sgmii_phy0>; 148 phy-mode = "sgmii"; 149 managed = "in-band-status"; 150 status = "okay"; 151}; 152 153&enetc_port2 { 154 status = "okay"; 155}; 156 157&enetc_port3 { 158 status = "okay"; 159}; 160 161&esdhc { 162 sd-uhs-sdr104; 163 sd-uhs-sdr50; 164 sd-uhs-sdr25; 165 sd-uhs-sdr12; 166 status = "okay"; 167}; 168 169&esdhc1 { 170 mmc-hs200-1_8v; 171 mmc-hs400-1_8v; 172 bus-width = <8>; 173 status = "okay"; 174}; 175 176&fspi { 177 status = "okay"; 178 179 mt35xu02g0: flash@0 { 180 compatible = "jedec,spi-nor"; 181 #address-cells = <1>; 182 #size-cells = <1>; 183 spi-max-frequency = <50000000>; 184 /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ 185 spi-rx-bus-width = <8>; /* 8 SPI Rx lines */ 186 spi-tx-bus-width = <1>; /* 1 SPI Tx line */ 187 reg = <0>; 188 }; 189}; 190 191&ftm_alarm1 { 192 status = "okay"; 193}; 194 195&i2c0 { 196 status = "okay"; 197 198 i2c-mux@77 { 199 compatible = "nxp,pca9847"; 200 reg = <0x77>; 201 #address-cells = <1>; 202 #size-cells = <0>; 203 204 i2c@1 { 205 #address-cells = <1>; 206 #size-cells = <0>; 207 reg = <0x1>; 208 209 sgtl5000: audio-codec@a { 210 #sound-dai-cells = <0>; 211 compatible = "fsl,sgtl5000"; 212 reg = <0xa>; 213 VDDA-supply = <®_1p8v>; 214 VDDIO-supply = <®_1p8v>; 215 clocks = <&sys_mclk>; 216 sclk-strength = <3>; 217 }; 218 }; 219 220 i2c@2 { 221 #address-cells = <1>; 222 #size-cells = <0>; 223 reg = <0x02>; 224 225 current-monitor@40 { 226 compatible = "ti,ina220"; 227 reg = <0x40>; 228 shunt-resistor = <500>; 229 }; 230 }; 231 232 i2c@3 { 233 #address-cells = <1>; 234 #size-cells = <0>; 235 reg = <0x3>; 236 237 temperature-sensor@4c { 238 compatible = "nxp,sa56004"; 239 reg = <0x4c>; 240 vcc-supply = <&sb_3v3>; 241 }; 242 243 rtc@51 { 244 compatible = "nxp,pcf2129"; 245 reg = <0x51>; 246 }; 247 }; 248 }; 249}; 250 251&mscc_felix { 252 status = "okay"; 253}; 254 255&mscc_felix_port0 { 256 label = "swp0"; 257 managed = "in-band-status"; 258 phy-handle = <&qsgmii_phy0>; 259 phy-mode = "qsgmii"; 260 status = "okay"; 261}; 262 263&mscc_felix_port1 { 264 label = "swp1"; 265 managed = "in-band-status"; 266 phy-handle = <&qsgmii_phy1>; 267 phy-mode = "qsgmii"; 268 status = "okay"; 269}; 270 271&mscc_felix_port2 { 272 label = "swp2"; 273 managed = "in-band-status"; 274 phy-handle = <&qsgmii_phy2>; 275 phy-mode = "qsgmii"; 276 status = "okay"; 277}; 278 279&mscc_felix_port3 { 280 label = "swp3"; 281 managed = "in-band-status"; 282 phy-handle = <&qsgmii_phy3>; 283 phy-mode = "qsgmii"; 284 status = "okay"; 285}; 286 287&mscc_felix_port4 { 288 status = "okay"; 289}; 290 291&mscc_felix_port5 { 292 status = "okay"; 293}; 294 295&optee { 296 status = "okay"; 297}; 298 299&pwm0 { 300 status = "okay"; 301}; 302 303&sai4 { 304 status = "okay"; 305}; 306 307&sata { 308 status = "okay"; 309}; 310 311&usb0 { 312 dr_mode = "host"; 313 status = "okay"; 314}; 315 316&usb1 { 317 status = "okay"; 318}; 319