1// SPDX-License-Identifier: GPL-2.0 2/* 3 * WinLink E850-96 board device tree source 4 * 5 * Copyright (C) 2018 Samsung Electronics Co., Ltd. 6 * Copyright (C) 2021 Linaro Ltd. 7 * 8 * Device tree source file for WinLink's E850-96 board which is based on 9 * Samsung Exynos850 SoC. 10 */ 11 12/dts-v1/; 13 14#include "exynos850.dtsi" 15#include <dt-bindings/gpio/gpio.h> 16#include <dt-bindings/input/input.h> 17#include <dt-bindings/leds/common.h> 18 19/ { 20 model = "WinLink E850-96 board"; 21 compatible = "winlink,e850-96", "samsung,exynos850"; 22 23 aliases { 24 ethernet0 = ðernet; 25 mmc0 = &mmc_0; 26 serial0 = &serial_0; 27 }; 28 29 chosen { 30 stdout-path = &serial_0; 31 }; 32 33 connector { 34 compatible = "gpio-usb-b-connector", "usb-b-connector"; 35 label = "micro-USB"; 36 type = "micro"; 37 vbus-supply = <®_usb_host_vbus>; 38 id-gpios = <&gpa0 0 GPIO_ACTIVE_LOW>; 39 pinctrl-names = "default"; 40 pinctrl-0 = <µ_usb_det_pins>; 41 42 port { 43 usb_dr_connector: endpoint { 44 remote-endpoint = <&usb1_drd_sw>; 45 }; 46 }; 47 }; 48 49 memory@80000000 { 50 device_type = "memory"; 51 reg = <0x0 0x80000000 0x80000000>, 52 <0x8 0x80000000 0x80000000>; 53 }; 54 55 gpio-keys { 56 compatible = "gpio-keys"; 57 pinctrl-names = "default"; 58 pinctrl-0 = <&key_voldown_pins &key_volup_pins>; 59 60 volume-down-key { 61 label = "Volume Down"; 62 linux,code = <KEY_VOLUMEDOWN>; 63 gpios = <&gpa1 0 GPIO_ACTIVE_LOW>; 64 }; 65 66 volume-up-key { 67 label = "Volume Up"; 68 linux,code = <KEY_VOLUMEUP>; 69 gpios = <&gpa0 7 GPIO_ACTIVE_LOW>; 70 }; 71 }; 72 73 leds { 74 compatible = "gpio-leds"; 75 76 /* HEART_BEAT_LED */ 77 user_led1: led-1 { 78 label = "yellow:user1"; 79 gpios = <&gpg2 2 GPIO_ACTIVE_HIGH>; 80 color = <LED_COLOR_ID_YELLOW>; 81 function = LED_FUNCTION_HEARTBEAT; 82 linux,default-trigger = "heartbeat"; 83 }; 84 85 /* eMMC_LED */ 86 user_led2: led-2 { 87 label = "yellow:user2"; 88 gpios = <&gpg2 3 GPIO_ACTIVE_HIGH>; 89 color = <LED_COLOR_ID_YELLOW>; 90 linux,default-trigger = "mmc0"; 91 }; 92 93 /* SD_LED */ 94 user_led3: led-3 { 95 label = "white:user3"; 96 gpios = <&gpg2 4 GPIO_ACTIVE_HIGH>; 97 color = <LED_COLOR_ID_WHITE>; 98 function = LED_FUNCTION_SD; 99 linux,default-trigger = "mmc2"; 100 }; 101 102 /* WIFI_LED */ 103 wlan_active_led: led-4 { 104 label = "yellow:wlan"; 105 gpios = <&gpg2 6 GPIO_ACTIVE_HIGH>; 106 color = <LED_COLOR_ID_YELLOW>; 107 function = LED_FUNCTION_WLAN; 108 linux,default-trigger = "phy0tx"; 109 default-state = "off"; 110 }; 111 112 /* BLUETOOTH_LED */ 113 bt_active_led: led-5 { 114 label = "blue:bt"; 115 gpios = <&gpg2 7 GPIO_ACTIVE_HIGH>; 116 color = <LED_COLOR_ID_BLUE>; 117 function = LED_FUNCTION_BLUETOOTH; 118 linux,default-trigger = "hci0-power"; 119 default-state = "off"; 120 }; 121 }; 122 123 /* TODO: Remove this once PMIC is implemented */ 124 reg_dummy: regulator-0 { 125 compatible = "regulator-fixed"; 126 regulator-name = "dummy_reg"; 127 }; 128 129 reg_usb_host_vbus: regulator-1 { 130 compatible = "regulator-fixed"; 131 regulator-name = "usb_host_vbus"; 132 regulator-min-microvolt = <5000000>; 133 regulator-max-microvolt = <5000000>; 134 gpio = <&gpa3 5 GPIO_ACTIVE_LOW>; 135 }; 136 137 reserved-memory { 138 #address-cells = <2>; 139 #size-cells = <1>; 140 ranges; 141 142 secure_mem: memory@bab00000 { 143 reg = <0x0 0xbab00000 0x5500000>; 144 no-map; 145 }; 146 147 ramoops@f0000000 { 148 compatible = "ramoops"; 149 reg = <0x0 0xf0000000 0x200000>; 150 record-size = <0x20000>; 151 console-size = <0x20000>; 152 ftrace-size = <0x100000>; 153 pmsg-size = <0x20000>; 154 }; 155 }; 156 157 /* 158 * RTC clock (XrtcXTI); external, must be 32.768 kHz. 159 * 160 * TODO: Remove this once RTC clock is implemented properly as part of 161 * PMIC driver. 162 */ 163 rtcclk: clock-rtcclk { 164 compatible = "fixed-clock"; 165 clock-output-names = "rtcclk"; 166 #clock-cells = <0>; 167 clock-frequency = <32768>; 168 }; 169}; 170 171&cmu_hsi { 172 clocks = <&oscclk>, <&rtcclk>, 173 <&cmu_top CLK_DOUT_HSI_BUS>, 174 <&cmu_top CLK_DOUT_HSI_MMC_CARD>, 175 <&cmu_top CLK_DOUT_HSI_USB20DRD>; 176 clock-names = "oscclk", "rtcclk", "dout_hsi_bus", 177 "dout_hsi_mmc_card", "dout_hsi_usb20drd"; 178}; 179 180&mmc_0 { 181 status = "okay"; 182 mmc-hs200-1_8v; 183 mmc-hs400-1_8v; 184 cap-mmc-highspeed; 185 non-removable; 186 mmc-hs400-enhanced-strobe; 187 card-detect-delay = <200>; 188 clock-frequency = <800000000>; 189 bus-width = <8>; 190 samsung,dw-mshc-ciu-div = <3>; 191 samsung,dw-mshc-sdr-timing = <0 4>; 192 samsung,dw-mshc-ddr-timing = <2 4>; 193 samsung,dw-mshc-hs400-timing = <0 2>; 194 195 pinctrl-names = "default"; 196 pinctrl-0 = <&sd0_clk_pins &sd0_cmd_pins &sd0_rdqs_pins &sd0_nreset_pins 197 &sd0_bus1_pins &sd0_bus4_pins &sd0_bus8_pins>; 198}; 199 200&oscclk { 201 clock-frequency = <26000000>; 202}; 203 204&pinctrl_alive { 205 key_voldown_pins: key-voldown-pins { 206 samsung,pins = "gpa1-0"; 207 samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>; 208 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 209 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 210 }; 211 212 key_volup_pins: key-volup-pins { 213 samsung,pins = "gpa0-7"; 214 samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>; 215 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 216 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 217 }; 218 219 micro_usb_det_pins: micro-usb-det-pins { 220 samsung,pins = "gpa0-0"; 221 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; 222 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 223 }; 224}; 225 226&rtc { 227 status = "okay"; 228 clocks = <&cmu_apm CLK_GOUT_RTC_PCLK>, <&rtcclk>; 229 clock-names = "rtc", "rtc_src"; 230}; 231 232&serial_0 { 233 status = "okay"; 234 pinctrl-names = "default"; 235 pinctrl-0 = <&uart1_pins>; 236}; 237 238&usbdrd { 239 status = "okay"; 240 vdd10-supply = <®_dummy>; 241 vdd33-supply = <®_dummy>; 242}; 243 244&usbdrd_dwc3 { 245 #address-cells = <1>; 246 #size-cells = <0>; 247 dr_mode = "otg"; 248 usb-role-switch; 249 role-switch-default-mode = "host"; 250 251 hub@1 { 252 compatible = "usb424,9514"; 253 reg = <1>; 254 #address-cells = <1>; 255 #size-cells = <0>; 256 257 ethernet: ethernet@1 { 258 compatible = "usb424,ec00"; 259 reg = <1>; 260 }; 261 }; 262 263 port { 264 usb1_drd_sw: endpoint { 265 remote-endpoint = <&usb_dr_connector>; 266 }; 267 }; 268}; 269 270&usbdrd_phy { 271 status = "okay"; 272}; 273 274&usi_uart { 275 samsung,clkreq-on; /* needed for UART mode */ 276 status = "okay"; 277}; 278 279&watchdog_cl0 { 280 status = "okay"; 281}; 282 283&watchdog_cl1 { 284 status = "okay"; 285}; 286