xref: /linux/arch/arm64/boot/dts/exynos/exynos7885.dtsi (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
106874015SDavid Virag// SPDX-License-Identifier: GPL-2.0
206874015SDavid Virag/*
306874015SDavid Virag * Samsung Exynos7885 SoC device tree source
406874015SDavid Virag *
506874015SDavid Virag * Copyright (c) 2021 Samsung Electronics Co., Ltd.
606874015SDavid Virag * Copyright (c) 2021 Dávid Virág
706874015SDavid Virag */
806874015SDavid Virag
906874015SDavid Virag#include <dt-bindings/clock/exynos7885.h>
1006874015SDavid Virag#include <dt-bindings/interrupt-controller/arm-gic.h>
1106874015SDavid Virag
1206874015SDavid Virag/ {
1306874015SDavid Virag	compatible = "samsung,exynos7885";
1406874015SDavid Virag	#address-cells = <2>;
1506874015SDavid Virag	#size-cells = <1>;
1606874015SDavid Virag
1706874015SDavid Virag	interrupt-parent = <&gic>;
1806874015SDavid Virag
1906874015SDavid Virag	aliases {
2006874015SDavid Virag		pinctrl0 = &pinctrl_alive;
2106874015SDavid Virag		pinctrl1 = &pinctrl_dispaud;
2206874015SDavid Virag		pinctrl2 = &pinctrl_fsys;
2306874015SDavid Virag		pinctrl3 = &pinctrl_top;
2406874015SDavid Virag	};
2506874015SDavid Virag
2606874015SDavid Virag	arm-a53-pmu {
2706874015SDavid Virag		compatible = "arm,cortex-a53-pmu";
2806874015SDavid Virag		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
2906874015SDavid Virag			     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
3006874015SDavid Virag			     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
3106874015SDavid Virag			     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
3206874015SDavid Virag			     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
3306874015SDavid Virag			     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
3406874015SDavid Virag		interrupt-affinity = <&cpu0>,
3506874015SDavid Virag				     <&cpu1>,
3606874015SDavid Virag				     <&cpu2>,
3706874015SDavid Virag				     <&cpu3>,
3806874015SDavid Virag				     <&cpu4>,
3906874015SDavid Virag				     <&cpu5>;
4006874015SDavid Virag	};
4106874015SDavid Virag
4206874015SDavid Virag	arm-a73-pmu {
4306874015SDavid Virag		compatible = "arm,cortex-a73-pmu";
4406874015SDavid Virag		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
4506874015SDavid Virag			     <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
4606874015SDavid Virag		interrupt-affinity = <&cpu6>,
4706874015SDavid Virag				     <&cpu7>;
4806874015SDavid Virag	};
4906874015SDavid Virag
5006874015SDavid Virag	cpus {
5106874015SDavid Virag		#address-cells = <1>;
5206874015SDavid Virag		#size-cells = <0>;
5306874015SDavid Virag
5406874015SDavid Virag		cpu-map {
5506874015SDavid Virag			cluster0 {
5606874015SDavid Virag				core0 {
5706874015SDavid Virag					cpu = <&cpu0>;
5806874015SDavid Virag				};
5906874015SDavid Virag				core1 {
6006874015SDavid Virag					cpu = <&cpu1>;
6106874015SDavid Virag				};
6206874015SDavid Virag				core2 {
6306874015SDavid Virag					cpu = <&cpu2>;
6406874015SDavid Virag				};
6506874015SDavid Virag				core3 {
6606874015SDavid Virag					cpu = <&cpu3>;
6706874015SDavid Virag				};
6806874015SDavid Virag				core4 {
6906874015SDavid Virag					cpu = <&cpu4>;
7006874015SDavid Virag				};
7106874015SDavid Virag				core5 {
7206874015SDavid Virag					cpu = <&cpu5>;
7306874015SDavid Virag				};
7406874015SDavid Virag			};
7506874015SDavid Virag
7606874015SDavid Virag			cluster1 {
7706874015SDavid Virag				core0 {
7806874015SDavid Virag					cpu = <&cpu6>;
7906874015SDavid Virag				};
8006874015SDavid Virag				core1 {
8106874015SDavid Virag					cpu = <&cpu7>;
8206874015SDavid Virag				};
8306874015SDavid Virag			};
8406874015SDavid Virag		};
8506874015SDavid Virag
8606874015SDavid Virag		cpu0: cpu@100 {
8706874015SDavid Virag			device_type = "cpu";
8806874015SDavid Virag			compatible = "arm,cortex-a53";
8906874015SDavid Virag			reg = <0x100>;
9006874015SDavid Virag			enable-method = "psci";
9106874015SDavid Virag		};
9206874015SDavid Virag
9306874015SDavid Virag		cpu1: cpu@101 {
9406874015SDavid Virag			device_type = "cpu";
9506874015SDavid Virag			compatible = "arm,cortex-a53";
9606874015SDavid Virag			reg = <0x101>;
9706874015SDavid Virag			enable-method = "psci";
9806874015SDavid Virag		};
9906874015SDavid Virag
10006874015SDavid Virag		cpu2: cpu@102 {
10106874015SDavid Virag			device_type = "cpu";
10206874015SDavid Virag			compatible = "arm,cortex-a53";
10306874015SDavid Virag			reg = <0x102>;
10406874015SDavid Virag			enable-method = "psci";
10506874015SDavid Virag		};
10606874015SDavid Virag
10706874015SDavid Virag		cpu3: cpu@103 {
10806874015SDavid Virag			device_type = "cpu";
10906874015SDavid Virag			compatible = "arm,cortex-a53";
11006874015SDavid Virag			reg = <0x103>;
11106874015SDavid Virag			enable-method = "psci";
11206874015SDavid Virag		};
11306874015SDavid Virag
11406874015SDavid Virag		cpu4: cpu@200 {
11506874015SDavid Virag			device_type = "cpu";
11606874015SDavid Virag			compatible = "arm,cortex-a53";
11706874015SDavid Virag			reg = <0x200>;
11806874015SDavid Virag			enable-method = "psci";
11906874015SDavid Virag		};
12006874015SDavid Virag
12106874015SDavid Virag		cpu5: cpu@201 {
12206874015SDavid Virag			device_type = "cpu";
12306874015SDavid Virag			compatible = "arm,cortex-a53";
12406874015SDavid Virag			reg = <0x201>;
12506874015SDavid Virag			enable-method = "psci";
12606874015SDavid Virag		};
12706874015SDavid Virag
12806874015SDavid Virag		cpu6: cpu@0 {
12906874015SDavid Virag			device_type = "cpu";
13006874015SDavid Virag			compatible = "arm,cortex-a73";
13106874015SDavid Virag			reg = <0x0>;
13206874015SDavid Virag			enable-method = "psci";
13306874015SDavid Virag		};
13406874015SDavid Virag
13506874015SDavid Virag		cpu7: cpu@1 {
13606874015SDavid Virag			device_type = "cpu";
13706874015SDavid Virag			compatible = "arm,cortex-a73";
13806874015SDavid Virag			reg = <0x1>;
13906874015SDavid Virag			enable-method = "psci";
14006874015SDavid Virag		};
14106874015SDavid Virag	};
14206874015SDavid Virag
14306874015SDavid Virag	psci {
14406874015SDavid Virag		compatible = "arm,psci";
14506874015SDavid Virag		method = "smc";
14606874015SDavid Virag		cpu_suspend = <0xc4000001>;
14706874015SDavid Virag		cpu_off = <0x84000002>;
14806874015SDavid Virag		cpu_on = <0xc4000003>;
14906874015SDavid Virag	};
15006874015SDavid Virag
15106874015SDavid Virag	timer {
15206874015SDavid Virag		compatible = "arm,armv8-timer";
15306874015SDavid Virag		/* Hypervisor Virtual Timer interrupt is not wired to GIC */
15406874015SDavid Virag		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
15506874015SDavid Virag			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
15606874015SDavid Virag			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
15706874015SDavid Virag			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
15806874015SDavid Virag	};
15906874015SDavid Virag
16006874015SDavid Virag	fixed-rate-clocks {
16106874015SDavid Virag		oscclk: osc-clock {
16206874015SDavid Virag			compatible = "fixed-clock";
16306874015SDavid Virag			#clock-cells = <0>;
16406874015SDavid Virag			clock-output-names = "oscclk";
16506874015SDavid Virag		};
16606874015SDavid Virag	};
16706874015SDavid Virag
16806874015SDavid Virag	soc: soc@0 {
16906874015SDavid Virag		compatible = "simple-bus";
17006874015SDavid Virag		#address-cells = <1>;
17106874015SDavid Virag		#size-cells = <1>;
17206874015SDavid Virag		ranges = <0x0 0x0 0x0 0x20000000>;
17306874015SDavid Virag
17406874015SDavid Virag		chipid@10000000 {
17506874015SDavid Virag			compatible = "samsung,exynos850-chipid";
17606874015SDavid Virag			reg = <0x10000000 0x24>;
17706874015SDavid Virag		};
17806874015SDavid Virag
17906874015SDavid Virag		gic: interrupt-controller@12301000 {
18006874015SDavid Virag			compatible = "arm,gic-400";
18106874015SDavid Virag			#interrupt-cells = <3>;
18206874015SDavid Virag			#address-cells = <0>;
18306874015SDavid Virag			interrupt-controller;
18406874015SDavid Virag			reg = <0x12301000 0x1000>,
18506874015SDavid Virag			      <0x12302000 0x2000>,
18606874015SDavid Virag			      <0x12304000 0x2000>,
18706874015SDavid Virag			      <0x12306000 0x2000>;
18806874015SDavid Virag			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) |
18906874015SDavid Virag						 IRQ_TYPE_LEVEL_HIGH)>;
19006874015SDavid Virag		};
19106874015SDavid Virag
19206874015SDavid Virag		cmu_peri: clock-controller@10010000 {
19306874015SDavid Virag			compatible = "samsung,exynos7885-cmu-peri";
19406874015SDavid Virag			reg = <0x10010000 0x8000>;
19506874015SDavid Virag			#clock-cells = <1>;
19606874015SDavid Virag
19706874015SDavid Virag			clocks = <&oscclk>,
19806874015SDavid Virag				 <&cmu_top CLK_DOUT_PERI_BUS>,
19906874015SDavid Virag				 <&cmu_top CLK_DOUT_PERI_SPI0>,
20006874015SDavid Virag				 <&cmu_top CLK_DOUT_PERI_SPI1>,
20106874015SDavid Virag				 <&cmu_top CLK_DOUT_PERI_UART0>,
20206874015SDavid Virag				 <&cmu_top CLK_DOUT_PERI_UART1>,
20306874015SDavid Virag				 <&cmu_top CLK_DOUT_PERI_UART2>,
20406874015SDavid Virag				 <&cmu_top CLK_DOUT_PERI_USI0>,
20506874015SDavid Virag				 <&cmu_top CLK_DOUT_PERI_USI1>,
20606874015SDavid Virag				 <&cmu_top CLK_DOUT_PERI_USI2>;
20706874015SDavid Virag			clock-names = "oscclk",
20806874015SDavid Virag				      "dout_peri_bus",
20906874015SDavid Virag				      "dout_peri_spi0",
21006874015SDavid Virag				      "dout_peri_spi1",
21106874015SDavid Virag				      "dout_peri_uart0",
21206874015SDavid Virag				      "dout_peri_uart1",
21306874015SDavid Virag				      "dout_peri_uart2",
21406874015SDavid Virag				      "dout_peri_usi0",
21506874015SDavid Virag				      "dout_peri_usi1",
21606874015SDavid Virag				      "dout_peri_usi2";
21706874015SDavid Virag		};
21806874015SDavid Virag
21906874015SDavid Virag		cmu_core: clock-controller@12000000 {
22006874015SDavid Virag			compatible = "samsung,exynos7885-cmu-core";
22106874015SDavid Virag			reg = <0x12000000 0x8000>;
22206874015SDavid Virag			#clock-cells = <1>;
22306874015SDavid Virag
22406874015SDavid Virag			clocks = <&oscclk>,
22506874015SDavid Virag				 <&cmu_top CLK_DOUT_CORE_BUS>,
22606874015SDavid Virag				 <&cmu_top CLK_DOUT_CORE_CCI>,
22706874015SDavid Virag				 <&cmu_top CLK_DOUT_CORE_G3D>;
22806874015SDavid Virag			clock-names = "oscclk",
22906874015SDavid Virag				      "dout_core_bus",
23006874015SDavid Virag				      "dout_core_cci",
23106874015SDavid Virag				      "dout_core_g3d";
23206874015SDavid Virag		};
23306874015SDavid Virag
23406874015SDavid Virag		cmu_top: clock-controller@12060000 {
23506874015SDavid Virag			compatible = "samsung,exynos7885-cmu-top";
23606874015SDavid Virag			reg = <0x12060000 0x8000>;
23706874015SDavid Virag			#clock-cells = <1>;
23806874015SDavid Virag
23906874015SDavid Virag			clocks = <&oscclk>;
24006874015SDavid Virag			clock-names = "oscclk";
24106874015SDavid Virag		};
24206874015SDavid Virag
243ced37411SDavid Virag		cmu_fsys: clock-controller@13400000 {
244ced37411SDavid Virag			compatible = "samsung,exynos7885-cmu-fsys";
245ced37411SDavid Virag			reg = <0x13400000 0x8000>;
246ced37411SDavid Virag			#clock-cells = <1>;
247ced37411SDavid Virag
248ced37411SDavid Virag			clocks = <&oscclk>,
249ced37411SDavid Virag				 <&cmu_top CLK_DOUT_FSYS_BUS>,
250ced37411SDavid Virag				 <&cmu_top CLK_DOUT_FSYS_MMC_CARD>,
251ced37411SDavid Virag				 <&cmu_top CLK_DOUT_FSYS_MMC_EMBD>,
252ced37411SDavid Virag				 <&cmu_top CLK_DOUT_FSYS_MMC_SDIO>,
253ced37411SDavid Virag				 <&cmu_top CLK_DOUT_FSYS_USB30DRD>;
254ced37411SDavid Virag			clock-names = "oscclk",
255ced37411SDavid Virag				      "dout_fsys_bus",
256ced37411SDavid Virag				      "dout_fsys_mmc_card",
257ced37411SDavid Virag				      "dout_fsys_mmc_embd",
258ced37411SDavid Virag				      "dout_fsys_mmc_sdio",
259ced37411SDavid Virag				      "dout_fsys_usb30drd";
260ced37411SDavid Virag		};
261ced37411SDavid Virag
26206874015SDavid Virag		pinctrl_alive: pinctrl@11cb0000 {
26306874015SDavid Virag			compatible = "samsung,exynos7885-pinctrl";
26406874015SDavid Virag			reg = <0x11cb0000 0x1000>;
26506874015SDavid Virag
26606874015SDavid Virag			wakeup-interrupt-controller {
26706874015SDavid Virag				compatible = "samsung,exynos7-wakeup-eint";
26806874015SDavid Virag				interrupt-parent = <&gic>;
26906874015SDavid Virag				interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
27006874015SDavid Virag			};
27106874015SDavid Virag		};
27206874015SDavid Virag
27306874015SDavid Virag		pinctrl_fsys: pinctrl@13430000 {
27406874015SDavid Virag			compatible = "samsung,exynos7885-pinctrl";
27506874015SDavid Virag			reg = <0x13430000 0x1000>;
27606874015SDavid Virag			interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
27706874015SDavid Virag		};
27806874015SDavid Virag
27906874015SDavid Virag		pinctrl_top: pinctrl@139b0000 {
28006874015SDavid Virag			compatible = "samsung,exynos7885-pinctrl";
28106874015SDavid Virag			reg = <0x139b0000 0x1000>;
28206874015SDavid Virag			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
28306874015SDavid Virag		};
28406874015SDavid Virag
28506874015SDavid Virag		pinctrl_dispaud: pinctrl@148f0000 {
28606874015SDavid Virag			compatible = "samsung,exynos7885-pinctrl";
28706874015SDavid Virag			reg = <0x148f0000 0x1000>;
28806874015SDavid Virag			interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
28906874015SDavid Virag		};
29006874015SDavid Virag
29106874015SDavid Virag		pmu_system_controller: system-controller@11c80000 {
29206874015SDavid Virag			compatible = "samsung,exynos7-pmu", "syscon";
29306874015SDavid Virag			reg = <0x11c80000 0x10000>;
29406874015SDavid Virag		};
29506874015SDavid Virag
296ced37411SDavid Virag		mmc_0: mmc@13500000 {
297ced37411SDavid Virag			compatible = "samsung,exynos7-dw-mshc-smu";
298ced37411SDavid Virag			reg = <0x13500000 0x2000>;
299ced37411SDavid Virag			interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
300ced37411SDavid Virag			#address-cells = <1>;
301ced37411SDavid Virag			#size-cells = <0>;
302ced37411SDavid Virag			clocks = <&cmu_fsys CLK_GOUT_MMC_EMBD_ACLK>,
303ced37411SDavid Virag				 <&cmu_fsys CLK_GOUT_MMC_EMBD_SDCLKIN>;
304ced37411SDavid Virag			clock-names = "biu", "ciu";
305ced37411SDavid Virag			fifo-depth = <0x40>;
306ced37411SDavid Virag			status = "disabled";
307ced37411SDavid Virag		};
308ced37411SDavid Virag
30906874015SDavid Virag		serial_0: serial@13800000 {
31006874015SDavid Virag			compatible = "samsung,exynos5433-uart";
31106874015SDavid Virag			reg = <0x13800000 0x100>;
31206874015SDavid Virag			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
31306874015SDavid Virag			pinctrl-names = "default";
31406874015SDavid Virag			pinctrl-0 = <&uart0_bus>;
315f84d83d8SDavid Virag			clocks = <&cmu_peri CLK_GOUT_UART0_PCLK>,
316f84d83d8SDavid Virag				 <&cmu_peri CLK_GOUT_UART0_EXT_UCLK>;
31706874015SDavid Virag			clock-names = "uart", "clk_uart_baud0";
31806874015SDavid Virag			samsung,uart-fifosize = <64>;
31906874015SDavid Virag			status = "disabled";
32006874015SDavid Virag		};
32106874015SDavid Virag
32206874015SDavid Virag		serial_1: serial@13810000 {
32306874015SDavid Virag			compatible = "samsung,exynos5433-uart";
32406874015SDavid Virag			reg = <0x13810000 0x100>;
32506874015SDavid Virag			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
32606874015SDavid Virag			pinctrl-names = "default";
32706874015SDavid Virag			pinctrl-0 = <&uart1_bus>;
328f84d83d8SDavid Virag			clocks = <&cmu_peri CLK_GOUT_UART1_PCLK>,
329f84d83d8SDavid Virag				 <&cmu_peri CLK_GOUT_UART1_EXT_UCLK>;
33006874015SDavid Virag			clock-names = "uart", "clk_uart_baud0";
33106874015SDavid Virag			samsung,uart-fifosize = <256>;
33206874015SDavid Virag			status = "disabled";
33306874015SDavid Virag		};
33406874015SDavid Virag
33506874015SDavid Virag		serial_2: serial@13820000 {
33606874015SDavid Virag			compatible = "samsung,exynos5433-uart";
33706874015SDavid Virag			reg = <0x13820000 0x100>;
33806874015SDavid Virag			interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>;
33906874015SDavid Virag			pinctrl-names = "default";
34006874015SDavid Virag			pinctrl-0 = <&uart2_bus>;
341f84d83d8SDavid Virag			clocks = <&cmu_peri CLK_GOUT_UART2_PCLK>,
342f84d83d8SDavid Virag				 <&cmu_peri CLK_GOUT_UART2_EXT_UCLK>;
34306874015SDavid Virag			clock-names = "uart", "clk_uart_baud0";
34406874015SDavid Virag			samsung,uart-fifosize = <256>;
34506874015SDavid Virag			status = "disabled";
34606874015SDavid Virag		};
34706874015SDavid Virag
34806874015SDavid Virag		i2c_0: i2c@13830000 {
34906874015SDavid Virag			compatible = "samsung,s3c2440-i2c";
35006874015SDavid Virag			reg = <0x13830000 0x100>;
35106874015SDavid Virag			interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
35206874015SDavid Virag			#address-cells = <1>;
35306874015SDavid Virag			#size-cells = <0>;
35406874015SDavid Virag			pinctrl-names = "default";
35506874015SDavid Virag			pinctrl-0 = <&i2c0_bus>;
35606874015SDavid Virag			clocks = <&cmu_peri CLK_GOUT_I2C0_PCLK>;
35706874015SDavid Virag			clock-names = "i2c";
35806874015SDavid Virag			status = "disabled";
35906874015SDavid Virag		};
36006874015SDavid Virag
36106874015SDavid Virag		i2c_1: i2c@13840000 {
36206874015SDavid Virag			compatible = "samsung,s3c2440-i2c";
36306874015SDavid Virag			reg = <0x13840000 0x100>;
36406874015SDavid Virag			interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
36506874015SDavid Virag			#address-cells = <1>;
36606874015SDavid Virag			#size-cells = <0>;
36706874015SDavid Virag			pinctrl-names = "default";
36806874015SDavid Virag			pinctrl-0 = <&i2c1_bus>;
36906874015SDavid Virag			clocks = <&cmu_peri CLK_GOUT_I2C1_PCLK>;
37006874015SDavid Virag			clock-names = "i2c";
37106874015SDavid Virag			status = "disabled";
37206874015SDavid Virag		};
37306874015SDavid Virag
37406874015SDavid Virag		i2c_2: i2c@13850000 {
37506874015SDavid Virag			compatible = "samsung,s3c2440-i2c";
37606874015SDavid Virag			reg = <0x13850000 0x100>;
37706874015SDavid Virag			interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>;
37806874015SDavid Virag			#address-cells = <1>;
37906874015SDavid Virag			#size-cells = <0>;
38006874015SDavid Virag			pinctrl-names = "default";
38106874015SDavid Virag			pinctrl-0 = <&i2c2_bus>;
38206874015SDavid Virag			clocks = <&cmu_peri CLK_GOUT_I2C2_PCLK>;
38306874015SDavid Virag			clock-names = "i2c";
38406874015SDavid Virag			status = "disabled";
38506874015SDavid Virag		};
38606874015SDavid Virag
38706874015SDavid Virag		i2c_3: i2c@13860000 {
38806874015SDavid Virag			compatible = "samsung,s3c2440-i2c";
38906874015SDavid Virag			reg = <0x13860000 0x100>;
39006874015SDavid Virag			interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
39106874015SDavid Virag			#address-cells = <1>;
39206874015SDavid Virag			#size-cells = <0>;
39306874015SDavid Virag			pinctrl-names = "default";
39406874015SDavid Virag			pinctrl-0 = <&i2c3_bus>;
39506874015SDavid Virag			clocks = <&cmu_peri CLK_GOUT_I2C3_PCLK>;
39606874015SDavid Virag			clock-names = "i2c";
39706874015SDavid Virag			status = "disabled";
39806874015SDavid Virag		};
39906874015SDavid Virag
40006874015SDavid Virag		i2c_4: i2c@13870000 {
40106874015SDavid Virag			compatible = "samsung,s3c2440-i2c";
40206874015SDavid Virag			reg = <0x13870000 0x100>;
40306874015SDavid Virag			interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
40406874015SDavid Virag			#address-cells = <1>;
40506874015SDavid Virag			#size-cells = <0>;
40606874015SDavid Virag			pinctrl-names = "default";
40706874015SDavid Virag			pinctrl-0 = <&i2c4_bus>;
40806874015SDavid Virag			clocks = <&cmu_peri CLK_GOUT_I2C4_PCLK>;
40906874015SDavid Virag			clock-names = "i2c";
41006874015SDavid Virag			status = "disabled";
41106874015SDavid Virag		};
41206874015SDavid Virag
41306874015SDavid Virag		i2c_5: i2c@13880000 {
41406874015SDavid Virag			compatible = "samsung,s3c2440-i2c";
41506874015SDavid Virag			reg = <0x13880000 0x100>;
41606874015SDavid Virag			interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
41706874015SDavid Virag			#address-cells = <1>;
41806874015SDavid Virag			#size-cells = <0>;
41906874015SDavid Virag			pinctrl-names = "default";
42006874015SDavid Virag			pinctrl-0 = <&i2c5_bus>;
42106874015SDavid Virag			clocks = <&cmu_peri CLK_GOUT_I2C5_PCLK>;
42206874015SDavid Virag			clock-names = "i2c";
42306874015SDavid Virag			status = "disabled";
42406874015SDavid Virag		};
42506874015SDavid Virag
42606874015SDavid Virag		i2c_6: i2c@13890000 {
42706874015SDavid Virag			compatible = "samsung,s3c2440-i2c";
42806874015SDavid Virag			reg = <0x13890000 0x100>;
42906874015SDavid Virag			interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
43006874015SDavid Virag			#address-cells = <1>;
43106874015SDavid Virag			#size-cells = <0>;
43206874015SDavid Virag			pinctrl-names = "default";
43306874015SDavid Virag			pinctrl-0 = <&i2c6_bus>;
43406874015SDavid Virag			clocks = <&cmu_peri CLK_GOUT_I2C6_PCLK>;
43506874015SDavid Virag			clock-names = "i2c";
43606874015SDavid Virag			status = "disabled";
43706874015SDavid Virag		};
43806874015SDavid Virag
43906874015SDavid Virag		i2c_7: i2c@11cd0000 {
44006874015SDavid Virag			compatible = "samsung,s3c2440-i2c";
44106874015SDavid Virag			reg = <0x11cd0000 0x100>;
44206874015SDavid Virag			interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
44306874015SDavid Virag			#address-cells = <1>;
44406874015SDavid Virag			#size-cells = <0>;
44506874015SDavid Virag			pinctrl-names = "default";
44606874015SDavid Virag			pinctrl-0 = <&i2c7_bus>;
44706874015SDavid Virag			clocks = <&cmu_peri CLK_GOUT_I2C7_PCLK>;
44806874015SDavid Virag			clock-names = "i2c";
44906874015SDavid Virag			status = "disabled";
45006874015SDavid Virag		};
45106874015SDavid Virag	};
45206874015SDavid Virag};
45306874015SDavid Virag
45406874015SDavid Virag#include "exynos7885-pinctrl.dtsi"
455*724ba675SRob Herring#include "arm/samsung/exynos-syscon-restart.dtsi"
456