1*3ae2b744SSungMin Park// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*3ae2b744SSungMin Park/* 3*3ae2b744SSungMin Park * Axis ARTPEC-9 SoC pin-mux and pin-config device tree source 4*3ae2b744SSungMin Park * 5*3ae2b744SSungMin Park * Copyright (c) 2025 Samsung Electronics Co., Ltd. 6*3ae2b744SSungMin Park * https://www.samsung.com 7*3ae2b744SSungMin Park * Copyright (c) 2025 Axis Communications AB. 8*3ae2b744SSungMin Park * https://www.axis.com 9*3ae2b744SSungMin Park */ 10*3ae2b744SSungMin Park 11*3ae2b744SSungMin Park#include "artpec-pinctrl.h" 12*3ae2b744SSungMin Park 13*3ae2b744SSungMin Park&pinctrl_fsys0 { 14*3ae2b744SSungMin Park gpe0: gpe0-gpio-bank { 15*3ae2b744SSungMin Park gpio-controller; 16*3ae2b744SSungMin Park #gpio-cells = <2>; 17*3ae2b744SSungMin Park interrupt-controller; 18*3ae2b744SSungMin Park #interrupt-cells = <2>; 19*3ae2b744SSungMin Park }; 20*3ae2b744SSungMin Park 21*3ae2b744SSungMin Park gpe1: gpe1-gpio-bank { 22*3ae2b744SSungMin Park gpio-controller; 23*3ae2b744SSungMin Park #gpio-cells = <2>; 24*3ae2b744SSungMin Park interrupt-controller; 25*3ae2b744SSungMin Park #interrupt-cells = <2>; 26*3ae2b744SSungMin Park }; 27*3ae2b744SSungMin Park 28*3ae2b744SSungMin Park gpe2: gpe2-gpio-bank { 29*3ae2b744SSungMin Park gpio-controller; 30*3ae2b744SSungMin Park #gpio-cells = <2>; 31*3ae2b744SSungMin Park interrupt-controller; 32*3ae2b744SSungMin Park #interrupt-cells = <2>; 33*3ae2b744SSungMin Park }; 34*3ae2b744SSungMin Park 35*3ae2b744SSungMin Park gpe3: gpe3-gpio-bank { 36*3ae2b744SSungMin Park gpio-controller; 37*3ae2b744SSungMin Park #gpio-cells = <2>; 38*3ae2b744SSungMin Park interrupt-controller; 39*3ae2b744SSungMin Park #interrupt-cells = <2>; 40*3ae2b744SSungMin Park }; 41*3ae2b744SSungMin Park 42*3ae2b744SSungMin Park gpe4: gpe4-gpio-bank { 43*3ae2b744SSungMin Park gpio-controller; 44*3ae2b744SSungMin Park #gpio-cells = <2>; 45*3ae2b744SSungMin Park interrupt-controller; 46*3ae2b744SSungMin Park #interrupt-cells = <2>; 47*3ae2b744SSungMin Park }; 48*3ae2b744SSungMin Park 49*3ae2b744SSungMin Park gpf0: gpf0-gpio-bank { 50*3ae2b744SSungMin Park gpio-controller; 51*3ae2b744SSungMin Park #gpio-cells = <2>; 52*3ae2b744SSungMin Park interrupt-controller; 53*3ae2b744SSungMin Park #interrupt-cells = <2>; 54*3ae2b744SSungMin Park }; 55*3ae2b744SSungMin Park 56*3ae2b744SSungMin Park gpf1: gpf1-gpio-bank { 57*3ae2b744SSungMin Park gpio-controller; 58*3ae2b744SSungMin Park #gpio-cells = <2>; 59*3ae2b744SSungMin Park interrupt-controller; 60*3ae2b744SSungMin Park #interrupt-cells = <2>; 61*3ae2b744SSungMin Park }; 62*3ae2b744SSungMin Park 63*3ae2b744SSungMin Park gpi0: gpi0-gpio-bank { 64*3ae2b744SSungMin Park gpio-controller; 65*3ae2b744SSungMin Park #gpio-cells = <2>; 66*3ae2b744SSungMin Park interrupt-controller; 67*3ae2b744SSungMin Park #interrupt-cells = <2>; 68*3ae2b744SSungMin Park }; 69*3ae2b744SSungMin Park 70*3ae2b744SSungMin Park gps0: gps0-gpio-bank { 71*3ae2b744SSungMin Park gpio-controller; 72*3ae2b744SSungMin Park #gpio-cells = <2>; 73*3ae2b744SSungMin Park interrupt-controller; 74*3ae2b744SSungMin Park #interrupt-cells = <2>; 75*3ae2b744SSungMin Park }; 76*3ae2b744SSungMin Park 77*3ae2b744SSungMin Park gps1: gps1-gpio-bank { 78*3ae2b744SSungMin Park gpio-controller; 79*3ae2b744SSungMin Park #gpio-cells = <2>; 80*3ae2b744SSungMin Park interrupt-controller; 81*3ae2b744SSungMin Park #interrupt-cells = <2>; 82*3ae2b744SSungMin Park }; 83*3ae2b744SSungMin Park}; 84*3ae2b744SSungMin Park 85*3ae2b744SSungMin Park&pinctrl_fsys1 { 86*3ae2b744SSungMin Park gpu0: gpu0-gpio-bank { 87*3ae2b744SSungMin Park gpio-controller; 88*3ae2b744SSungMin Park #gpio-cells = <2>; 89*3ae2b744SSungMin Park interrupt-controller; 90*3ae2b744SSungMin Park #interrupt-cells = <2>; 91*3ae2b744SSungMin Park }; 92*3ae2b744SSungMin Park 93*3ae2b744SSungMin Park serial0_bus: serial0-bus-pins { 94*3ae2b744SSungMin Park samsung,pins = "gpu0-0", "gpu0-1"; 95*3ae2b744SSungMin Park samsung,pin-function = <ARTPEC_PIN_FUNC_2>; 96*3ae2b744SSungMin Park samsung,pin-pud = <ARTPEC_PIN_PULL_UP>; 97*3ae2b744SSungMin Park samsung,pin-drv = <ARTPEC_PIN_DRV_SR3>; 98*3ae2b744SSungMin Park }; 99*3ae2b744SSungMin Park}; 100*3ae2b744SSungMin Park 101*3ae2b744SSungMin Park&pinctrl_peric { 102*3ae2b744SSungMin Park gpa0: gpa0-gpio-bank { 103*3ae2b744SSungMin Park gpio-controller; 104*3ae2b744SSungMin Park #gpio-cells = <2>; 105*3ae2b744SSungMin Park interrupt-controller; 106*3ae2b744SSungMin Park #interrupt-cells = <2>; 107*3ae2b744SSungMin Park }; 108*3ae2b744SSungMin Park 109*3ae2b744SSungMin Park gpa1: gpa1-gpio-bank { 110*3ae2b744SSungMin Park gpio-controller; 111*3ae2b744SSungMin Park #gpio-cells = <2>; 112*3ae2b744SSungMin Park interrupt-controller; 113*3ae2b744SSungMin Park #interrupt-cells = <2>; 114*3ae2b744SSungMin Park }; 115*3ae2b744SSungMin Park}; 116