1/* 2 * BSD LICENSE 3 * 4 * Copyright(c) 2016-2017 Broadcom. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * * Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in 14 * the documentation and/or other materials provided with the 15 * distribution. 16 * * Neither the name of Broadcom nor the names of its 17 * contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33#include <dt-bindings/pinctrl/brcm,pinctrl-stingray.h> 34 35 pinconf: pinconf@140000 { 36 compatible = "pinconf-single"; 37 reg = <0x00140000 0x250>; 38 pinctrl-single,register-width = <32>; 39 40 /* pinconf functions */ 41 }; 42 43 pinmux: pinmux@14029c { 44 compatible = "pinctrl-single"; 45 reg = <0x0014029c 0x26c>; 46 #address-cells = <1>; 47 #size-cells = <1>; 48 pinctrl-single,register-width = <32>; 49 pinctrl-single,function-mask = <0xf>; 50 pinctrl-single,gpio-range = < 51 &range 0 91 MODE_GPIO 52 &range 95 60 MODE_GPIO 53 >; 54 range: gpio-range { 55 #pinctrl-single,gpio-range-cells = <3>; 56 }; 57 58 /* pinctrl functions */ 59 tsio_pins: pinmux_gpio_14 { 60 pinctrl-single,pins = < 61 0x038 MODE_NITRO /* tsio_0 */ 62 0x03c MODE_NITRO /* tsio_1 */ 63 >; 64 }; 65 66 nor_pins: pinmux_pnor_adv_n { 67 pinctrl-single,pins = < 68 0x0ac MODE_PNOR /* nand_ce1_n */ 69 0x0b0 MODE_PNOR /* nand_ce0_n */ 70 0x0b4 MODE_PNOR /* nand_we_n */ 71 0x0b8 MODE_PNOR /* nand_wp_n */ 72 0x0bc MODE_PNOR /* nand_re_n */ 73 0x0c0 MODE_PNOR /* nand_rdy_bsy_n */ 74 0x0c4 MODE_PNOR /* nand_io0_0 */ 75 0x0c8 MODE_PNOR /* nand_io1_0 */ 76 0x0cc MODE_PNOR /* nand_io2_0 */ 77 0x0d0 MODE_PNOR /* nand_io3_0 */ 78 0x0d4 MODE_PNOR /* nand_io4_0 */ 79 0x0d8 MODE_PNOR /* nand_io5_0 */ 80 0x0dc MODE_PNOR /* nand_io6_0 */ 81 0x0e0 MODE_PNOR /* nand_io7_0 */ 82 0x0e4 MODE_PNOR /* nand_io8_0 */ 83 0x0e8 MODE_PNOR /* nand_io9_0 */ 84 0x0ec MODE_PNOR /* nand_io10_0 */ 85 0x0f0 MODE_PNOR /* nand_io11_0 */ 86 0x0f4 MODE_PNOR /* nand_io12_0 */ 87 0x0f8 MODE_PNOR /* nand_io13_0 */ 88 0x0fc MODE_PNOR /* nand_io14_0 */ 89 0x100 MODE_PNOR /* nand_io15_0 */ 90 0x104 MODE_PNOR /* nand_ale_0 */ 91 0x108 MODE_PNOR /* nand_cle_0 */ 92 0x040 MODE_PNOR /* pnor_adv_n */ 93 0x044 MODE_PNOR /* pnor_baa_n */ 94 0x048 MODE_PNOR /* pnor_bls_0_n */ 95 0x04c MODE_PNOR /* pnor_bls_1_n */ 96 0x050 MODE_PNOR /* pnor_cre */ 97 0x054 MODE_PNOR /* pnor_cs_2_n */ 98 0x058 MODE_PNOR /* pnor_cs_1_n */ 99 0x05c MODE_PNOR /* pnor_cs_0_n */ 100 0x060 MODE_PNOR /* pnor_we_n */ 101 0x064 MODE_PNOR /* pnor_oe_n */ 102 0x068 MODE_PNOR /* pnor_intr */ 103 0x06c MODE_PNOR /* pnor_dat_0 */ 104 0x070 MODE_PNOR /* pnor_dat_1 */ 105 0x074 MODE_PNOR /* pnor_dat_2 */ 106 0x078 MODE_PNOR /* pnor_dat_3 */ 107 0x07c MODE_PNOR /* pnor_dat_4 */ 108 0x080 MODE_PNOR /* pnor_dat_5 */ 109 0x084 MODE_PNOR /* pnor_dat_6 */ 110 0x088 MODE_PNOR /* pnor_dat_7 */ 111 0x08c MODE_PNOR /* pnor_dat_8 */ 112 0x090 MODE_PNOR /* pnor_dat_9 */ 113 0x094 MODE_PNOR /* pnor_dat_10 */ 114 0x098 MODE_PNOR /* pnor_dat_11 */ 115 0x09c MODE_PNOR /* pnor_dat_12 */ 116 0x0a0 MODE_PNOR /* pnor_dat_13 */ 117 0x0a4 MODE_PNOR /* pnor_dat_14 */ 118 0x0a8 MODE_PNOR /* pnor_dat_15 */ 119 >; 120 }; 121 122 nand_pins: pinmux_nand_ce1_n { 123 pinctrl-single,pins = < 124 0x0ac MODE_NAND /* nand_ce1_n */ 125 0x0b0 MODE_NAND /* nand_ce0_n */ 126 0x0b4 MODE_NAND /* nand_we_n */ 127 0x0b8 MODE_NAND /* nand_wp_n */ 128 0x0bc MODE_NAND /* nand_re_n */ 129 0x0c0 MODE_NAND /* nand_rdy_bsy_n */ 130 0x0c4 MODE_NAND /* nand_io0_0 */ 131 0x0c8 MODE_NAND /* nand_io1_0 */ 132 0x0cc MODE_NAND /* nand_io2_0 */ 133 0x0d0 MODE_NAND /* nand_io3_0 */ 134 0x0d4 MODE_NAND /* nand_io4_0 */ 135 0x0d8 MODE_NAND /* nand_io5_0 */ 136 0x0dc MODE_NAND /* nand_io6_0 */ 137 0x0e0 MODE_NAND /* nand_io7_0 */ 138 0x0e4 MODE_NAND /* nand_io8_0 */ 139 0x0e8 MODE_NAND /* nand_io9_0 */ 140 0x0ec MODE_NAND /* nand_io10_0 */ 141 0x0f0 MODE_NAND /* nand_io11_0 */ 142 0x0f4 MODE_NAND /* nand_io12_0 */ 143 0x0f8 MODE_NAND /* nand_io13_0 */ 144 0x0fc MODE_NAND /* nand_io14_0 */ 145 0x100 MODE_NAND /* nand_io15_0 */ 146 0x104 MODE_NAND /* nand_ale_0 */ 147 0x108 MODE_NAND /* nand_cle_0 */ 148 >; 149 }; 150 151 pwm0_pins: pinmux_pwm_0 { 152 pinctrl-single,pins = < 153 0x10c MODE_NITRO 154 >; 155 }; 156 157 pwm1_pins: pinmux_pwm_1 { 158 pinctrl-single,pins = < 159 0x110 MODE_NITRO 160 >; 161 }; 162 163 pwm2_pins: pinmux_pwm_2 { 164 pinctrl-single,pins = < 165 0x114 MODE_NITRO 166 >; 167 }; 168 169 pwm3_pins: pinmux_pwm_3 { 170 pinctrl-single,pins = < 171 0x118 MODE_NITRO 172 >; 173 }; 174 175 dbu_rxd_pins: pinmux_uart1_sin_nitro { 176 pinctrl-single,pins = < 177 0x11c MODE_NITRO /* dbu_rxd */ 178 0x120 MODE_NITRO /* dbu_txd */ 179 >; 180 }; 181 182 uart1_pins: pinmux_uart1_sin_nand { 183 pinctrl-single,pins = < 184 0x11c MODE_NAND /* uart1_sin */ 185 0x120 MODE_NAND /* uart1_out */ 186 >; 187 }; 188 189 uart2_pins: pinmux_uart2_sin { 190 pinctrl-single,pins = < 191 0x124 MODE_NITRO /* uart2_sin */ 192 0x128 MODE_NITRO /* uart2_out */ 193 >; 194 }; 195 196 uart3_pins: pinmux_uart3_sin { 197 pinctrl-single,pins = < 198 0x12c MODE_NITRO /* uart3_sin */ 199 0x130 MODE_NITRO /* uart3_out */ 200 >; 201 }; 202 203 i2s_pins: pinmux_i2s_bitclk { 204 pinctrl-single,pins = < 205 0x134 MODE_NITRO /* i2s_bitclk */ 206 0x138 MODE_NITRO /* i2s_sdout */ 207 0x13c MODE_NITRO /* i2s_sdin */ 208 0x140 MODE_NITRO /* i2s_ws */ 209 0x144 MODE_NITRO /* i2s_mclk */ 210 0x148 MODE_NITRO /* i2s_spdif_out */ 211 >; 212 }; 213 214 qspi_pins: pinumx_qspi_hold_n { 215 pinctrl-single,pins = < 216 0x14c MODE_NAND /* qspi_hold_n */ 217 0x150 MODE_NAND /* qspi_wp_n */ 218 0x154 MODE_NAND /* qspi_sck */ 219 0x158 MODE_NAND /* qspi_cs_n */ 220 0x15c MODE_NAND /* qspi_mosi */ 221 0x160 MODE_NAND /* qspi_miso */ 222 >; 223 }; 224 225 mdio_pins: pinumx_ext_mdio { 226 pinctrl-single,pins = < 227 0x164 MODE_NITRO /* ext_mdio */ 228 0x168 MODE_NITRO /* ext_mdc */ 229 >; 230 }; 231 232 i2c0_pins: pinmux_i2c0_sda { 233 pinctrl-single,pins = < 234 0x16c MODE_NITRO /* i2c0_sda */ 235 0x170 MODE_NITRO /* i2c0_scl */ 236 >; 237 }; 238 239 i2c1_pins: pinmux_i2c1_sda { 240 pinctrl-single,pins = < 241 0x174 MODE_NITRO /* i2c1_sda */ 242 0x178 MODE_NITRO /* i2c1_scl */ 243 >; 244 }; 245 246 sdio0_pins: pinmux_sdio0_cd_l { 247 pinctrl-single,pins = < 248 0x17c MODE_NITRO /* sdio0_cd_l */ 249 0x180 MODE_NITRO /* sdio0_clk_sdcard */ 250 0x184 MODE_NITRO /* sdio0_data0 */ 251 0x188 MODE_NITRO /* sdio0_data1 */ 252 0x18c MODE_NITRO /* sdio0_data2 */ 253 0x190 MODE_NITRO /* sdio0_data3 */ 254 0x194 MODE_NITRO /* sdio0_data4 */ 255 0x198 MODE_NITRO /* sdio0_data5 */ 256 0x19c MODE_NITRO /* sdio0_data6 */ 257 0x1a0 MODE_NITRO /* sdio0_data7 */ 258 0x1a4 MODE_NITRO /* sdio0_cmd */ 259 0x1a8 MODE_NITRO /* sdio0_emmc_rst_n */ 260 0x1ac MODE_NITRO /* sdio0_led_on */ 261 0x1b0 MODE_NITRO /* sdio0_wp */ 262 >; 263 }; 264 265 sdio1_pins: pinmux_sdio1_cd_l { 266 pinctrl-single,pins = < 267 0x1b4 MODE_NITRO /* sdio1_cd_l */ 268 0x1b8 MODE_NITRO /* sdio1_clk_sdcard */ 269 0x1bc MODE_NITRO /* sdio1_data0 */ 270 0x1c0 MODE_NITRO /* sdio1_data1 */ 271 0x1c4 MODE_NITRO /* sdio1_data2 */ 272 0x1c8 MODE_NITRO /* sdio1_data3 */ 273 0x1cc MODE_NITRO /* sdio1_data4 */ 274 0x1d0 MODE_NITRO /* sdio1_data5 */ 275 0x1d4 MODE_NITRO /* sdio1_data6 */ 276 0x1d8 MODE_NITRO /* sdio1_data7 */ 277 0x1dc MODE_NITRO /* sdio1_cmd */ 278 0x1e0 MODE_NITRO /* sdio1_emmc_rst_n */ 279 0x1e4 MODE_NITRO /* sdio1_led_on */ 280 0x1e8 MODE_NITRO /* sdio1_wp */ 281 >; 282 }; 283 284 spi0_pins: pinmux_spi0_sck_nand { 285 pinctrl-single,pins = < 286 0x1ec MODE_NITRO /* spi0_sck */ 287 0x1f0 MODE_NITRO /* spi0_rxd */ 288 0x1f4 MODE_NITRO /* spi0_fss */ 289 0x1f8 MODE_NITRO /* spi0_txd */ 290 >; 291 }; 292 293 spi1_pins: pinmux_spi1_sck_nand { 294 pinctrl-single,pins = < 295 0x1fc MODE_NITRO /* spi1_sck */ 296 0x200 MODE_NITRO /* spi1_rxd */ 297 0x204 MODE_NITRO /* spi1_fss */ 298 0x208 MODE_NITRO /* spi1_txd */ 299 >; 300 }; 301 302 nuart_pins: pinmux_uart0_sin_nitro { 303 pinctrl-single,pins = < 304 0x20c MODE_NITRO /* nuart_rxd */ 305 0x210 MODE_NITRO /* nuart_txd */ 306 >; 307 }; 308 309 uart0_pins: pinumux_uart0_sin_nand { 310 pinctrl-single,pins = < 311 0x20c MODE_NAND /* uart0_sin */ 312 0x210 MODE_NAND /* uart0_out */ 313 0x214 MODE_NAND /* uart0_rts */ 314 0x218 MODE_NAND /* uart0_cts */ 315 0x21c MODE_NAND /* uart0_dtr */ 316 0x220 MODE_NAND /* uart0_dcd */ 317 0x224 MODE_NAND /* uart0_dsr */ 318 0x228 MODE_NAND /* uart0_ri */ 319 >; 320 }; 321 322 drdu2_pins: pinmux_drdu2_overcurrent { 323 pinctrl-single,pins = < 324 0x22c MODE_NITRO /* drdu2_overcurrent */ 325 0x230 MODE_NITRO /* drdu2_vbus_ppc */ 326 0x234 MODE_NITRO /* drdu2_vbus_present */ 327 0x238 MODE_NITRO /* drdu2_id */ 328 >; 329 }; 330 331 drdu3_pins: pinmux_drdu3_overcurrent { 332 pinctrl-single,pins = < 333 0x23c MODE_NITRO /* drdu3_overcurrent */ 334 0x240 MODE_NITRO /* drdu3_vbus_ppc */ 335 0x244 MODE_NITRO /* drdu3_vbus_present */ 336 0x248 MODE_NITRO /* drdu3_id */ 337 >; 338 }; 339 340 usb3h_pins: pinmux_usb3h_overcurrent { 341 pinctrl-single,pins = < 342 0x24c MODE_NITRO /* usb3h_overcurrent */ 343 0x250 MODE_NITRO /* usb3h_vbus_ppc */ 344 >; 345 }; 346 }; 347