xref: /linux/arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi (revision 791d3ef2e11100449837dc0b6fe884e60ca3a484)
1/*
2 *  BSD LICENSE
3 *
4 *  Copyright(c) 2016-2017 Broadcom.  All rights reserved.
5 *
6 *  Redistribution and use in source and binary forms, with or without
7 *  modification, are permitted provided that the following conditions
8 *  are met:
9 *
10 *    * Redistributions of source code must retain the above copyright
11 *      notice, this list of conditions and the following disclaimer.
12 *    * Redistributions in binary form must reproduce the above copyright
13 *      notice, this list of conditions and the following disclaimer in
14 *      the documentation and/or other materials provided with the
15 *      distribution.
16 *    * Neither the name of Broadcom nor the names of its
17 *      contributors may be used to endorse or promote products derived
18 *      from this software without specific prior written permission.
19 *
20 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include "stingray.dtsi"
34
35/ {
36	chosen {
37		stdout-path = "serial0:115200n8";
38	};
39
40	aliases {
41		serial0 = &uart1;
42		serial1 = &uart0;
43		serial2 = &uart2;
44		serial3 = &uart3;
45	};
46
47	sdio0_vddo_ctrl_reg: sdio0_vddo_ctrl {
48		compatible = "regulator-gpio";
49		regulator-name = "sdio0_vddo_ctrl_reg";
50		regulator-type = "voltage";
51		regulator-min-microvolt = <1800000>;
52		regulator-max-microvolt = <3300000>;
53		gpios = <&pca9505 18 0>;
54		states = <3300000 0x0
55			  1800000 0x1>;
56	};
57
58	sdio1_vddo_ctrl_reg: sdio1_vddo_ctrl {
59		compatible = "regulator-gpio";
60		regulator-name = "sdio1_vddo_ctrl_reg";
61		regulator-type = "voltage";
62		regulator-min-microvolt = <1800000>;
63		regulator-max-microvolt = <3300000>;
64		gpios = <&pca9505 19 0>;
65		states = <3300000 0x0
66			  1800000 0x1>;
67	};
68};
69
70&memory { /* Default DRAM banks */
71	reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
72	      <0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */
73};
74
75&sata0 {
76	status = "okay";
77};
78
79&sata_phy0{
80	status = "okay";
81};
82
83&sata1 {
84	status = "okay";
85};
86
87&sata_phy1{
88	status = "okay";
89};
90
91&sata2 {
92	status = "okay";
93};
94
95&sata_phy2{
96	status = "okay";
97};
98
99&sata3 {
100	status = "okay";
101};
102
103&sata_phy3{
104	status = "okay";
105};
106
107&sata4 {
108	status = "okay";
109};
110
111&sata_phy4{
112	status = "okay";
113};
114
115&sata5 {
116	status = "okay";
117};
118
119&sata_phy5{
120	status = "okay";
121};
122
123&sata6 {
124	status = "okay";
125};
126
127&sata_phy6{
128	status = "okay";
129};
130
131&sata7 {
132	status = "okay";
133};
134
135&sata_phy7{
136	status = "okay";
137};
138
139&mdio_mux_iproc {
140	mdio@10 {
141		gphy0: eth-phy@10 {
142			reg = <0x10>;
143		};
144	};
145};
146
147&uart1 {
148	status = "okay";
149};
150
151&pwm {
152	status = "okay";
153};
154
155&i2c0 {
156	status = "okay";
157
158	pca9505: pca9505@20 {
159		compatible = "nxp,pca9505";
160		gpio-controller;
161		#gpio-cells = <2>;
162		reg = <0x20>;
163	};
164};
165
166&i2c1 {
167	status = "okay";
168
169	pcf8574: pcf8574@20 {
170		compatible = "nxp,pcf8574a";
171		gpio-controller;
172		#gpio-cells = <2>;
173		reg = <0x27>;
174	};
175};
176
177&enet {
178	phy-mode = "rgmii-id";
179	phy-handle = <&gphy0>;
180	status = "okay";
181};
182
183&nand {
184	status = "ok";
185	nandcs@0 {
186		compatible = "brcm,nandcs";
187		reg = <0>;
188		nand-ecc-mode = "hw";
189		nand-ecc-strength = <8>;
190		nand-ecc-step-size = <512>;
191		nand-bus-width = <16>;
192		brcm,nand-oob-sector-size = <16>;
193		#address-cells = <1>;
194		#size-cells = <1>;
195	};
196};
197
198&sdio0 {
199	vqmmc-supply = <&sdio0_vddo_ctrl_reg>;
200	non-removable;
201	full-pwr-cycle;
202	status = "okay";
203};
204
205&sdio1 {
206	vqmmc-supply = <&sdio1_vddo_ctrl_reg>;
207	full-pwr-cycle;
208	status = "okay";
209};
210