xref: /linux/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi (revision 0709e55ed13e256994e440a4e0d62dc1cf3fc6a3)
164eca7adSWilliam Zhang// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
264eca7adSWilliam Zhang/*
364eca7adSWilliam Zhang * Copyright 2022 Broadcom Ltd.
464eca7adSWilliam Zhang */
564eca7adSWilliam Zhang
664eca7adSWilliam Zhang#include <dt-bindings/interrupt-controller/irq.h>
764eca7adSWilliam Zhang#include <dt-bindings/interrupt-controller/arm-gic.h>
864eca7adSWilliam Zhang
964eca7adSWilliam Zhang/ {
1064eca7adSWilliam Zhang	compatible = "brcm,bcm6856", "brcm,bcmbca";
1164eca7adSWilliam Zhang	#address-cells = <2>;
1264eca7adSWilliam Zhang	#size-cells = <2>;
1364eca7adSWilliam Zhang
1464eca7adSWilliam Zhang	interrupt-parent = <&gic>;
1564eca7adSWilliam Zhang
1664eca7adSWilliam Zhang	cpus {
1764eca7adSWilliam Zhang		#address-cells = <2>;
1864eca7adSWilliam Zhang		#size-cells = <0>;
1964eca7adSWilliam Zhang
2064eca7adSWilliam Zhang		B53_0: cpu@0 {
2164eca7adSWilliam Zhang			compatible = "brcm,brahma-b53";
2264eca7adSWilliam Zhang			device_type = "cpu";
2364eca7adSWilliam Zhang			reg = <0x0 0x0>;
2464eca7adSWilliam Zhang			next-level-cache = <&L2_0>;
2564eca7adSWilliam Zhang			enable-method = "psci";
2664eca7adSWilliam Zhang		};
2764eca7adSWilliam Zhang
2864eca7adSWilliam Zhang		B53_1: cpu@1 {
2964eca7adSWilliam Zhang			compatible = "brcm,brahma-b53";
3064eca7adSWilliam Zhang			device_type = "cpu";
3164eca7adSWilliam Zhang			reg = <0x0 0x1>;
3264eca7adSWilliam Zhang			next-level-cache = <&L2_0>;
3364eca7adSWilliam Zhang			enable-method = "psci";
3464eca7adSWilliam Zhang		};
3564eca7adSWilliam Zhang
3664eca7adSWilliam Zhang		L2_0: l2-cache0 {
3764eca7adSWilliam Zhang			compatible = "cache";
38e567e58dSPierre Gondois			cache-level = <2>;
39*0709e55eSKrzysztof Kozlowski			cache-unified;
4064eca7adSWilliam Zhang		};
4164eca7adSWilliam Zhang	};
4264eca7adSWilliam Zhang
4364eca7adSWilliam Zhang	timer {
4464eca7adSWilliam Zhang		compatible = "arm,armv8-timer";
4564eca7adSWilliam Zhang		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
4664eca7adSWilliam Zhang			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
4764eca7adSWilliam Zhang			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
4864eca7adSWilliam Zhang			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
4964eca7adSWilliam Zhang	};
5064eca7adSWilliam Zhang
5164eca7adSWilliam Zhang	pmu: pmu {
5264eca7adSWilliam Zhang		compatible = "arm,cortex-a53-pmu";
5364eca7adSWilliam Zhang		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
5464eca7adSWilliam Zhang			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
5564eca7adSWilliam Zhang		interrupt-affinity = <&B53_0>, <&B53_1>;
5664eca7adSWilliam Zhang	};
5764eca7adSWilliam Zhang
5864eca7adSWilliam Zhang	clocks: clocks {
5964eca7adSWilliam Zhang		periph_clk:periph-clk {
6064eca7adSWilliam Zhang			compatible = "fixed-clock";
6164eca7adSWilliam Zhang			#clock-cells = <0>;
6264eca7adSWilliam Zhang			clock-frequency = <200000000>;
6364eca7adSWilliam Zhang		};
64f5d83b71SWilliam Zhang
65f5d83b71SWilliam Zhang		hsspi_pll: hsspi-pll {
66f5d83b71SWilliam Zhang			compatible = "fixed-clock";
67f5d83b71SWilliam Zhang			#clock-cells = <0>;
68f5d83b71SWilliam Zhang			clock-frequency = <400000000>;
69f5d83b71SWilliam Zhang		};
7064eca7adSWilliam Zhang	};
7164eca7adSWilliam Zhang
7264eca7adSWilliam Zhang	psci {
7364eca7adSWilliam Zhang		compatible = "arm,psci-0.2";
7464eca7adSWilliam Zhang		method = "smc";
7564eca7adSWilliam Zhang	};
7664eca7adSWilliam Zhang
7764eca7adSWilliam Zhang	axi@81000000 {
7864eca7adSWilliam Zhang		compatible = "simple-bus";
7964eca7adSWilliam Zhang		#address-cells = <1>;
8064eca7adSWilliam Zhang		#size-cells = <1>;
8164eca7adSWilliam Zhang		ranges = <0x0 0x0 0x81000000 0x8000>;
8264eca7adSWilliam Zhang
8364eca7adSWilliam Zhang		gic: interrupt-controller@1000 {
8464eca7adSWilliam Zhang			compatible = "arm,gic-400";
8564eca7adSWilliam Zhang			#interrupt-cells = <3>;
8664eca7adSWilliam Zhang			interrupt-controller;
8764eca7adSWilliam Zhang			reg = <0x1000 0x1000>, /* GICD */
8864eca7adSWilliam Zhang				<0x2000 0x2000>, /* GICC */
8964eca7adSWilliam Zhang				<0x4000 0x2000>, /* GICH */
9064eca7adSWilliam Zhang				<0x6000 0x2000>; /* GICV */
9164eca7adSWilliam Zhang			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
9264eca7adSWilliam Zhang					IRQ_TYPE_LEVEL_HIGH)>;
9364eca7adSWilliam Zhang		};
9464eca7adSWilliam Zhang	};
9564eca7adSWilliam Zhang
9664eca7adSWilliam Zhang	bus@ff800000 {
9764eca7adSWilliam Zhang		compatible = "simple-bus";
9864eca7adSWilliam Zhang		#address-cells = <1>;
9964eca7adSWilliam Zhang		#size-cells = <1>;
10064eca7adSWilliam Zhang		ranges = <0x0 0x0 0xff800000 0x800000>;
10164eca7adSWilliam Zhang
10264eca7adSWilliam Zhang		uart0: serial@640 {
10364eca7adSWilliam Zhang			compatible = "brcm,bcm6345-uart";
10464eca7adSWilliam Zhang			reg = <0x640 0x18>;
10564eca7adSWilliam Zhang			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
10664eca7adSWilliam Zhang			clocks = <&periph_clk>;
10764eca7adSWilliam Zhang			clock-names = "refclk";
10864eca7adSWilliam Zhang			status = "disabled";
10964eca7adSWilliam Zhang		};
110f5d83b71SWilliam Zhang
111f5d83b71SWilliam Zhang		hsspi: spi@1000 {
112f5d83b71SWilliam Zhang			#address-cells = <1>;
113f5d83b71SWilliam Zhang			#size-cells = <0>;
114f5d83b71SWilliam Zhang			compatible = "brcm,bcm6856-hsspi", "brcm,bcmbca-hsspi-v1.0";
115f5d83b71SWilliam Zhang			reg = <0x1000 0x600>;
116f5d83b71SWilliam Zhang			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
117f5d83b71SWilliam Zhang			clocks = <&hsspi_pll &hsspi_pll>;
118f5d83b71SWilliam Zhang			clock-names = "hsspi", "pll";
119f5d83b71SWilliam Zhang			num-cs = <8>;
120f5d83b71SWilliam Zhang			status = "disabled";
121f5d83b71SWilliam Zhang		};
12264eca7adSWilliam Zhang	};
12364eca7adSWilliam Zhang};
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