1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 3#include <dt-bindings/interrupt-controller/irq.h> 4#include <dt-bindings/interrupt-controller/arm-gic.h> 5#include <dt-bindings/phy/phy.h> 6#include <dt-bindings/soc/bcm-pmb.h> 7 8/dts-v1/; 9 10/ { 11 interrupt-parent = <&gic>; 12 13 #address-cells = <2>; 14 #size-cells = <2>; 15 16 aliases { 17 serial0 = &uart0; 18 }; 19 20 chosen { 21 stdout-path = "serial0:115200n8"; 22 }; 23 24 cpus { 25 #address-cells = <1>; 26 #size-cells = <0>; 27 28 cpu0: cpu@0 { 29 device_type = "cpu"; 30 compatible = "brcm,brahma-b53"; 31 reg = <0x0>; 32 enable-method = "spin-table"; 33 cpu-release-addr = <0x0 0xfff8>; 34 next-level-cache = <&l2>; 35 }; 36 37 cpu1: cpu@1 { 38 device_type = "cpu"; 39 compatible = "brcm,brahma-b53"; 40 reg = <0x1>; 41 enable-method = "spin-table"; 42 cpu-release-addr = <0x0 0xfff8>; 43 next-level-cache = <&l2>; 44 }; 45 46 cpu2: cpu@2 { 47 device_type = "cpu"; 48 compatible = "brcm,brahma-b53"; 49 reg = <0x2>; 50 enable-method = "spin-table"; 51 cpu-release-addr = <0x0 0xfff8>; 52 next-level-cache = <&l2>; 53 }; 54 55 cpu3: cpu@3 { 56 device_type = "cpu"; 57 compatible = "brcm,brahma-b53"; 58 reg = <0x3>; 59 enable-method = "spin-table"; 60 cpu-release-addr = <0x0 0xfff8>; 61 next-level-cache = <&l2>; 62 }; 63 64 l2: l2-cache0 { 65 compatible = "cache"; 66 cache-level = <2>; 67 cache-unified; 68 }; 69 }; 70 71 axi@81000000 { 72 compatible = "simple-bus"; 73 #address-cells = <1>; 74 #size-cells = <1>; 75 ranges = <0x00 0x00 0x81000000 0x4000>; 76 77 gic: interrupt-controller@1000 { 78 compatible = "arm,gic-400"; 79 #interrupt-cells = <3>; 80 #address-cells = <0>; 81 interrupt-controller; 82 reg = <0x1000 0x1000>, 83 <0x2000 0x2000>; 84 }; 85 }; 86 87 timer { 88 compatible = "arm,armv8-timer"; 89 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 90 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 91 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 92 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 93 }; 94 95 pmu { 96 compatible = "arm,cortex-a53-pmu"; 97 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 98 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, 99 <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 100 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 101 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 102 }; 103 104 clocks { 105 periph_clk: periph_clk { 106 compatible = "fixed-clock"; 107 #clock-cells = <0>; 108 clock-frequency = <50000000>; 109 clock-output-names = "periph"; 110 }; 111 112 hsspi_pll: hsspi-pll { 113 compatible = "fixed-clock"; 114 #clock-cells = <0>; 115 clock-frequency = <400000000>; 116 }; 117 }; 118 119 soc { 120 compatible = "simple-bus"; 121 #address-cells = <1>; 122 #size-cells = <1>; 123 ranges = <0x00 0x00 0x80000000 0x281000>; 124 125 enet: ethernet@2000 { 126 compatible = "brcm,bcm4908-enet"; 127 reg = <0x2000 0x1000>; 128 129 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 130 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 131 interrupt-names = "rx", "tx"; 132 }; 133 134 usb_phy: usb-phy@c200 { 135 compatible = "brcm,bcm4908-usb-phy"; 136 reg = <0xc200 0x100>; 137 reg-names = "ctrl"; 138 power-domains = <&pmb BCM_PMB_HOST_USB>; 139 dr_mode = "host"; 140 brcm,has-xhci; 141 brcm,has-eohci; 142 #phy-cells = <1>; 143 status = "disabled"; 144 }; 145 146 ehci: usb@c300 { 147 compatible = "generic-ehci"; 148 reg = <0xc300 0x100>; 149 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 150 phys = <&usb_phy PHY_TYPE_USB2>; 151 status = "disabled"; 152 153 #address-cells = <1>; 154 #size-cells = <0>; 155 156 ehci_port1: port@1 { 157 reg = <1>; 158 #trigger-source-cells = <0>; 159 }; 160 161 ehci_port2: port@2 { 162 reg = <2>; 163 #trigger-source-cells = <0>; 164 }; 165 }; 166 167 ohci: usb@c400 { 168 compatible = "generic-ohci"; 169 reg = <0xc400 0x100>; 170 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 171 phys = <&usb_phy PHY_TYPE_USB2>; 172 status = "disabled"; 173 174 #address-cells = <1>; 175 #size-cells = <0>; 176 177 ohci_port1: port@1 { 178 reg = <1>; 179 #trigger-source-cells = <0>; 180 }; 181 182 ohci_port2: port@2 { 183 reg = <2>; 184 #trigger-source-cells = <0>; 185 }; 186 }; 187 188 xhci: usb@d000 { 189 compatible = "generic-xhci"; 190 reg = <0xd000 0x8c8>; 191 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 192 phys = <&usb_phy PHY_TYPE_USB3>; 193 status = "disabled"; 194 195 #address-cells = <1>; 196 #size-cells = <0>; 197 198 xhci_port1: port@1 { 199 reg = <1>; 200 #trigger-source-cells = <0>; 201 }; 202 203 xhci_port2: port@2 { 204 reg = <2>; 205 #trigger-source-cells = <0>; 206 }; 207 }; 208 209 bus@80000 { 210 compatible = "simple-bus"; 211 #size-cells = <1>; 212 #address-cells = <1>; 213 ranges = <0 0x80000 0x50000>; 214 215 ethernet-switch@0 { 216 compatible = "brcm,bcm4908-switch"; 217 reg = <0x0 0x40000>, 218 <0x40000 0x110>, 219 <0x40340 0x30>, 220 <0x40380 0x30>, 221 <0x40600 0x34>, 222 <0x40800 0x208>; 223 reg-names = "core", "reg", "intrl2_0", 224 "intrl2_1", "fcb", "acb"; 225 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 226 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 227 brcm,num-gphy = <5>; 228 brcm,num-rgmii-ports = <2>; 229 230 #address-cells = <1>; 231 #size-cells = <0>; 232 233 ports: ports { 234 #address-cells = <1>; 235 #size-cells = <0>; 236 237 port@0 { 238 reg = <0>; 239 phy-mode = "internal"; 240 phy-handle = <&phy8>; 241 }; 242 243 port@1 { 244 reg = <1>; 245 phy-mode = "internal"; 246 phy-handle = <&phy9>; 247 }; 248 249 port@2 { 250 reg = <2>; 251 phy-mode = "internal"; 252 phy-handle = <&phy10>; 253 }; 254 255 port@3 { 256 reg = <3>; 257 phy-mode = "internal"; 258 phy-handle = <&phy11>; 259 }; 260 261 port@8 { 262 reg = <8>; 263 phy-mode = "internal"; 264 ethernet = <&enet>; 265 266 fixed-link { 267 speed = <1000>; 268 full-duplex; 269 }; 270 }; 271 }; 272 }; 273 274 mdio: mdio@405c0 { 275 compatible = "brcm,unimac-mdio"; 276 reg = <0x405c0 0x8>; 277 reg-names = "mdio"; 278 #size-cells = <0>; 279 #address-cells = <1>; 280 281 phy8: ethernet-phy@8 { 282 reg = <8>; 283 }; 284 285 phy9: ethernet-phy@9 { 286 reg = <9>; 287 }; 288 289 phy10: ethernet-phy@a { 290 reg = <10>; 291 }; 292 293 phy11: ethernet-phy@b { 294 reg = <11>; 295 }; 296 297 phy12: ethernet-phy@c { 298 reg = <12>; 299 }; 300 }; 301 }; 302 303 procmon: bus@280000 { 304 compatible = "simple-bus"; 305 reg = <0x280000 0x1000>; 306 ranges; 307 308 #address-cells = <1>; 309 #size-cells = <1>; 310 311 pmb: power-controller@2800c0 { 312 compatible = "brcm,bcm4908-pmb"; 313 reg = <0x2800c0 0x40>; 314 #power-domain-cells = <1>; 315 }; 316 }; 317 }; 318 319 bus@ff800000 { 320 compatible = "simple-bus"; 321 #address-cells = <1>; 322 #size-cells = <1>; 323 ranges = <0x00 0x00 0xff800000 0x3000>; 324 325 twd: timer-mfd@400 { 326 compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon"; 327 reg = <0x400 0x4c>; 328 ranges = <0x0 0x400 0x4c>; 329 330 #address-cells = <1>; 331 #size-cells = <1>; 332 333 timer@0 { 334 compatible = "brcm,bcm63138-timer"; 335 reg = <0x0 0x28>; 336 }; 337 338 watchdog@28 { 339 compatible = "brcm,bcm6345-wdt"; 340 reg = <0x28 0x8>; 341 }; 342 }; 343 344 gpio0: gpio-controller@500 { 345 compatible = "brcm,bcm6345-gpio"; 346 reg-names = "dirout", "dat"; 347 reg = <0x500 0x28>, <0x528 0x28>; 348 349 #gpio-cells = <2>; 350 gpio-controller; 351 }; 352 353 pinctrl@560 { 354 compatible = "brcm,bcm4908-pinctrl"; 355 reg = <0x560 0x10>; 356 357 pins_led_0_a: led_0-a-pins { 358 function = "led_0"; 359 groups = "led_0_grp_a"; 360 }; 361 362 pins_led_1_a: led_1-a-pins { 363 function = "led_1"; 364 groups = "led_1_grp_a"; 365 }; 366 367 pins_led_2_a: led_2-a-pins { 368 function = "led_2"; 369 groups = "led_2_grp_a"; 370 }; 371 372 pins_led_3_a: led_3-a-pins { 373 function = "led_3"; 374 groups = "led_3_grp_a"; 375 }; 376 377 pins_led_4_a: led_4-a-pins { 378 function = "led_4"; 379 groups = "led_4_grp_a"; 380 }; 381 382 pins_led_5_a: led_5-a-pins { 383 function = "led_5"; 384 groups = "led_5_grp_a"; 385 }; 386 387 pins_led_6_a: led_6-a-pins { 388 function = "led_6"; 389 groups = "led_6_grp_a"; 390 }; 391 392 pins_led_7_a: led_7-a-pins { 393 function = "led_7"; 394 groups = "led_7_grp_a"; 395 }; 396 397 pins_led_8_a: led_8-a-pins { 398 function = "led_8"; 399 groups = "led_8_grp_a"; 400 }; 401 402 pins_led_9_a: led_9-a-pins { 403 function = "led_9"; 404 groups = "led_9_grp_a"; 405 }; 406 407 pins_led_10_a: led_10-a-pins { 408 function = "led_10"; 409 groups = "led_10_grp_a"; 410 }; 411 412 pins_led_11_a: led_11-a-pins { 413 function = "led_11"; 414 groups = "led_11_grp_a"; 415 }; 416 417 pins_led_12_a: led_12-a-pins { 418 function = "led_12"; 419 groups = "led_12_grp_a"; 420 }; 421 422 pins_led_13_a: led_13-a-pins { 423 function = "led_13"; 424 groups = "led_13_grp_a"; 425 }; 426 427 pins_led_14_a: led_14-a-pins { 428 function = "led_14"; 429 groups = "led_14_grp_a"; 430 }; 431 432 pins_led_15_a: led_15-a-pins { 433 function = "led_15"; 434 groups = "led_15_grp_a"; 435 }; 436 437 pins_led_16_a: led_16-a-pins { 438 function = "led_16"; 439 groups = "led_16_grp_a"; 440 }; 441 442 pins_led_17_a: led_17-a-pins { 443 function = "led_17"; 444 groups = "led_17_grp_a"; 445 }; 446 447 pins_led_18_a: led_18-a-pins { 448 function = "led_18"; 449 groups = "led_18_grp_a"; 450 }; 451 452 pins_led_19_a: led_19-a-pins { 453 function = "led_19"; 454 groups = "led_19_grp_a"; 455 }; 456 457 pins_led_20_a: led_20-a-pins { 458 function = "led_20"; 459 groups = "led_20_grp_a"; 460 }; 461 462 pins_led_21_a: led_21-a-pins { 463 function = "led_21"; 464 groups = "led_21_grp_a"; 465 }; 466 467 pins_led_22_a: led_22-a-pins { 468 function = "led_22"; 469 groups = "led_22_grp_a"; 470 }; 471 472 pins_led_23_a: led_23-a-pins { 473 function = "led_23"; 474 groups = "led_23_grp_a"; 475 }; 476 477 pins_led_24_a: led_24-a-pins { 478 function = "led_24"; 479 groups = "led_24_grp_a"; 480 }; 481 482 pins_led_25_a: led_25-a-pins { 483 function = "led_25"; 484 groups = "led_25_grp_a"; 485 }; 486 487 pins_led_26_a: led_26-a-pins { 488 function = "led_26"; 489 groups = "led_26_grp_a"; 490 }; 491 492 pins_led_27_a: led_27-a-pins { 493 function = "led_27"; 494 groups = "led_27_grp_a"; 495 }; 496 497 pins_led_28_a: led_28-a-pins { 498 function = "led_28"; 499 groups = "led_28_grp_a"; 500 }; 501 502 pins_led_29_a: led_29-a-pins { 503 function = "led_29"; 504 groups = "led_29_grp_a"; 505 }; 506 507 pins_led_30_a: led_30-a-pins { 508 function = "led_30"; 509 groups = "led_30_grp_a"; 510 }; 511 512 pins_led_31_a: led_31-a-pins { 513 function = "led_31"; 514 groups = "led_31_grp_a"; 515 }; 516 517 pins_hs_uart: hs_uart-pins { 518 function = "hs_uart"; 519 groups = "hs_uart_grp"; 520 }; 521 522 pins_i2c_a: i2c-a-pins { 523 function = "i2c"; 524 groups = "i2c_grp_a"; 525 }; 526 527 pins_i2c_b: i2c-b-pins { 528 function = "i2c"; 529 groups = "i2c_grp_b"; 530 }; 531 532 pins_i2s: i2s-pins { 533 function = "i2s"; 534 groups = "i2s_grp"; 535 }; 536 537 pins_nand_ctrl: nand_ctrl-pins { 538 function = "nand_ctrl"; 539 groups = "nand_ctrl_grp"; 540 }; 541 542 pins_nand_data: nand_data-pins { 543 function = "nand_data"; 544 groups = "nand_data_grp"; 545 }; 546 547 pins_emmc_ctrl: emmc_ctrl-pins { 548 function = "emmc_ctrl"; 549 groups = "emmc_ctrl_grp"; 550 }; 551 552 pins_usb0_pwr: usb0_pwr-pins { 553 function = "usb0_pwr"; 554 groups = "usb0_pwr_grp"; 555 }; 556 557 pins_usb1_pwr: usb1_pwr-pins { 558 function = "usb1_pwr"; 559 groups = "usb1_pwr_grp"; 560 }; 561 }; 562 563 uart0: serial@640 { 564 compatible = "brcm,bcm6345-uart"; 565 reg = <0x640 0x18>; 566 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 567 clocks = <&periph_clk>; 568 clock-names = "refclk"; 569 status = "okay"; 570 }; 571 572 leds: leds@800 { 573 compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds"; 574 reg = <0x800 0xdc>; 575 576 #address-cells = <1>; 577 #size-cells = <0>; 578 }; 579 580 hsspi: spi@1000 { 581 #address-cells = <1>; 582 #size-cells = <0>; 583 compatible = "brcm,bcm4908-hsspi", "brcm,bcmbca-hsspi-v1.0"; 584 reg = <0x1000 0x600>; 585 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 586 clocks = <&hsspi_pll &hsspi_pll>; 587 clock-names = "hsspi", "pll"; 588 num-cs = <8>; 589 status = "disabled"; 590 }; 591 592 nand-controller@1800 { 593 #address-cells = <1>; 594 #size-cells = <0>; 595 compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; 596 reg = <0x1800 0x600>, <0x2000 0x10>; 597 reg-names = "nand", "nand-int-base"; 598 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 599 interrupt-names = "nand_ctlrdy"; 600 status = "okay"; 601 602 nandcs: nand@0 { 603 compatible = "brcm,nandcs"; 604 reg = <0>; 605 }; 606 }; 607 608 i2c@2100 { 609 compatible = "brcm,brcmper-i2c"; 610 reg = <0x2100 0x58>; 611 clock-frequency = <97500>; 612 pinctrl-names = "default"; 613 pinctrl-0 = <&pins_i2c_a>; 614 status = "disabled"; 615 }; 616 617 misc@2600 { 618 compatible = "brcm,misc", "simple-mfd"; 619 reg = <0x2600 0xe4>; 620 621 #address-cells = <1>; 622 #size-cells = <1>; 623 ranges = <0x00 0x2600 0xe4>; 624 625 reset-controller@2644 { 626 compatible = "brcm,bcm4908-misc-pcie-reset"; 627 reg = <0x44 0x04>; 628 #reset-cells = <1>; 629 }; 630 }; 631 }; 632 633 reboot { 634 compatible = "syscon-reboot"; 635 regmap = <&twd>; 636 offset = <0x34>; 637 mask = <1>; 638 }; 639}; 640