1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019 Linaro Ltd. 4 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 5 */ 6 7#include <dt-bindings/interrupt-controller/arm-gic.h> 8 9/ { 10 compatible = "bitmain,bm1880"; 11 interrupt-parent = <&gic>; 12 #address-cells = <2>; 13 #size-cells = <2>; 14 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu0: cpu@0 { 20 device_type = "cpu"; 21 compatible = "arm,cortex-a53"; 22 reg = <0x0>; 23 enable-method = "psci"; 24 }; 25 26 cpu1: cpu@1 { 27 device_type = "cpu"; 28 compatible = "arm,cortex-a53"; 29 reg = <0x1>; 30 enable-method = "psci"; 31 }; 32 }; 33 34 reserved-memory { 35 #address-cells = <2>; 36 #size-cells = <2>; 37 ranges; 38 39 secmon@100000000 { 40 reg = <0x1 0x00000000 0x0 0x20000>; 41 no-map; 42 }; 43 44 jpu@130000000 { 45 reg = <0x1 0x30000000 0x0 0x08000000>; // 128M 46 no-map; 47 }; 48 49 vpu@138000000 { 50 reg = <0x1 0x38000000 0x0 0x08000000>; // 128M 51 no-map; 52 }; 53 }; 54 55 psci { 56 compatible = "arm,psci-0.2"; 57 method = "smc"; 58 }; 59 60 timer { 61 compatible = "arm,armv8-timer"; 62 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 63 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 64 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 65 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; 66 }; 67 68 soc { 69 compatible = "simple-bus"; 70 #address-cells = <2>; 71 #size-cells = <2>; 72 ranges; 73 74 gic: interrupt-controller@50001000 { 75 compatible = "arm,gic-400"; 76 reg = <0x0 0x50001000 0x0 0x1000>, 77 <0x0 0x50002000 0x0 0x2000>; 78 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>; 79 interrupt-controller; 80 #interrupt-cells = <3>; 81 }; 82 83 sctrl: system-controller@50010000 { 84 compatible = "bitmain,bm1880-sctrl", "syscon", 85 "simple-mfd"; 86 reg = <0x0 0x50010000 0x0 0x1000>; 87 #address-cells = <1>; 88 #size-cells = <1>; 89 ranges = <0x0 0x0 0x50010000 0x1000>; 90 91 pinctrl: pinctrl@50 { 92 compatible = "bitmain,bm1880-pinctrl"; 93 reg = <0x50 0x4B0>; 94 }; 95 }; 96 97 gpio0: gpio@50027000 { 98 #address-cells = <1>; 99 #size-cells = <0>; 100 compatible = "snps,dw-apb-gpio"; 101 reg = <0x0 0x50027000 0x0 0x400>; 102 103 porta: gpio-controller@0 { 104 compatible = "snps,dw-apb-gpio-port"; 105 gpio-controller; 106 #gpio-cells = <2>; 107 snps,nr-gpios = <32>; 108 reg = <0>; 109 interrupt-controller; 110 #interrupt-cells = <2>; 111 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 112 }; 113 }; 114 115 gpio1: gpio@50027400 { 116 #address-cells = <1>; 117 #size-cells = <0>; 118 compatible = "snps,dw-apb-gpio"; 119 reg = <0x0 0x50027400 0x0 0x400>; 120 121 portb: gpio-controller@0 { 122 compatible = "snps,dw-apb-gpio-port"; 123 gpio-controller; 124 #gpio-cells = <2>; 125 snps,nr-gpios = <32>; 126 reg = <0>; 127 interrupt-controller; 128 #interrupt-cells = <2>; 129 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 130 }; 131 }; 132 133 gpio2: gpio@50027800 { 134 #address-cells = <1>; 135 #size-cells = <0>; 136 compatible = "snps,dw-apb-gpio"; 137 reg = <0x0 0x50027800 0x0 0x400>; 138 139 portc: gpio-controller@0 { 140 compatible = "snps,dw-apb-gpio-port"; 141 gpio-controller; 142 #gpio-cells = <2>; 143 snps,nr-gpios = <8>; 144 reg = <0>; 145 interrupt-controller; 146 #interrupt-cells = <2>; 147 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 148 }; 149 }; 150 151 uart0: serial@58018000 { 152 compatible = "snps,dw-apb-uart"; 153 reg = <0x0 0x58018000 0x0 0x2000>; 154 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 155 reg-shift = <2>; 156 reg-io-width = <4>; 157 status = "disabled"; 158 }; 159 160 uart1: serial@5801A000 { 161 compatible = "snps,dw-apb-uart"; 162 reg = <0x0 0x5801a000 0x0 0x2000>; 163 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 164 reg-shift = <2>; 165 reg-io-width = <4>; 166 status = "disabled"; 167 }; 168 169 uart2: serial@5801C000 { 170 compatible = "snps,dw-apb-uart"; 171 reg = <0x0 0x5801c000 0x0 0x2000>; 172 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 173 reg-shift = <2>; 174 reg-io-width = <4>; 175 status = "disabled"; 176 }; 177 178 uart3: serial@5801E000 { 179 compatible = "snps,dw-apb-uart"; 180 reg = <0x0 0x5801e000 0x0 0x2000>; 181 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; 182 reg-shift = <2>; 183 reg-io-width = <4>; 184 status = "disabled"; 185 }; 186 }; 187}; 188