1/* 2 * ARM Ltd. 3 * 4 * ARMv8 Foundation model DTS (GICv2 configuration) 5 */ 6 7/ { 8 gic: interrupt-controller@2c001000 { 9 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; 10 #interrupt-cells = <3>; 11 #address-cells = <2>; 12 interrupt-controller; 13 reg = <0x0 0x2c001000 0 0x1000>, 14 <0x0 0x2c002000 0 0x2000>, 15 <0x0 0x2c004000 0 0x2000>, 16 <0x0 0x2c006000 0 0x2000>; 17 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 18 }; 19}; 20