xref: /linux/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi (revision e7d759f31ca295d589f7420719c311870bb3166f) 
1// SPDX-License-Identifier: GPL-2.0+ OR MIT
2/*
3 * PMGR Power domains for the Apple T8103 "M1" SoC
4 *
5 * Copyright The Asahi Linux Contributors
6 */
7
8
9&pmgr {
10	ps_sbr: power-controller@100 {
11		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
12		reg = <0x100 4>;
13		#power-domain-cells = <0>;
14		#reset-cells = <0>;
15		label = "sbr";
16		apple,always-on; /* Core device */
17	};
18
19	ps_aic: power-controller@108 {
20		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
21		reg = <0x108 4>;
22		#power-domain-cells = <0>;
23		#reset-cells = <0>;
24		label = "aic";
25		apple,always-on; /* Core device */
26	};
27
28	ps_dwi: power-controller@110 {
29		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
30		reg = <0x110 4>;
31		#power-domain-cells = <0>;
32		#reset-cells = <0>;
33		label = "dwi";
34		apple,always-on; /* Core device */
35	};
36
37	ps_soc_spmi0: power-controller@118 {
38		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
39		reg = <0x118 4>;
40		#power-domain-cells = <0>;
41		#reset-cells = <0>;
42		label = "soc_spmi0";
43	};
44
45	ps_soc_spmi1: power-controller@120 {
46		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
47		reg = <0x120 4>;
48		#power-domain-cells = <0>;
49		#reset-cells = <0>;
50		label = "soc_spmi1";
51	};
52
53	ps_soc_spmi2: power-controller@128 {
54		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
55		reg = <0x128 4>;
56		#power-domain-cells = <0>;
57		#reset-cells = <0>;
58		label = "soc_spmi2";
59	};
60
61	ps_gpio: power-controller@130 {
62		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
63		reg = <0x130 4>;
64		#power-domain-cells = <0>;
65		#reset-cells = <0>;
66		label = "gpio";
67	};
68
69	ps_pms_busif: power-controller@138 {
70		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
71		reg = <0x138 4>;
72		#power-domain-cells = <0>;
73		#reset-cells = <0>;
74		label = "pms_busif";
75		apple,always-on; /* Core device */
76	};
77
78	ps_pms: power-controller@140 {
79		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
80		reg = <0x140 4>;
81		#power-domain-cells = <0>;
82		#reset-cells = <0>;
83		label = "pms";
84		apple,always-on; /* Core device */
85	};
86
87	ps_pms_fpwm0: power-controller@148 {
88		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
89		reg = <0x148 4>;
90		#power-domain-cells = <0>;
91		#reset-cells = <0>;
92		label = "pms_fpwm0";
93		power-domains = <&ps_pms>;
94	};
95
96	ps_pms_fpwm1: power-controller@150 {
97		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
98		reg = <0x150 4>;
99		#power-domain-cells = <0>;
100		#reset-cells = <0>;
101		label = "pms_fpwm1";
102		power-domains = <&ps_pms>;
103	};
104
105	ps_pms_fpwm2: power-controller@158 {
106		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
107		reg = <0x158 4>;
108		#power-domain-cells = <0>;
109		#reset-cells = <0>;
110		label = "pms_fpwm2";
111		power-domains = <&ps_pms>;
112	};
113
114	ps_pms_fpwm3: power-controller@160 {
115		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
116		reg = <0x160 4>;
117		#power-domain-cells = <0>;
118		#reset-cells = <0>;
119		label = "pms_fpwm3";
120		power-domains = <&ps_pms>;
121	};
122
123	ps_pms_fpwm4: power-controller@168 {
124		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
125		reg = <0x168 4>;
126		#power-domain-cells = <0>;
127		#reset-cells = <0>;
128		label = "pms_fpwm4";
129		power-domains = <&ps_pms>;
130	};
131
132	ps_soc_dpe: power-controller@170 {
133		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
134		reg = <0x170 4>;
135		#power-domain-cells = <0>;
136		#reset-cells = <0>;
137		label = "soc_dpe";
138		apple,always-on; /* Core device */
139	};
140
141	ps_pmgr_soc_ocla: power-controller@178 {
142		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
143		reg = <0x178 4>;
144		#power-domain-cells = <0>;
145		#reset-cells = <0>;
146		label = "pmgr_soc_ocla";
147	};
148
149	ps_ispsens0: power-controller@180 {
150		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
151		reg = <0x180 4>;
152		#power-domain-cells = <0>;
153		#reset-cells = <0>;
154		label = "ispsens0";
155	};
156
157	ps_ispsens1: power-controller@188 {
158		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
159		reg = <0x188 4>;
160		#power-domain-cells = <0>;
161		#reset-cells = <0>;
162		label = "ispsens1";
163	};
164
165	ps_ispsens2: power-controller@190 {
166		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
167		reg = <0x190 4>;
168		#power-domain-cells = <0>;
169		#reset-cells = <0>;
170		label = "ispsens2";
171	};
172
173	ps_ispsens3: power-controller@198 {
174		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
175		reg = <0x198 4>;
176		#power-domain-cells = <0>;
177		#reset-cells = <0>;
178		label = "ispsens3";
179	};
180
181	ps_pcie_ref: power-controller@1a0 {
182		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
183		reg = <0x1a0 4>;
184		#power-domain-cells = <0>;
185		#reset-cells = <0>;
186		label = "pcie_ref";
187	};
188
189	ps_aft0: power-controller@1a8 {
190		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
191		reg = <0x1a8 4>;
192		#power-domain-cells = <0>;
193		#reset-cells = <0>;
194		label = "aft0";
195	};
196
197	ps_devc0_ivdmc: power-controller@1b0 {
198		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
199		reg = <0x1b0 4>;
200		#power-domain-cells = <0>;
201		#reset-cells = <0>;
202		label = "devc0_ivdmc";
203	};
204
205	ps_imx: power-controller@1b8 {
206		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
207		reg = <0x1b8 4>;
208		#power-domain-cells = <0>;
209		#reset-cells = <0>;
210		label = "imx";
211		apple,always-on; /* Apple fabric, critical block */
212	};
213
214	ps_sio_busif: power-controller@1c0 {
215		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
216		reg = <0x1c0 4>;
217		#power-domain-cells = <0>;
218		#reset-cells = <0>;
219		label = "sio_busif";
220	};
221
222	ps_sio: power-controller@1c8 {
223		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
224		reg = <0x1c8 4>;
225		#power-domain-cells = <0>;
226		#reset-cells = <0>;
227		label = "sio";
228		power-domains = <&ps_sio_busif>;
229	};
230
231	ps_sio_cpu: power-controller@1d0 {
232		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
233		reg = <0x1d0 4>;
234		#power-domain-cells = <0>;
235		#reset-cells = <0>;
236		label = "sio_cpu";
237		power-domains = <&ps_sio>;
238	};
239
240	ps_fpwm0: power-controller@1d8 {
241		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
242		reg = <0x1d8 4>;
243		#power-domain-cells = <0>;
244		#reset-cells = <0>;
245		label = "fpwm0";
246	};
247
248	ps_fpwm1: power-controller@1e0 {
249		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
250		reg = <0x1e0 4>;
251		#power-domain-cells = <0>;
252		#reset-cells = <0>;
253		label = "fpwm1";
254	};
255
256	ps_fpwm2: power-controller@1e8 {
257		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
258		reg = <0x1e8 4>;
259		#power-domain-cells = <0>;
260		#reset-cells = <0>;
261		label = "fpwm2";
262	};
263
264	ps_i2c0: power-controller@1f0 {
265		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
266		reg = <0x1f0 4>;
267		#power-domain-cells = <0>;
268		#reset-cells = <0>;
269		label = "i2c0";
270		power-domains = <&ps_sio>;
271	};
272
273	ps_i2c1: power-controller@1f8 {
274		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
275		reg = <0x1f8 4>;
276		#power-domain-cells = <0>;
277		#reset-cells = <0>;
278		label = "i2c1";
279		power-domains = <&ps_sio>;
280	};
281
282	ps_i2c2: power-controller@200 {
283		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
284		reg = <0x200 4>;
285		#power-domain-cells = <0>;
286		#reset-cells = <0>;
287		label = "i2c2";
288		power-domains = <&ps_sio>;
289	};
290
291	ps_i2c3: power-controller@208 {
292		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
293		reg = <0x208 4>;
294		#power-domain-cells = <0>;
295		#reset-cells = <0>;
296		label = "i2c3";
297		power-domains = <&ps_sio>;
298	};
299
300	ps_i2c4: power-controller@210 {
301		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
302		reg = <0x210 4>;
303		#power-domain-cells = <0>;
304		#reset-cells = <0>;
305		label = "i2c4";
306		power-domains = <&ps_sio>;
307	};
308
309	ps_spi_p: power-controller@218 {
310		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
311		reg = <0x218 4>;
312		#power-domain-cells = <0>;
313		#reset-cells = <0>;
314		label = "spi_p";
315		power-domains = <&ps_sio>;
316	};
317
318	ps_uart_p: power-controller@220 {
319		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
320		reg = <0x220 4>;
321		#power-domain-cells = <0>;
322		#reset-cells = <0>;
323		label = "uart_p";
324		power-domains = <&ps_sio>;
325	};
326
327	ps_audio_p: power-controller@228 {
328		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
329		reg = <0x228 4>;
330		#power-domain-cells = <0>;
331		#reset-cells = <0>;
332		label = "audio_p";
333		power-domains = <&ps_sio>;
334	};
335
336	ps_sio_adma: power-controller@230 {
337		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
338		reg = <0x230 4>;
339		#power-domain-cells = <0>;
340		#reset-cells = <0>;
341		label = "sio_adma";
342		power-domains = <&ps_sio>, <&ps_pms>, <&ps_audio_p>;
343	};
344
345	ps_aes: power-controller@238 {
346		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
347		reg = <0x238 4>;
348		#power-domain-cells = <0>;
349		#reset-cells = <0>;
350		label = "aes";
351		power-domains = <&ps_sio>;
352	};
353
354	ps_spi0: power-controller@240 {
355		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
356		reg = <0x240 4>;
357		#power-domain-cells = <0>;
358		#reset-cells = <0>;
359		label = "spi0";
360		power-domains = <&ps_sio>, <&ps_spi_p>;
361	};
362
363	ps_spi1: power-controller@248 {
364		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
365		reg = <0x248 4>;
366		#power-domain-cells = <0>;
367		#reset-cells = <0>;
368		label = "spi1";
369		power-domains = <&ps_sio>, <&ps_spi_p>;
370	};
371
372	ps_spi2: power-controller@250 {
373		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
374		reg = <0x250 4>;
375		#power-domain-cells = <0>;
376		#reset-cells = <0>;
377		label = "spi2";
378		power-domains = <&ps_sio>, <&ps_spi_p>;
379	};
380
381	ps_spi3: power-controller@258 {
382		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
383		reg = <0x258 4>;
384		#power-domain-cells = <0>;
385		#reset-cells = <0>;
386		label = "spi3";
387		power-domains = <&ps_sio>, <&ps_spi_p>;
388	};
389
390	ps_uart_n: power-controller@268 {
391		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
392		reg = <0x268 4>;
393		#power-domain-cells = <0>;
394		#reset-cells = <0>;
395		label = "uart_n";
396		power-domains = <&ps_uart_p>;
397	};
398
399	ps_uart0: power-controller@270 {
400		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
401		reg = <0x270 4>;
402		#power-domain-cells = <0>;
403		#reset-cells = <0>;
404		label = "uart0";
405		power-domains = <&ps_uart_p>;
406	};
407
408	ps_uart1: power-controller@278 {
409		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
410		reg = <0x278 4>;
411		#power-domain-cells = <0>;
412		#reset-cells = <0>;
413		label = "uart1";
414		power-domains = <&ps_uart_p>;
415	};
416
417	ps_uart2: power-controller@280 {
418		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
419		reg = <0x280 4>;
420		#power-domain-cells = <0>;
421		#reset-cells = <0>;
422		label = "uart2";
423		power-domains = <&ps_uart_p>;
424	};
425
426	ps_uart3: power-controller@288 {
427		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
428		reg = <0x288 4>;
429		#power-domain-cells = <0>;
430		#reset-cells = <0>;
431		label = "uart3";
432		power-domains = <&ps_uart_p>;
433	};
434
435	ps_uart4: power-controller@290 {
436		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
437		reg = <0x290 4>;
438		#power-domain-cells = <0>;
439		#reset-cells = <0>;
440		label = "uart4";
441		power-domains = <&ps_uart_p>;
442	};
443
444	ps_uart5: power-controller@298 {
445		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
446		reg = <0x298 4>;
447		#power-domain-cells = <0>;
448		#reset-cells = <0>;
449		label = "uart5";
450		power-domains = <&ps_uart_p>;
451	};
452
453	ps_uart6: power-controller@2a0 {
454		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
455		reg = <0x2a0 4>;
456		#power-domain-cells = <0>;
457		#reset-cells = <0>;
458		label = "uart6";
459		power-domains = <&ps_uart_p>;
460	};
461
462	ps_uart7: power-controller@2a8 {
463		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
464		reg = <0x2a8 4>;
465		#power-domain-cells = <0>;
466		#reset-cells = <0>;
467		label = "uart7";
468		power-domains = <&ps_uart_p>;
469	};
470
471	ps_uart8: power-controller@2b0 {
472		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
473		reg = <0x2b0 4>;
474		#power-domain-cells = <0>;
475		#reset-cells = <0>;
476		label = "uart8";
477		power-domains = <&ps_uart_p>;
478	};
479
480	ps_mca0: power-controller@2b8 {
481		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
482		reg = <0x2b8 4>;
483		#power-domain-cells = <0>;
484		#reset-cells = <0>;
485		label = "mca0";
486		power-domains = <&ps_audio_p>, <&ps_sio_adma>;
487	};
488
489	ps_mca1: power-controller@2c0 {
490		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
491		reg = <0x2c0 4>;
492		#power-domain-cells = <0>;
493		#reset-cells = <0>;
494		label = "mca1";
495		power-domains = <&ps_audio_p>, <&ps_sio_adma>;
496	};
497
498	ps_mca2: power-controller@2c8 {
499		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
500		reg = <0x2c8 4>;
501		#power-domain-cells = <0>;
502		#reset-cells = <0>;
503		label = "mca2";
504		power-domains = <&ps_audio_p>, <&ps_sio_adma>;
505	};
506
507	ps_mca3: power-controller@2d0 {
508		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
509		reg = <0x2d0 4>;
510		#power-domain-cells = <0>;
511		#reset-cells = <0>;
512		label = "mca3";
513		power-domains = <&ps_audio_p>, <&ps_sio_adma>;
514	};
515
516	ps_mca4: power-controller@2d8 {
517		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
518		reg = <0x2d8 4>;
519		#power-domain-cells = <0>;
520		#reset-cells = <0>;
521		label = "mca4";
522		power-domains = <&ps_audio_p>, <&ps_sio_adma>;
523	};
524
525	ps_mca5: power-controller@2e0 {
526		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
527		reg = <0x2e0 4>;
528		#power-domain-cells = <0>;
529		#reset-cells = <0>;
530		label = "mca5";
531		power-domains = <&ps_audio_p>, <&ps_sio_adma>;
532	};
533
534	ps_dpa0: power-controller@2e8 {
535		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
536		reg = <0x2e8 4>;
537		#power-domain-cells = <0>;
538		#reset-cells = <0>;
539		label = "dpa0";
540		power-domains = <&ps_audio_p>;
541	};
542
543	ps_dpa1: power-controller@2f0 {
544		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
545		reg = <0x2f0 4>;
546		#power-domain-cells = <0>;
547		#reset-cells = <0>;
548		label = "dpa1";
549		power-domains = <&ps_audio_p>;
550	};
551
552	ps_mcc: power-controller@2f8 {
553		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
554		reg = <0x2f8 4>;
555		#power-domain-cells = <0>;
556		#reset-cells = <0>;
557		label = "mcc";
558		apple,always-on; /* Memory controller */
559	};
560
561	ps_spi4: power-controller@260 {
562		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
563		reg = <0x260 4>;
564		#power-domain-cells = <0>;
565		#reset-cells = <0>;
566		label = "spi4";
567		power-domains = <&ps_sio>, <&ps_spi_p>;
568	};
569
570	ps_dcs0: power-controller@300 {
571		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
572		reg = <0x300 4>;
573		#power-domain-cells = <0>;
574		#reset-cells = <0>;
575		label = "dcs0";
576		apple,always-on; /* LPDDR4 interface */
577	};
578
579	ps_dcs1: power-controller@310 {
580		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
581		reg = <0x310 4>;
582		#power-domain-cells = <0>;
583		#reset-cells = <0>;
584		label = "dcs1";
585		apple,always-on; /* LPDDR4 interface */
586	};
587
588	ps_dcs2: power-controller@308 {
589		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
590		reg = <0x308 4>;
591		#power-domain-cells = <0>;
592		#reset-cells = <0>;
593		label = "dcs2";
594		apple,always-on; /* LPDDR4 interface */
595	};
596
597	ps_dcs3: power-controller@318 {
598		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
599		reg = <0x318 4>;
600		#power-domain-cells = <0>;
601		#reset-cells = <0>;
602		label = "dcs3";
603		apple,always-on; /* LPDDR4 interface */
604	};
605
606	ps_smx: power-controller@340 {
607		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
608		reg = <0x340 4>;
609		#power-domain-cells = <0>;
610		#reset-cells = <0>;
611		label = "smx";
612		apple,always-on; /* Apple fabric, critical block */
613	};
614
615	ps_apcie: power-controller@348 {
616		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
617		reg = <0x348 4>;
618		#power-domain-cells = <0>;
619		#reset-cells = <0>;
620		label = "apcie";
621		power-domains = <&ps_imx>, <&ps_pcie_ref>;
622	};
623
624	ps_rmx: power-controller@350 {
625		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
626		reg = <0x350 4>;
627		#power-domain-cells = <0>;
628		#reset-cells = <0>;
629		label = "rmx";
630		/* Apple Fabric, display/image stuff: this can power down */
631	};
632
633	ps_mmx: power-controller@358 {
634		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
635		reg = <0x358 4>;
636		#power-domain-cells = <0>;
637		#reset-cells = <0>;
638		label = "mmx";
639		/* Apple Fabric, media stuff: this can power down */
640	};
641
642	ps_disp0_fe: power-controller@360 {
643		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
644		reg = <0x360 4>;
645		#power-domain-cells = <0>;
646		#reset-cells = <0>;
647		label = "disp0_fe";
648		power-domains = <&ps_rmx>;
649		apple,always-on; /* TODO: figure out if we can enable PM here */
650	};
651
652	ps_dispext_fe: power-controller@368 {
653		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
654		reg = <0x368 4>;
655		#power-domain-cells = <0>;
656		#reset-cells = <0>;
657		label = "dispext_fe";
658		power-domains = <&ps_rmx>;
659	};
660
661	ps_dispext_cpu0: power-controller@378 {
662		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
663		reg = <0x378 4>;
664		#power-domain-cells = <0>;
665		#reset-cells = <0>;
666		label = "dispext_cpu0";
667		power-domains = <&ps_dispext_fe>;
668		apple,min-state = <4>;
669	};
670
671	ps_jpg: power-controller@3c0 {
672		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
673		reg = <0x3c0 4>;
674		#power-domain-cells = <0>;
675		#reset-cells = <0>;
676		label = "jpg";
677		power-domains = <&ps_mmx>;
678	};
679
680	ps_msr: power-controller@3c8 {
681		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
682		reg = <0x3c8 4>;
683		#power-domain-cells = <0>;
684		#reset-cells = <0>;
685		label = "msr";
686		power-domains = <&ps_mmx>;
687	};
688
689	ps_msr_ase_core: power-controller@3d0 {
690		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
691		reg = <0x3d0 4>;
692		#power-domain-cells = <0>;
693		#reset-cells = <0>;
694		label = "msr_ase_core";
695	};
696
697	ps_pmp: power-controller@3d8 {
698		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
699		reg = <0x3d8 4>;
700		#power-domain-cells = <0>;
701		#reset-cells = <0>;
702		label = "pmp";
703	};
704
705	ps_pms_sram: power-controller@3e0 {
706		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
707		reg = <0x3e0 4>;
708		#power-domain-cells = <0>;
709		#reset-cells = <0>;
710		label = "pms_sram";
711	};
712
713	ps_apcie_gp: power-controller@3e8 {
714		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
715		reg = <0x3e8 4>;
716		#power-domain-cells = <0>;
717		#reset-cells = <0>;
718		label = "apcie_gp";
719		power-domains = <&ps_apcie>;
720	};
721
722	ps_ans2: power-controller@3f0 {
723		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
724		reg = <0x3f0 4>;
725		#power-domain-cells = <0>;
726		#reset-cells = <0>;
727		label = "ans2";
728	};
729
730	ps_gfx: power-controller@3f8 {
731		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
732		reg = <0x3f8 4>;
733		#power-domain-cells = <0>;
734		#reset-cells = <0>;
735		label = "gfx";
736	};
737
738	ps_dcs4: power-controller@320 {
739		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
740		reg = <0x320 4>;
741		#power-domain-cells = <0>;
742		#reset-cells = <0>;
743		label = "dcs4";
744		apple,always-on; /* LPDDR4 interface */
745	};
746
747	ps_dcs5: power-controller@330 {
748		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
749		reg = <0x330 4>;
750		#power-domain-cells = <0>;
751		#reset-cells = <0>;
752		label = "dcs5";
753		apple,always-on; /* LPDDR4 interface */
754	};
755
756	ps_dcs6: power-controller@328 {
757		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
758		reg = <0x328 4>;
759		#power-domain-cells = <0>;
760		#reset-cells = <0>;
761		label = "dcs6";
762		apple,always-on; /* LPDDR4 interface */
763	};
764
765	ps_dcs7: power-controller@338 {
766		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
767		reg = <0x338 4>;
768		#power-domain-cells = <0>;
769		#reset-cells = <0>;
770		label = "dcs7";
771		apple,always-on; /* LPDDR4 interface */
772	};
773
774	ps_dispdfr_fe: power-controller@3a8 {
775		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
776		reg = <0x3a8 4>;
777		#power-domain-cells = <0>;
778		#reset-cells = <0>;
779		label = "dispdfr_fe";
780		power-domains = <&ps_rmx>;
781	};
782
783	ps_dispdfr_be: power-controller@3b0 {
784		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
785		reg = <0x3b0 4>;
786		#power-domain-cells = <0>;
787		#reset-cells = <0>;
788		label = "dispdfr_be";
789		power-domains = <&ps_dispdfr_fe>;
790	};
791
792	ps_mipi_dsi: power-controller@3b8 {
793		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
794		reg = <0x3b8 4>;
795		#power-domain-cells = <0>;
796		#reset-cells = <0>;
797		label = "mipi_dsi";
798		power-domains = <&ps_dispdfr_be>;
799	};
800
801	ps_isp_sys: power-controller@400 {
802		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
803		reg = <0x400 4>;
804		#power-domain-cells = <0>;
805		#reset-cells = <0>;
806		label = "isp_sys";
807		power-domains = <&ps_rmx>;
808	};
809
810	ps_venc_sys: power-controller@408 {
811		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
812		reg = <0x408 4>;
813		#power-domain-cells = <0>;
814		#reset-cells = <0>;
815		label = "venc_sys";
816		power-domains = <&ps_mmx>;
817	};
818
819	ps_avd_sys: power-controller@410 {
820		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
821		reg = <0x410 4>;
822		#power-domain-cells = <0>;
823		#reset-cells = <0>;
824		label = "avd_sys";
825		power-domains = <&ps_mmx>;
826	};
827
828	ps_apcie_st: power-controller@418 {
829		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
830		reg = <0x418 4>;
831		#power-domain-cells = <0>;
832		#reset-cells = <0>;
833		label = "apcie_st";
834		power-domains = <&ps_apcie>, <&ps_ans2>;
835	};
836
837	ps_ane_sys: power-controller@470 {
838		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
839		reg = <0x470 4>;
840		#power-domain-cells = <0>;
841		#reset-cells = <0>;
842		label = "ane_sys";
843	};
844
845	ps_atc0_common: power-controller@420 {
846		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
847		reg = <0x420 4>;
848		#power-domain-cells = <0>;
849		#reset-cells = <0>;
850		label = "atc0_common";
851	};
852
853	ps_atc0_pcie: power-controller@428 {
854		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
855		reg = <0x428 4>;
856		#power-domain-cells = <0>;
857		#reset-cells = <0>;
858		label = "atc0_pcie";
859		power-domains = <&ps_atc0_common>;
860	};
861
862	ps_atc0_cio: power-controller@430 {
863		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
864		reg = <0x430 4>;
865		#power-domain-cells = <0>;
866		#reset-cells = <0>;
867		label = "atc0_cio";
868		power-domains = <&ps_atc0_common>;
869	};
870
871	ps_atc0_cio_pcie: power-controller@438 {
872		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
873		reg = <0x438 4>;
874		#power-domain-cells = <0>;
875		#reset-cells = <0>;
876		label = "atc0_cio_pcie";
877		power-domains = <&ps_atc0_cio>;
878	};
879
880	ps_atc0_cio_usb: power-controller@440 {
881		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
882		reg = <0x440 4>;
883		#power-domain-cells = <0>;
884		#reset-cells = <0>;
885		label = "atc0_cio_usb";
886		power-domains = <&ps_atc0_cio>;
887	};
888
889	ps_atc1_common: power-controller@448 {
890		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
891		reg = <0x448 4>;
892		#power-domain-cells = <0>;
893		#reset-cells = <0>;
894		label = "atc1_common";
895	};
896
897	ps_atc1_pcie: power-controller@450 {
898		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
899		reg = <0x450 4>;
900		#power-domain-cells = <0>;
901		#reset-cells = <0>;
902		label = "atc1_pcie";
903		power-domains = <&ps_atc1_common>;
904	};
905
906	ps_atc1_cio: power-controller@458 {
907		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
908		reg = <0x458 4>;
909		#power-domain-cells = <0>;
910		#reset-cells = <0>;
911		label = "atc1_cio";
912		power-domains = <&ps_atc1_common>;
913	};
914
915	ps_atc1_cio_pcie: power-controller@460 {
916		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
917		reg = <0x460 4>;
918		#power-domain-cells = <0>;
919		#reset-cells = <0>;
920		label = "atc1_cio_pcie";
921		power-domains = <&ps_atc1_cio>;
922	};
923
924	ps_atc1_cio_usb: power-controller@468 {
925		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
926		reg = <0x468 4>;
927		#power-domain-cells = <0>;
928		#reset-cells = <0>;
929		label = "atc1_cio_usb";
930		power-domains = <&ps_atc1_cio>;
931	};
932
933	ps_sep: power-controller@c00 {
934		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
935		reg = <0xc00 4>;
936		#power-domain-cells = <0>;
937		#reset-cells = <0>;
938		label = "sep";
939		apple,always-on; /* Locked on */
940	};
941
942	ps_venc_dma: power-controller@8000 {
943		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
944		reg = <0x8000 4>;
945		#power-domain-cells = <0>;
946		#reset-cells = <0>;
947		label = "venc_dma";
948		power-domains = <&ps_venc_sys>;
949	};
950
951	ps_venc_pipe4: power-controller@8008 {
952		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
953		reg = <0x8008 4>;
954		#power-domain-cells = <0>;
955		#reset-cells = <0>;
956		label = "venc_pipe4";
957		power-domains = <&ps_venc_dma>;
958	};
959
960	ps_venc_pipe5: power-controller@8010 {
961		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
962		reg = <0x8010 4>;
963		#power-domain-cells = <0>;
964		#reset-cells = <0>;
965		label = "venc_pipe5";
966		power-domains = <&ps_venc_dma>;
967	};
968
969	ps_venc_me0: power-controller@8018 {
970		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
971		reg = <0x8018 4>;
972		#power-domain-cells = <0>;
973		#reset-cells = <0>;
974		label = "venc_me0";
975		power-domains = <&ps_venc_pipe4>, <&ps_venc_pipe5>;
976	};
977
978	ps_venc_me1: power-controller@8020 {
979		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
980		reg = <0x8020 4>;
981		#power-domain-cells = <0>;
982		#reset-cells = <0>;
983		label = "venc_me1";
984		power-domains = <&ps_venc_pipe4>, <&ps_venc_pipe5>;
985	};
986
987	ps_ane_sys_cpu: power-controller@c000 {
988		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
989		reg = <0xc000 4>;
990		#power-domain-cells = <0>;
991		#reset-cells = <0>;
992		label = "ane_sys_cpu";
993		power-domains = <&ps_ane_sys>;
994	};
995
996	ps_disp0_cpu0: power-controller@10018 {
997		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
998		reg = <0x10018 4>;
999		#power-domain-cells = <0>;
1000		#reset-cells = <0>;
1001		label = "disp0_cpu0";
1002		power-domains = <&ps_disp0_fe>;
1003		apple,always-on; /* TODO: figure out if we can enable PM here */
1004		apple,min-state = <4>;
1005	};
1006};
1007
1008&pmgr_mini {
1009	ps_debug: power-controller@58 {
1010		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1011		reg = <0x58 4>;
1012		#power-domain-cells = <0>;
1013		#reset-cells = <0>;
1014		label = "debug";
1015		apple,always-on; /* Core AON device */
1016	};
1017
1018	ps_nub_spmi0: power-controller@60 {
1019		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1020		reg = <0x60 4>;
1021		#power-domain-cells = <0>;
1022		#reset-cells = <0>;
1023		label = "nub_spmi0";
1024		apple,always-on; /* Core AON device */
1025	};
1026
1027	ps_nub_aon: power-controller@70 {
1028		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1029		reg = <0x70 4>;
1030		#power-domain-cells = <0>;
1031		#reset-cells = <0>;
1032		label = "nub_aon";
1033		apple,always-on; /* Core AON device */
1034	};
1035
1036	ps_nub_gpio: power-controller@80 {
1037		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1038		reg = <0x80 4>;
1039		#power-domain-cells = <0>;
1040		#reset-cells = <0>;
1041		label = "nub_gpio";
1042		apple,always-on; /* Core AON device */
1043	};
1044
1045	ps_nub_fabric: power-controller@a8 {
1046		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1047		reg = <0xa8 4>;
1048		#power-domain-cells = <0>;
1049		#reset-cells = <0>;
1050		label = "nub_fabric";
1051		apple,always-on; /* Core AON device */
1052	};
1053
1054	ps_nub_sram: power-controller@b0 {
1055		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1056		reg = <0xb0 4>;
1057		#power-domain-cells = <0>;
1058		#reset-cells = <0>;
1059		label = "nub_sram";
1060		apple,always-on; /* Core AON device */
1061	};
1062
1063	ps_debug_usb: power-controller@b8 {
1064		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1065		reg = <0xb8 4>;
1066		#power-domain-cells = <0>;
1067		#reset-cells = <0>;
1068		label = "debug_usb";
1069		apple,always-on; /* Core AON device */
1070		power-domains = <&ps_debug>;
1071	};
1072
1073	ps_debug_auth: power-controller@c0 {
1074		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1075		reg = <0xc0 4>;
1076		#power-domain-cells = <0>;
1077		#reset-cells = <0>;
1078		label = "debug_auth";
1079		apple,always-on; /* Core AON device */
1080		power-domains = <&ps_debug>;
1081	};
1082
1083	ps_nub_spmi1: power-controller@68 {
1084		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1085		reg = <0x68 4>;
1086		#power-domain-cells = <0>;
1087		#reset-cells = <0>;
1088		label = "nub_spmi1";
1089		apple,always-on; /* Core AON device */
1090	};
1091
1092	ps_msg: power-controller@78 {
1093		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1094		reg = <0x78 4>;
1095		#power-domain-cells = <0>;
1096		#reset-cells = <0>;
1097		label = "msg";
1098	};
1099
1100	ps_atc0_usb_aon: power-controller@88 {
1101		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1102		reg = <0x88 4>;
1103		#power-domain-cells = <0>;
1104		#reset-cells = <0>;
1105		label = "atc0_usb_aon";
1106	};
1107
1108	ps_atc1_usb_aon: power-controller@90 {
1109		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1110		reg = <0x90 4>;
1111		#power-domain-cells = <0>;
1112		#reset-cells = <0>;
1113		label = "atc1_usb_aon";
1114	};
1115
1116	ps_atc0_usb: power-controller@98 {
1117		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1118		reg = <0x98 4>;
1119		#power-domain-cells = <0>;
1120		#reset-cells = <0>;
1121		label = "atc0_usb";
1122		power-domains = <&ps_atc0_usb_aon>, <&ps_atc0_common>;
1123	};
1124
1125	ps_atc1_usb: power-controller@a0 {
1126		compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
1127		reg = <0xa0 4>;
1128		#power-domain-cells = <0>;
1129		#reset-cells = <0>;
1130		label = "atc1_usb";
1131		power-domains = <&ps_atc1_usb_aon>, <&ps_atc1_common>;
1132	};
1133};
1134