1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * Devices used on die 0 on the Apple T6002 "M1 Ultra" SoC and present on 4 * Apple T6000 / T6001 "M1 Pro" / "M1 Max". 5 * 6 * Copyright The Asahi Linux Contributors 7 */ 8 9 10 nco: clock-controller@28e03c000 { 11 compatible = "apple,t6000-nco", "apple,nco"; 12 reg = <0x2 0x8e03c000 0x0 0x14000>; 13 clocks = <&nco_clkref>; 14 #clock-cells = <1>; 15 }; 16 17 aic: interrupt-controller@28e100000 { 18 compatible = "apple,t6000-aic", "apple,aic2"; 19 #interrupt-cells = <4>; 20 interrupt-controller; 21 reg = <0x2 0x8e100000 0x0 0xc000>, 22 <0x2 0x8e10c000 0x0 0x4>; 23 reg-names = "core", "event"; 24 power-domains = <&ps_aic>; 25 }; 26 27 smc: smc@290400000 { 28 compatible = "apple,t6000-smc", "apple,smc"; 29 reg = <0x2 0x90400000 0x0 0x4000>, 30 <0x2 0x91e00000 0x0 0x100000>; 31 reg-names = "smc", "sram"; 32 mboxes = <&smc_mbox>; 33 34 smc_gpio: gpio { 35 compatible = "apple,smc-gpio"; 36 gpio-controller; 37 #gpio-cells = <2>; 38 }; 39 40 smc_reboot: reboot { 41 compatible = "apple,smc-reboot"; 42 nvmem-cells = <&shutdown_flag>, <&boot_stage>, 43 <&boot_error_count>, <&panic_count>; 44 nvmem-cell-names = "shutdown_flag", "boot_stage", 45 "boot_error_count", "panic_count"; 46 }; 47 }; 48 49 smc_mbox: mbox@290408000 { 50 compatible = "apple,t6000-asc-mailbox", "apple,asc-mailbox-v4"; 51 reg = <0x2 0x90408000 0x0 0x4000>; 52 interrupt-parent = <&aic>; 53 interrupts = <AIC_IRQ 0 754 IRQ_TYPE_LEVEL_HIGH>, 54 <AIC_IRQ 0 755 IRQ_TYPE_LEVEL_HIGH>, 55 <AIC_IRQ 0 756 IRQ_TYPE_LEVEL_HIGH>, 56 <AIC_IRQ 0 757 IRQ_TYPE_LEVEL_HIGH>; 57 interrupt-names = "send-empty", "send-not-empty", 58 "recv-empty", "recv-not-empty"; 59 #mbox-cells = <0>; 60 }; 61 62 pinctrl_smc: pinctrl@290820000 { 63 compatible = "apple,t6000-pinctrl", "apple,pinctrl"; 64 reg = <0x2 0x90820000 0x0 0x4000>; 65 66 gpio-controller; 67 #gpio-cells = <2>; 68 gpio-ranges = <&pinctrl_smc 0 0 30>; 69 apple,npins = <30>; 70 71 interrupt-controller; 72 #interrupt-cells = <2>; 73 interrupt-parent = <&aic>; 74 interrupts = <AIC_IRQ 0 743 IRQ_TYPE_LEVEL_HIGH>, 75 <AIC_IRQ 0 744 IRQ_TYPE_LEVEL_HIGH>, 76 <AIC_IRQ 0 745 IRQ_TYPE_LEVEL_HIGH>, 77 <AIC_IRQ 0 746 IRQ_TYPE_LEVEL_HIGH>, 78 <AIC_IRQ 0 747 IRQ_TYPE_LEVEL_HIGH>, 79 <AIC_IRQ 0 748 IRQ_TYPE_LEVEL_HIGH>, 80 <AIC_IRQ 0 749 IRQ_TYPE_LEVEL_HIGH>; 81 }; 82 83 nub_spmi0: spmi@2920a1300 { 84 compatible = "apple,t6000-spmi", "apple,spmi"; 85 reg = <0x2 0x920a1300 0x0 0x100>; 86 #address-cells = <2>; 87 #size-cells = <0>; 88 89 pmic1: pmic@f { 90 compatible = "apple,maverick-pmic", "apple,spmi-nvmem"; 91 reg = <0xf SPMI_USID>; 92 93 nvmem-layout { 94 compatible = "fixed-layout"; 95 #address-cells = <1>; 96 #size-cells = <1>; 97 98 pm_setting: pm-setting@1405 { 99 reg = <0x1405 0x1>; 100 }; 101 102 rtc_offset: rtc-offset@1411 { 103 reg = <0x1411 0x6>; 104 }; 105 106 boot_stage: boot-stage@6001 { 107 reg = <0x6001 0x1>; 108 }; 109 110 boot_error_count: boot-error-count@6002,0 { 111 reg = <0x6002 0x1>; 112 bits = <0 4>; 113 }; 114 115 panic_count: panic-count@6002,4 { 116 reg = <0x6002 0x1>; 117 bits = <4 4>; 118 }; 119 120 boot_error_stage: boot-error-stage@6003 { 121 reg = <0x6003 0x1>; 122 }; 123 124 shutdown_flag: shutdown-flag@600f,3 { 125 reg = <0x600f 0x1>; 126 bits = <3 1>; 127 }; 128 129 fault_shadow: fault-shadow@867b { 130 reg = <0x867b 0x10>; 131 }; 132 133 socd: socd@8b00 { 134 reg = <0x8b00 0x400>; 135 }; 136 }; 137 }; 138 }; 139 140 wdt: watchdog@2922b0000 { 141 compatible = "apple,t6000-wdt", "apple,wdt"; 142 reg = <0x2 0x922b0000 0x0 0x4000>; 143 clocks = <&clkref>; 144 interrupt-parent = <&aic>; 145 interrupts = <AIC_IRQ 0 631 IRQ_TYPE_LEVEL_HIGH>; 146 }; 147 148 sio_dart_0: iommu@39b004000 { 149 compatible = "apple,t6000-dart"; 150 reg = <0x3 0x9b004000 0x0 0x4000>; 151 interrupt-parent = <&aic>; 152 interrupts = <AIC_IRQ 0 1130 IRQ_TYPE_LEVEL_HIGH>; 153 #iommu-cells = <1>; 154 power-domains = <&ps_sio_cpu>; 155 }; 156 157 sio_dart_1: iommu@39b008000 { 158 compatible = "apple,t6000-dart"; 159 reg = <0x3 0x9b008000 0x0 0x8000>; 160 interrupt-parent = <&aic>; 161 interrupts = <AIC_IRQ 0 1130 IRQ_TYPE_LEVEL_HIGH>; 162 #iommu-cells = <1>; 163 power-domains = <&ps_sio_cpu>; 164 }; 165 166 fpwm0: pwm@39b030000 { 167 compatible = "apple,t6000-fpwm", "apple,s5l-fpwm"; 168 reg = <0x3 0x9b030000 0x0 0x4000>; 169 power-domains = <&ps_fpwm0>; 170 clocks = <&clkref>; 171 #pwm-cells = <2>; 172 status = "disabled"; 173 }; 174 175 i2c0: i2c@39b040000 { 176 compatible = "apple,t6000-i2c", "apple,i2c"; 177 reg = <0x3 0x9b040000 0x0 0x4000>; 178 clocks = <&clkref>; 179 interrupt-parent = <&aic>; 180 interrupts = <AIC_IRQ 0 1119 IRQ_TYPE_LEVEL_HIGH>; 181 pinctrl-0 = <&i2c0_pins>; 182 pinctrl-names = "default"; 183 power-domains = <&ps_i2c0>; 184 #address-cells = <0x1>; 185 #size-cells = <0x0>; 186 }; 187 188 i2c1: i2c@39b044000 { 189 compatible = "apple,t6000-i2c", "apple,i2c"; 190 reg = <0x3 0x9b044000 0x0 0x4000>; 191 clocks = <&clkref>; 192 interrupt-parent = <&aic>; 193 interrupts = <AIC_IRQ 0 1120 IRQ_TYPE_LEVEL_HIGH>; 194 pinctrl-0 = <&i2c1_pins>; 195 pinctrl-names = "default"; 196 power-domains = <&ps_i2c1>; 197 #address-cells = <0x1>; 198 #size-cells = <0x0>; 199 status = "disabled"; 200 }; 201 202 i2c2: i2c@39b048000 { 203 compatible = "apple,t6000-i2c", "apple,i2c"; 204 reg = <0x3 0x9b048000 0x0 0x4000>; 205 clocks = <&clkref>; 206 interrupt-parent = <&aic>; 207 interrupts = <AIC_IRQ 0 1121 IRQ_TYPE_LEVEL_HIGH>; 208 pinctrl-0 = <&i2c2_pins>; 209 pinctrl-names = "default"; 210 power-domains = <&ps_i2c2>; 211 #address-cells = <0x1>; 212 #size-cells = <0x0>; 213 status = "disabled"; 214 }; 215 216 i2c3: i2c@39b04c000 { 217 compatible = "apple,t6000-i2c", "apple,i2c"; 218 reg = <0x3 0x9b04c000 0x0 0x4000>; 219 clocks = <&clkref>; 220 interrupt-parent = <&aic>; 221 interrupts = <AIC_IRQ 0 1122 IRQ_TYPE_LEVEL_HIGH>; 222 pinctrl-0 = <&i2c3_pins>; 223 pinctrl-names = "default"; 224 power-domains = <&ps_i2c3>; 225 #address-cells = <0x1>; 226 #size-cells = <0x0>; 227 status = "disabled"; 228 }; 229 230 i2c4: i2c@39b050000 { 231 compatible = "apple,t6000-i2c", "apple,i2c"; 232 reg = <0x3 0x9b050000 0x0 0x4000>; 233 clocks = <&clkref>; 234 interrupt-parent = <&aic>; 235 interrupts = <AIC_IRQ 0 1123 IRQ_TYPE_LEVEL_HIGH>; 236 pinctrl-0 = <&i2c4_pins>; 237 pinctrl-names = "default"; 238 power-domains = <&ps_i2c4>; 239 #address-cells = <0x1>; 240 #size-cells = <0x0>; 241 status = "disabled"; 242 }; 243 244 i2c5: i2c@39b054000 { 245 compatible = "apple,t6000-i2c", "apple,i2c"; 246 reg = <0x3 0x9b054000 0x0 0x4000>; 247 clocks = <&clkref>; 248 interrupt-parent = <&aic>; 249 interrupts = <AIC_IRQ 0 1124 IRQ_TYPE_LEVEL_HIGH>; 250 pinctrl-0 = <&i2c5_pins>; 251 pinctrl-names = "default"; 252 power-domains = <&ps_i2c5>; 253 #address-cells = <0x1>; 254 #size-cells = <0x0>; 255 status = "disabled"; 256 }; 257 258 spi1: spi@39b104000 { 259 compatible = "apple,t6000-spi", "apple,spi"; 260 reg = <0x3 0x9b104000 0x0 0x4000>; 261 interrupt-parent = <&aic>; 262 interrupts = <AIC_IRQ 0 1107 IRQ_TYPE_LEVEL_HIGH>; 263 #address-cells = <1>; 264 #size-cells = <0>; 265 clocks = <&clk_200m>; 266 pinctrl-0 = <&spi1_pins>; 267 pinctrl-names = "default"; 268 power-domains = <&ps_spi1>; 269 status = "disabled"; 270 }; 271 272 spi3: spi@39b10c000 { 273 compatible = "apple,t6000-spi", "apple,spi"; 274 reg = <0x3 0x9b10c000 0x0 0x4000>; 275 interrupt-parent = <&aic>; 276 interrupts = <AIC_IRQ 0 1109 IRQ_TYPE_LEVEL_HIGH>; 277 #address-cells = <1>; 278 #size-cells = <0>; 279 clocks = <&clkref>; 280 pinctrl-0 = <&spi3_pins>; 281 pinctrl-names = "default"; 282 power-domains = <&ps_spi3>; 283 status = "disabled"; 284 }; 285 286 serial0: serial@39b200000 { 287 compatible = "apple,s5l-uart"; 288 reg = <0x3 0x9b200000 0x0 0x1000>; 289 reg-io-width = <4>; 290 interrupt-parent = <&aic>; 291 interrupts = <AIC_IRQ 0 1097 IRQ_TYPE_LEVEL_HIGH>; 292 /* 293 * TODO: figure out the clocking properly, there may 294 * be a third selectable clock. 295 */ 296 clocks = <&clkref>, <&clkref>; 297 clock-names = "uart", "clk_uart_baud0"; 298 power-domains = <&ps_uart0>; 299 status = "disabled"; 300 }; 301 302 admac: dma-controller@39b400000 { 303 compatible = "apple,t6000-admac", "apple,admac"; 304 reg = <0x3 0x9b400000 0x0 0x34000>; 305 #dma-cells = <1>; 306 dma-channels = <16>; 307 interrupts-extended = <0>, 308 <&aic AIC_IRQ 0 1118 IRQ_TYPE_LEVEL_HIGH>, 309 <0>, 310 <0>; 311 iommus = <&sio_dart_0 2>, <&sio_dart_1 2>; 312 power-domains = <&ps_sio_adma>; 313 resets = <&ps_audio_p>; 314 }; 315 316 mca: mca@39b600000 { 317 compatible = "apple,t6000-mca", "apple,mca"; 318 reg = <0x3 0x9b600000 0x0 0x10000>, 319 <0x3 0x9b500000 0x0 0x20000>; 320 clocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>; 321 dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>, 322 <&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>, 323 <&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>, 324 <&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>; 325 dma-names = "tx0a", "rx0a", "tx0b", "rx0b", 326 "tx1a", "rx1a", "tx1b", "rx1b", 327 "tx2a", "rx2a", "tx2b", "rx2b", 328 "tx3a", "rx3a", "tx3b", "rx3b"; 329 interrupt-parent = <&aic>; 330 interrupts = <AIC_IRQ 0 1112 IRQ_TYPE_LEVEL_HIGH>, 331 <AIC_IRQ 0 1113 IRQ_TYPE_LEVEL_HIGH>, 332 <AIC_IRQ 0 1114 IRQ_TYPE_LEVEL_HIGH>, 333 <AIC_IRQ 0 1115 IRQ_TYPE_LEVEL_HIGH>; 334 power-domains = <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>, 335 <&ps_mca2>, <&ps_mca3>; 336 resets = <&ps_audio_p>; 337 #sound-dai-cells = <1>; 338 }; 339 340 gpu: gpu@406400000 { 341 compatible = "apple,agx-g13s"; 342 reg = <0x4 0x6400000 0 0x40000>, 343 <0x4 0x4000000 0 0x1000000>; 344 reg-names = "asc", "sgx"; 345 mboxes = <&agx_mbox>; 346 power-domains = <&ps_gfx>; 347 memory-region = <&uat_ttbs>, <&uat_pagetables>, <&uat_handoff>, 348 <&gpu_hw_cal_a>, <&gpu_hw_cal_b>, <&gpu_globals>; 349 memory-region-names = "ttbs", "pagetables", "handoff", 350 "hw-cal-a", "hw-cal-b", "globals"; 351 352 apple,firmware-abi = <0 0 0>; 353 }; 354 355 agx_mbox: mbox@406408000 { 356 compatible = "apple,t6000-asc-mailbox", "apple,asc-mailbox-v4"; 357 reg = <0x4 0x6408000 0x0 0x4000>; 358 interrupt-parent = <&aic>; 359 interrupts = <AIC_IRQ 0 1059 IRQ_TYPE_LEVEL_HIGH>, 360 <AIC_IRQ 0 1060 IRQ_TYPE_LEVEL_HIGH>, 361 <AIC_IRQ 0 1061 IRQ_TYPE_LEVEL_HIGH>, 362 <AIC_IRQ 0 1062 IRQ_TYPE_LEVEL_HIGH>; 363 interrupt-names = "send-empty", "send-not-empty", 364 "recv-empty", "recv-not-empty"; 365 #mbox-cells = <0>; 366 }; 367 368 pcie0_dart_0: iommu@581008000 { 369 compatible = "apple,t6000-dart"; 370 reg = <0x5 0x81008000 0x0 0x4000>; 371 #iommu-cells = <1>; 372 interrupt-parent = <&aic>; 373 interrupts = <AIC_IRQ 0 1271 IRQ_TYPE_LEVEL_HIGH>; 374 power-domains = <&ps_apcie_gp_sys>; 375 }; 376 377 pcie0_dart_1: iommu@582008000 { 378 compatible = "apple,t6000-dart"; 379 reg = <0x5 0x82008000 0x0 0x4000>; 380 #iommu-cells = <1>; 381 interrupt-parent = <&aic>; 382 interrupts = <AIC_IRQ 0 1274 IRQ_TYPE_LEVEL_HIGH>; 383 power-domains = <&ps_apcie_gp_sys>; 384 }; 385 386 pcie0_dart_2: iommu@583008000 { 387 compatible = "apple,t6000-dart"; 388 reg = <0x5 0x83008000 0x0 0x4000>; 389 #iommu-cells = <1>; 390 interrupt-parent = <&aic>; 391 interrupts = <AIC_IRQ 0 1277 IRQ_TYPE_LEVEL_HIGH>; 392 power-domains = <&ps_apcie_gp_sys>; 393 status = "disabled"; 394 }; 395 396 pcie0_dart_3: iommu@584008000 { 397 compatible = "apple,t6000-dart"; 398 reg = <0x5 0x84008000 0x0 0x4000>; 399 #iommu-cells = <1>; 400 interrupt-parent = <&aic>; 401 interrupts = <AIC_IRQ 0 1280 IRQ_TYPE_LEVEL_HIGH>; 402 power-domains = <&ps_apcie_gp_sys>; 403 status = "disabled"; 404 }; 405 406 pcie0: pcie@590000000 { 407 compatible = "apple,t6000-pcie", "apple,pcie"; 408 device_type = "pci"; 409 410 reg = <0x5 0x90000000 0x0 0x1000000>, 411 <0x5 0x80000000 0x0 0x100000>, 412 <0x5 0x81000000 0x0 0x4000>, 413 <0x5 0x82000000 0x0 0x4000>, 414 <0x5 0x83000000 0x0 0x4000>, 415 <0x5 0x84000000 0x0 0x4000>; 416 reg-names = "config", "rc", "port0", "port1", "port2", "port3"; 417 418 interrupt-parent = <&aic>; 419 interrupts = <AIC_IRQ 0 1270 IRQ_TYPE_LEVEL_HIGH>, 420 <AIC_IRQ 0 1273 IRQ_TYPE_LEVEL_HIGH>, 421 <AIC_IRQ 0 1276 IRQ_TYPE_LEVEL_HIGH>, 422 <AIC_IRQ 0 1279 IRQ_TYPE_LEVEL_HIGH>; 423 424 msi-controller; 425 msi-parent = <&pcie0>; 426 msi-ranges = <&aic AIC_IRQ 0 1581 IRQ_TYPE_EDGE_RISING 32>; 427 428 429 iommu-map = <0x100 &pcie0_dart_0 1 1>, 430 <0x200 &pcie0_dart_1 1 1>, 431 <0x300 &pcie0_dart_2 1 1>, 432 <0x400 &pcie0_dart_3 1 1>; 433 iommu-map-mask = <0xff00>; 434 435 bus-range = <0 4>; 436 #address-cells = <3>; 437 #size-cells = <2>; 438 ranges = <0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000>, 439 <0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000>; 440 441 power-domains = <&ps_apcie_gp_sys>; 442 pinctrl-0 = <&pcie_pins>; 443 pinctrl-names = "default"; 444 445 port00: pci@0,0 { 446 device_type = "pci"; 447 reg = <0x0 0x0 0x0 0x0 0x0>; 448 reset-gpios = <&pinctrl_ap 4 GPIO_ACTIVE_LOW>; 449 450 #address-cells = <3>; 451 #size-cells = <2>; 452 ranges; 453 454 interrupt-controller; 455 #interrupt-cells = <1>; 456 457 interrupt-map-mask = <0 0 0 7>; 458 interrupt-map = <0 0 0 1 &port00 0 0 0 0>, 459 <0 0 0 2 &port00 0 0 0 1>, 460 <0 0 0 3 &port00 0 0 0 2>, 461 <0 0 0 4 &port00 0 0 0 3>; 462 }; 463 464 port01: pci@1,0 { 465 device_type = "pci"; 466 reg = <0x800 0x0 0x0 0x0 0x0>; 467 reset-gpios = <&pinctrl_ap 5 GPIO_ACTIVE_LOW>; 468 469 #address-cells = <3>; 470 #size-cells = <2>; 471 ranges; 472 473 interrupt-controller; 474 #interrupt-cells = <1>; 475 476 interrupt-map-mask = <0 0 0 7>; 477 interrupt-map = <0 0 0 1 &port01 0 0 0 0>, 478 <0 0 0 2 &port01 0 0 0 1>, 479 <0 0 0 3 &port01 0 0 0 2>, 480 <0 0 0 4 &port01 0 0 0 3>; 481 }; 482 483 port02: pci@2,0 { 484 device_type = "pci"; 485 reg = <0x1000 0x0 0x0 0x0 0x0>; 486 reset-gpios = <&pinctrl_ap 6 GPIO_ACTIVE_LOW>; 487 488 #address-cells = <3>; 489 #size-cells = <2>; 490 ranges; 491 492 interrupt-controller; 493 #interrupt-cells = <1>; 494 495 interrupt-map-mask = <0 0 0 7>; 496 interrupt-map = <0 0 0 1 &port02 0 0 0 0>, 497 <0 0 0 2 &port02 0 0 0 1>, 498 <0 0 0 3 &port02 0 0 0 2>, 499 <0 0 0 4 &port02 0 0 0 3>; 500 status = "disabled"; 501 }; 502 503 port03: pci@3,0 { 504 device_type = "pci"; 505 reg = <0x1800 0x0 0x0 0x0 0x0>; 506 reset-gpios = <&pinctrl_ap 7 GPIO_ACTIVE_LOW>; 507 508 #address-cells = <3>; 509 #size-cells = <2>; 510 ranges; 511 512 interrupt-controller; 513 #interrupt-cells = <1>; 514 515 interrupt-map-mask = <0 0 0 7>; 516 interrupt-map = <0 0 0 1 &port03 0 0 0 0>, 517 <0 0 0 2 &port03 0 0 0 1>, 518 <0 0 0 3 &port03 0 0 0 2>, 519 <0 0 0 4 &port03 0 0 0 3>; 520 status = "disabled"; 521 }; 522 }; 523