xref: /linux/arch/arm64/boot/dts/apple/t6001.dtsi (revision 8c994eff8fcfe8ecb1f1dbebed25b4d7bb75be12)
1// SPDX-License-Identifier: GPL-2.0+ OR MIT
2/*
3 * Apple T6001 "M1 Max" SoC
4 *
5 * Other names: H13J, "Jade"
6 *
7 * Copyright The Asahi Linux Contributors
8 */
9
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/interrupt-controller/apple-aic.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/pinctrl/apple.h>
14
15#include "multi-die-cpp.h"
16
17#include "t600x-common.dtsi"
18
19/ {
20	compatible = "apple,t6001", "apple,arm-platform";
21
22	soc {
23		compatible = "simple-bus";
24		#address-cells = <2>;
25		#size-cells = <2>;
26
27		ranges;
28		nonposted-mmio;
29
30		// filled via templated includes at the end of the file
31	};
32};
33
34#define DIE
35#define DIE_NO 0
36
37&{/soc} {
38	#include "t600x-die0.dtsi"
39	#include "t600x-dieX.dtsi"
40	#include "t600x-nvme.dtsi"
41};
42
43#include "t600x-gpio-pins.dtsi"
44#include "t600x-pmgr.dtsi"
45
46#undef DIE
47#undef DIE_NO
48
49
50&aic {
51	affinities {
52		e-core-pmu-affinity {
53			apple,fiq-index = <AIC_CPU_PMU_E>;
54			cpus = <&cpu_e00 &cpu_e01>;
55		};
56
57		p-core-pmu-affinity {
58			apple,fiq-index = <AIC_CPU_PMU_P>;
59			cpus = <&cpu_p00 &cpu_p01 &cpu_p02 &cpu_p03
60				&cpu_p10 &cpu_p11 &cpu_p12 &cpu_p13>;
61		};
62	};
63};
64