1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019 BayLibre, SAS 4 * Author: Neil Armstrong <narmstrong@baylibre.com> 5 */ 6 7#include "meson-g12-common.dtsi" 8#include <dt-bindings/clock/axg-audio-clkc.h> 9#include <dt-bindings/power/meson-sm1-power.h> 10#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h> 11#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h> 12 13/ { 14 compatible = "amlogic,sm1"; 15 16 tdmif_a: audio-controller-0 { 17 compatible = "amlogic,axg-tdm-iface"; 18 #sound-dai-cells = <0>; 19 sound-name-prefix = "TDM_A"; 20 clocks = <&clkc_audio AUD_CLKID_MST_A_SCLK>, 21 <&clkc_audio AUD_CLKID_MST_A_LRCLK>, 22 <&clkc_audio AUD_CLKID_MST_A_MCLK>; 23 clock-names = "sclk", "lrclk", "mclk"; 24 status = "disabled"; 25 }; 26 27 tdmif_b: audio-controller-1 { 28 compatible = "amlogic,axg-tdm-iface"; 29 #sound-dai-cells = <0>; 30 sound-name-prefix = "TDM_B"; 31 clocks = <&clkc_audio AUD_CLKID_MST_B_SCLK>, 32 <&clkc_audio AUD_CLKID_MST_B_LRCLK>, 33 <&clkc_audio AUD_CLKID_MST_B_MCLK>; 34 clock-names = "sclk", "lrclk", "mclk"; 35 status = "disabled"; 36 }; 37 38 tdmif_c: audio-controller-2 { 39 compatible = "amlogic,axg-tdm-iface"; 40 #sound-dai-cells = <0>; 41 sound-name-prefix = "TDM_C"; 42 clocks = <&clkc_audio AUD_CLKID_MST_C_SCLK>, 43 <&clkc_audio AUD_CLKID_MST_C_LRCLK>, 44 <&clkc_audio AUD_CLKID_MST_C_MCLK>; 45 clock-names = "sclk", "lrclk", "mclk"; 46 status = "disabled"; 47 }; 48 49 cpus { 50 #address-cells = <0x2>; 51 #size-cells = <0x0>; 52 53 cpu0: cpu@0 { 54 device_type = "cpu"; 55 compatible = "arm,cortex-a55"; 56 reg = <0x0 0x0>; 57 enable-method = "psci"; 58 d-cache-line-size = <32>; 59 d-cache-size = <0x8000>; 60 d-cache-sets = <32>; 61 i-cache-line-size = <32>; 62 i-cache-size = <0x8000>; 63 i-cache-sets = <32>; 64 next-level-cache = <&l2>; 65 #cooling-cells = <2>; 66 }; 67 68 cpu1: cpu@1 { 69 device_type = "cpu"; 70 compatible = "arm,cortex-a55"; 71 reg = <0x0 0x1>; 72 enable-method = "psci"; 73 d-cache-line-size = <32>; 74 d-cache-size = <0x8000>; 75 d-cache-sets = <32>; 76 i-cache-line-size = <32>; 77 i-cache-size = <0x8000>; 78 i-cache-sets = <32>; 79 next-level-cache = <&l2>; 80 #cooling-cells = <2>; 81 }; 82 83 cpu2: cpu@2 { 84 device_type = "cpu"; 85 compatible = "arm,cortex-a55"; 86 reg = <0x0 0x2>; 87 enable-method = "psci"; 88 d-cache-line-size = <32>; 89 d-cache-size = <0x8000>; 90 d-cache-sets = <32>; 91 i-cache-line-size = <32>; 92 i-cache-size = <0x8000>; 93 i-cache-sets = <32>; 94 next-level-cache = <&l2>; 95 #cooling-cells = <2>; 96 }; 97 98 cpu3: cpu@3 { 99 device_type = "cpu"; 100 compatible = "arm,cortex-a55"; 101 reg = <0x0 0x3>; 102 enable-method = "psci"; 103 d-cache-line-size = <32>; 104 d-cache-size = <0x8000>; 105 d-cache-sets = <32>; 106 i-cache-line-size = <32>; 107 i-cache-size = <0x8000>; 108 i-cache-sets = <32>; 109 next-level-cache = <&l2>; 110 #cooling-cells = <2>; 111 }; 112 113 l2: l2-cache0 { 114 compatible = "cache"; 115 cache-level = <2>; 116 cache-unified; 117 cache-size = <0x40000>; /* L2. 256 KB */ 118 cache-line-size = <64>; 119 cache-sets = <256>; 120 }; 121 }; 122 123 cpu_opp_table: opp-table { 124 compatible = "operating-points-v2"; 125 opp-shared; 126 127 opp-1000000000 { 128 opp-hz = /bits/ 64 <1000000000>; 129 opp-microvolt = <770000>; 130 clock-latency-ns = <50000>; 131 }; 132 133 opp-1200000000 { 134 opp-hz = /bits/ 64 <1200000000>; 135 opp-microvolt = <780000>; 136 }; 137 138 opp-1404000000 { 139 opp-hz = /bits/ 64 <1404000000>; 140 opp-microvolt = <790000>; 141 }; 142 143 opp-1500000000 { 144 opp-hz = /bits/ 64 <1500000000>; 145 opp-microvolt = <800000>; 146 }; 147 148 opp-1608000000 { 149 opp-hz = /bits/ 64 <1608000000>; 150 opp-microvolt = <810000>; 151 }; 152 153 opp-1704000000 { 154 opp-hz = /bits/ 64 <1704000000>; 155 opp-microvolt = <850000>; 156 }; 157 158 opp-1800000000 { 159 opp-hz = /bits/ 64 <1800000000>; 160 opp-microvolt = <900000>; 161 }; 162 163 opp-1908000000 { 164 opp-hz = /bits/ 64 <1908000000>; 165 opp-microvolt = <950000>; 166 }; 167 }; 168}; 169 170&apb { 171 audio: bus@60000 { 172 compatible = "simple-bus"; 173 reg = <0x0 0x60000 0x0 0x1000>; 174 #address-cells = <2>; 175 #size-cells = <2>; 176 ranges = <0x0 0x0 0x0 0x60000 0x0 0x1000>; 177 178 clkc_audio: clock-controller@0 { 179 status = "disabled"; 180 compatible = "amlogic,sm1-audio-clkc"; 181 reg = <0x0 0x0 0x0 0xb4>; 182 #clock-cells = <1>; 183 #reset-cells = <1>; 184 185 clocks = <&clkc CLKID_AUDIO>, 186 <&clkc CLKID_MPLL0>, 187 <&clkc CLKID_MPLL1>, 188 <&clkc CLKID_MPLL2>, 189 <&clkc CLKID_MPLL3>, 190 <&clkc CLKID_HIFI_PLL>, 191 <&clkc CLKID_FCLK_DIV3>, 192 <&clkc CLKID_FCLK_DIV4>, 193 <&clkc CLKID_FCLK_DIV5>; 194 clock-names = "pclk", 195 "mst_in0", 196 "mst_in1", 197 "mst_in2", 198 "mst_in3", 199 "mst_in4", 200 "mst_in5", 201 "mst_in6", 202 "mst_in7"; 203 204 resets = <&reset RESET_AUDIO>; 205 }; 206 207 toddr_a: audio-controller@100 { 208 compatible = "amlogic,sm1-toddr", 209 "amlogic,axg-toddr"; 210 reg = <0x0 0x100 0x0 0x2c>; 211 #sound-dai-cells = <0>; 212 sound-name-prefix = "TODDR_A"; 213 interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>; 214 clocks = <&clkc_audio AUD_CLKID_TODDR_A>; 215 resets = <&arb AXG_ARB_TODDR_A>, 216 <&clkc_audio AUD_RESET_TODDR_A>; 217 reset-names = "arb", "rst"; 218 amlogic,fifo-depth = <8192>; 219 status = "disabled"; 220 }; 221 222 toddr_b: audio-controller@140 { 223 compatible = "amlogic,sm1-toddr", 224 "amlogic,axg-toddr"; 225 reg = <0x0 0x140 0x0 0x2c>; 226 #sound-dai-cells = <0>; 227 sound-name-prefix = "TODDR_B"; 228 interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>; 229 clocks = <&clkc_audio AUD_CLKID_TODDR_B>; 230 resets = <&arb AXG_ARB_TODDR_B>, 231 <&clkc_audio AUD_RESET_TODDR_B>; 232 reset-names = "arb", "rst"; 233 amlogic,fifo-depth = <256>; 234 status = "disabled"; 235 }; 236 237 toddr_c: audio-controller@180 { 238 compatible = "amlogic,sm1-toddr", 239 "amlogic,axg-toddr"; 240 reg = <0x0 0x180 0x0 0x2c>; 241 #sound-dai-cells = <0>; 242 sound-name-prefix = "TODDR_C"; 243 interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>; 244 clocks = <&clkc_audio AUD_CLKID_TODDR_C>; 245 resets = <&arb AXG_ARB_TODDR_C>, 246 <&clkc_audio AUD_RESET_TODDR_C>; 247 reset-names = "arb", "rst"; 248 amlogic,fifo-depth = <256>; 249 status = "disabled"; 250 }; 251 252 frddr_a: audio-controller@1c0 { 253 compatible = "amlogic,sm1-frddr", 254 "amlogic,axg-frddr"; 255 reg = <0x0 0x1c0 0x0 0x2c>; 256 #sound-dai-cells = <0>; 257 sound-name-prefix = "FRDDR_A"; 258 interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>; 259 clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; 260 resets = <&arb AXG_ARB_FRDDR_A>, 261 <&clkc_audio AUD_RESET_FRDDR_A>; 262 reset-names = "arb", "rst"; 263 amlogic,fifo-depth = <512>; 264 status = "disabled"; 265 }; 266 267 frddr_b: audio-controller@200 { 268 compatible = "amlogic,sm1-frddr", 269 "amlogic,axg-frddr"; 270 reg = <0x0 0x200 0x0 0x2c>; 271 #sound-dai-cells = <0>; 272 sound-name-prefix = "FRDDR_B"; 273 interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>; 274 clocks = <&clkc_audio AUD_CLKID_FRDDR_B>; 275 resets = <&arb AXG_ARB_FRDDR_B>, 276 <&clkc_audio AUD_RESET_FRDDR_B>; 277 reset-names = "arb", "rst"; 278 amlogic,fifo-depth = <256>; 279 status = "disabled"; 280 }; 281 282 frddr_c: audio-controller@240 { 283 compatible = "amlogic,sm1-frddr", 284 "amlogic,axg-frddr"; 285 reg = <0x0 0x240 0x0 0x2c>; 286 #sound-dai-cells = <0>; 287 sound-name-prefix = "FRDDR_C"; 288 interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>; 289 clocks = <&clkc_audio AUD_CLKID_FRDDR_C>; 290 resets = <&arb AXG_ARB_FRDDR_C>, 291 <&clkc_audio AUD_RESET_FRDDR_C>; 292 reset-names = "arb", "rst"; 293 amlogic,fifo-depth = <256>; 294 status = "disabled"; 295 }; 296 297 arb: reset-controller@280 { 298 status = "disabled"; 299 compatible = "amlogic,meson-sm1-audio-arb"; 300 reg = <0x0 0x280 0x0 0x4>; 301 #reset-cells = <1>; 302 clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; 303 }; 304 305 tdmin_a: audio-controller@300 { 306 compatible = "amlogic,sm1-tdmin"; 307 reg = <0x0 0x300 0x0 0x40>; 308 sound-name-prefix = "TDMIN_A"; 309 resets = <&clkc_audio AUD_RESET_TDMIN_A>; 310 clocks = <&clkc_audio AUD_CLKID_TDMIN_A>, 311 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>, 312 <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>, 313 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>, 314 <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>; 315 clock-names = "pclk", "sclk", "sclk_sel", 316 "lrclk", "lrclk_sel"; 317 status = "disabled"; 318 }; 319 320 tdmin_b: audio-controller@340 { 321 compatible = "amlogic,sm1-tdmin"; 322 reg = <0x0 0x340 0x0 0x40>; 323 sound-name-prefix = "TDMIN_B"; 324 resets = <&clkc_audio AUD_RESET_TDMIN_B>; 325 clocks = <&clkc_audio AUD_CLKID_TDMIN_B>, 326 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>, 327 <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>, 328 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>, 329 <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>; 330 clock-names = "pclk", "sclk", "sclk_sel", 331 "lrclk", "lrclk_sel"; 332 status = "disabled"; 333 }; 334 335 tdmin_c: audio-controller@380 { 336 compatible = "amlogic,sm1-tdmin"; 337 reg = <0x0 0x380 0x0 0x40>; 338 sound-name-prefix = "TDMIN_C"; 339 resets = <&clkc_audio AUD_RESET_TDMIN_C>; 340 clocks = <&clkc_audio AUD_CLKID_TDMIN_C>, 341 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>, 342 <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>, 343 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>, 344 <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>; 345 clock-names = "pclk", "sclk", "sclk_sel", 346 "lrclk", "lrclk_sel"; 347 status = "disabled"; 348 }; 349 350 tdmin_lb: audio-controller@3c0 { 351 compatible = "amlogic,sm1-tdmin"; 352 reg = <0x0 0x3c0 0x0 0x40>; 353 sound-name-prefix = "TDMIN_LB"; 354 resets = <&clkc_audio AUD_RESET_TDMIN_LB>; 355 clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>, 356 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>, 357 <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>, 358 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>, 359 <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>; 360 clock-names = "pclk", "sclk", "sclk_sel", 361 "lrclk", "lrclk_sel"; 362 status = "disabled"; 363 }; 364 365 spdifin: audio-controller@400 { 366 compatible = "amlogic,sm1-spdifin", 367 "amlogic,axg-spdifin"; 368 reg = <0x0 0x400 0x0 0x30>; 369 #sound-dai-cells = <0>; 370 sound-name-prefix = "SPDIFIN"; 371 interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; 372 clocks = <&clkc_audio AUD_CLKID_SPDIFIN>, 373 <&clkc_audio AUD_CLKID_SPDIFIN_CLK>; 374 clock-names = "pclk", "refclk"; 375 resets = <&clkc_audio AUD_RESET_SPDIFIN>; 376 status = "disabled"; 377 }; 378 379 spdifout_a: audio-controller@480 { 380 compatible = "amlogic,sm1-spdifout", 381 "amlogic,axg-spdifout"; 382 reg = <0x0 0x480 0x0 0x50>; 383 #sound-dai-cells = <0>; 384 sound-name-prefix = "SPDIFOUT_A"; 385 clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>, 386 <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>; 387 clock-names = "pclk", "mclk"; 388 resets = <&clkc_audio AUD_RESET_SPDIFOUT>; 389 status = "disabled"; 390 }; 391 392 tdmout_a: audio-controller@500 { 393 compatible = "amlogic,sm1-tdmout"; 394 reg = <0x0 0x500 0x0 0x40>; 395 sound-name-prefix = "TDMOUT_A"; 396 resets = <&clkc_audio AUD_RESET_TDMOUT_A>; 397 clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>, 398 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>, 399 <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>, 400 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>, 401 <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>; 402 clock-names = "pclk", "sclk", "sclk_sel", 403 "lrclk", "lrclk_sel"; 404 status = "disabled"; 405 }; 406 407 tdmout_b: audio-controller@540 { 408 compatible = "amlogic,sm1-tdmout"; 409 reg = <0x0 0x540 0x0 0x40>; 410 sound-name-prefix = "TDMOUT_B"; 411 resets = <&clkc_audio AUD_RESET_TDMOUT_B>; 412 clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>, 413 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>, 414 <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>, 415 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>, 416 <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>; 417 clock-names = "pclk", "sclk", "sclk_sel", 418 "lrclk", "lrclk_sel"; 419 status = "disabled"; 420 }; 421 422 tdmout_c: audio-controller@580 { 423 compatible = "amlogic,sm1-tdmout"; 424 reg = <0x0 0x580 0x0 0x40>; 425 sound-name-prefix = "TDMOUT_C"; 426 resets = <&clkc_audio AUD_RESET_TDMOUT_C>; 427 clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>, 428 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>, 429 <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>, 430 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>, 431 <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>; 432 clock-names = "pclk", "sclk", "sclk_sel", 433 "lrclk", "lrclk_sel"; 434 status = "disabled"; 435 }; 436 437 toacodec: audio-controller@740 { 438 compatible = "amlogic,sm1-toacodec", 439 "amlogic,g12a-toacodec"; 440 reg = <0x0 0x740 0x0 0x4>; 441 #sound-dai-cells = <1>; 442 sound-name-prefix = "TOACODEC"; 443 resets = <&clkc_audio AUD_RESET_TOACODEC>; 444 status = "disabled"; 445 }; 446 447 tohdmitx: audio-controller@744 { 448 compatible = "amlogic,sm1-tohdmitx", 449 "amlogic,g12a-tohdmitx"; 450 reg = <0x0 0x744 0x0 0x4>; 451 #sound-dai-cells = <1>; 452 sound-name-prefix = "TOHDMITX"; 453 resets = <&clkc_audio AUD_RESET_TOHDMITX>; 454 status = "disabled"; 455 }; 456 457 toddr_d: audio-controller@840 { 458 compatible = "amlogic,sm1-toddr", 459 "amlogic,axg-toddr"; 460 reg = <0x0 0x840 0x0 0x2c>; 461 #sound-dai-cells = <0>; 462 sound-name-prefix = "TODDR_D"; 463 interrupts = <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>; 464 clocks = <&clkc_audio AUD_CLKID_TODDR_D>; 465 resets = <&arb AXG_ARB_TODDR_D>, 466 <&clkc_audio AUD_RESET_TODDR_D>; 467 reset-names = "arb", "rst"; 468 amlogic,fifo-depth = <256>; 469 status = "disabled"; 470 }; 471 472 frddr_d: audio-controller@880 { 473 compatible = "amlogic,sm1-frddr", 474 "amlogic,axg-frddr"; 475 reg = <0x0 0x880 0x0 0x2c>; 476 #sound-dai-cells = <0>; 477 sound-name-prefix = "FRDDR_D"; 478 interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>; 479 clocks = <&clkc_audio AUD_CLKID_FRDDR_D>; 480 resets = <&arb AXG_ARB_FRDDR_D>, 481 <&clkc_audio AUD_RESET_FRDDR_D>; 482 reset-names = "arb", "rst"; 483 amlogic,fifo-depth = <256>; 484 status = "disabled"; 485 }; 486 }; 487 488 pdm: audio-controller@61000 { 489 compatible = "amlogic,sm1-pdm", 490 "amlogic,axg-pdm"; 491 reg = <0x0 0x61000 0x0 0x34>; 492 #sound-dai-cells = <0>; 493 sound-name-prefix = "PDM"; 494 clocks = <&clkc_audio AUD_CLKID_PDM>, 495 <&clkc_audio AUD_CLKID_PDM_DCLK>, 496 <&clkc_audio AUD_CLKID_PDM_SYSCLK>; 497 clock-names = "pclk", "dclk", "sysclk"; 498 resets = <&clkc_audio AUD_RESET_PDM>; 499 status = "disabled"; 500 }; 501}; 502 503&cecb_AO { 504 compatible = "amlogic,meson-sm1-ao-cec"; 505}; 506 507&clk_msr { 508 compatible = "amlogic,meson-sm1-clk-measure"; 509}; 510 511 512&clkc { 513 compatible = "amlogic,sm1-clkc"; 514}; 515 516&cpu_thermal { 517 cooling-maps { 518 map0 { 519 trip = <&cpu_passive>; 520 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 521 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 522 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 523 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 524 }; 525 526 map1 { 527 trip = <&cpu_hot>; 528 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 529 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 530 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 531 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 532 }; 533 }; 534}; 535 536ðmac { 537 power-domains = <&pwrc PWRC_SM1_ETH_ID>; 538}; 539 540&gpio_intc { 541 compatible = "amlogic,meson-sm1-gpio-intc", 542 "amlogic,meson-gpio-intc"; 543}; 544 545&hdmi_tx { 546 power-domains = <&pwrc PWRC_SM1_VPU_ID>; 547}; 548 549&pcie { 550 power-domains = <&pwrc PWRC_SM1_PCIE_ID>; 551}; 552 553&pmu { 554 compatible = "amlogic,sm1-ddr-pmu"; 555}; 556 557&pwrc { 558 compatible = "amlogic,meson-sm1-pwrc"; 559}; 560 561&simplefb_cvbs { 562 power-domains = <&pwrc PWRC_SM1_VPU_ID>; 563}; 564 565&simplefb_hdmi { 566 power-domains = <&pwrc PWRC_SM1_VPU_ID>; 567}; 568 569&vdec { 570 compatible = "amlogic,sm1-vdec"; 571}; 572 573&vpu { 574 power-domains = <&pwrc PWRC_SM1_VPU_ID>; 575}; 576 577&usb { 578 power-domains = <&pwrc PWRC_SM1_USB_ID>; 579}; 580 581&npu { 582 power-domains = <&pwrc PWRC_SM1_NNA_ID>; 583}; 584